Abstract: A computer chassis compliant with the Intelligent Platform Management Interface includes a central baseboard management controller (CBMC) and at least one computer board set. The computer board set includes a microcontroller that operates simultaneously as a satellite management controller to receive system management requests from the CBMC and to provide system management information to the CBMC, and as a local baseboard management controller to receive system management information about the computer board set and to provide the system management information about the computer board set to the computer board set. The computer board set detects a local event, which is entered in a local system event log. The satellite management controller determines if the event was requested by the CBMC, and if so, transmits a corresponding event message to the CBMC. The local baseboard management controller determines if local action is required and performs the local action.

Abstract: In an image input apparatus which can be controlled by a host computer, and has a request sending unit for sending a request input by the user to the host computer, an internal command execution unit for executing the request, and a request route flag table which stores correspondence data of the request type and destination, the user input is accepted, a request in a predetermined format is generated on the basis of the accepted user input, and the generated request is sent to the request sending unit or command execution unit with reference to the request route flag table.

Abstract: A circuit generally comprising a plurality of read input registers, a read output register, a write input register and a plurality of write output registers is generally disclosed. The read input registers may be configured to buffer a first read signal received within a plurality of first transfers. The read output register may be configured to transmit the first read signal in a second transfer. The write input register may be configured to buffer a first write signal received in a third transfer. The write output registers may be configured to transmit the first write signal within a plurality of fourth transfers.

Abstract: An integrated processing box performs processing commonly to a plurality of input devices, a plurality of output devices, or a plurality of storage devices. For example, the integrated processing box performs noise reduction processing on data received from an input device or a storage device or data supplied to an output device or the storage device. The integrated processing box also performs processing, for example, temporal/spatial processing or grayscale processing, variably to each type of input device, each type of output device, or each type of storage device. Accordingly, if the input device is, for example, a video camera, the video camera is formed only by a CCD, a sample-and-hold circuit for sampling and holding the output from the CCD, an AGC circuit for adjusting the gain of the output from the sample-and-hold circuit, and an A/D conversion circuit for converting the analog output of the AGC circuit into a digital output.

Abstract: A USB cable connects to a USB connector in an electrical/electronic product and a USB connector in a separate type USB unit so that a USB controller and a conversion circuit are connected. The conversion circuit converts a USB signal into an external interface signal which is transmitted to and received from a peripheral device. The external interface signal is transmitted to and received from the peripheral device through an external interface connector. The minimum number of interface connector is selected from various external interface connectors through which the external interface signal is transmitted to and received from the peripheral device. By connecting expansion connectors 5 and 6 in a USB unit and those in another USB unit, the USB signal is transmitted and received between the USB unit and another USB unit.

Abstract: A method is provided for controlling a Mass Storage Class Digital Imaging Device using a SCSI pass through protocol. The protocol is based on industry standard SCSI protocol with modifications and extensions to allow transparent communication over a medium and is referred to as SCSI Pass Through (SPT). This protocol defines a set of commands that are initiated in a computer. The commands also include and extend industry standard Picture Transfer Protocol and are targeted for application and execution in a Mass Storage Class Digital Imaging Device. The invention includes the definition of data buffers in the form of data structures that can be used for passing and receiving information related to the digital imaging device. The protocol is applicable to communication mediums that can be utilized in connecting any digital storage device to a computing device.

Abstract: Briefly, in accordance with one embodiment of the invention, a portable computing device includes a modem that may operate independently from a main processor. The modem may be used to download communication data while the main processor is inactive or powered off.

Abstract: An output buffer register includes a first input flip-flop register receiving a given number N of input signals, a latching register, a selection register, and an output multiplexer delivering N output signals. Only one data input of the enable register receives an enable signal. In this way, the propagation time at the input of the buffer register is reduced.

Abstract: Input/output (I/O) measurement facilities are provided. An extended I/O measurement block facility is provided that enables measurement blocks to be stored in discontiguous areas of main storage and to be accessed directly via addresses. In a further aspect, an extended I/O measurement word facility is provided that facilitates the obtaining of measurement data for single I/O operations.

Abstract: The data storage system 1 comprises tape drives 21 to 23 operable to read and write data transmitted via the SCSI bus 112 from and on a tape in parallel and a host PC 4 for controlling data transmission to the SCSI bus. The host PC 4 includes a data access control unit 41 operable to calculate a bus reconnect timing that makes it possible to avoid stopping tape writing or reading even when any one of the respective drive drives 21 to 23 waits for the time when the other tape drives finish data transmitting after it reaches a bus reconnect timing based on the tape drive information “(the number of drive units, a data transmission speed of the bus, either a data reading speeds of the respective drive units or a data writing speeds of the respective drive units)=(m, S and R)”.

Abstract: System and method for transferring data to a device using double buffered data transfers. A host computer system couples to a data acquisition device. The device includes a first read buffer and a second read buffer for storing output data received from the host computer. The device reads first data from the computer and stores it in the first read buffer. The first data is transferred out from the first read buffer while the device reads second data from the computer and stores it in the second read buffer. The second data is transferred out from the second read buffer (after the transfer of the first data) while the device reads third data from the host computer and stores the third data in the first read buffer. Thus, the data acquisition device successively reads data into one read buffer concurrently with transferring data out from the other buffer, respectively.

Abstract: A method, system, and apparatus for preventing input/output (I/O) adapters used by an operating system (OS) image, in a logically partitioned data processing system, from fetching or corrupting data from a memory location allocated to another OS image within the data processing system is provided. A hypervisor prevents transmission of data between an input/output adapter in one of the logical partitions and memory locations assigned to other logical partitions during a direct memory access (DMA) operation by assigning each of the input/output adapters a range of I/O bus DMA addresses. The I/O adapters (IOAs) are connected to PCI host bridges via terminal bridges. A single terminal bridge may support multiple IOAs, in which case every terminal bridge has a plurality of sets of range registers, each associated with a respective one of the IOAs to which it is connected. An arbiter is provided which selects one of the input/output adapters to use the PCI bus.

Abstract: An adaptive driver and method is presented for communicating between an operating system of a computer and various peripheral devices connected to the computer via a peripheral bus. Operating characteristics and input/output characteristics of the peripheral device and all intervening hardware devices placed between the operating system and the peripheral device are noted in a linked set of data fields, i.e., a driver stack. Serialized data transfers are coordinated using the driver stack, and each request for a data transfer is submitted to the stack in the form of an input/output request packet (IRP). Unlike conventional practice, in which IRPs must be pre-defined and hard-coded to conform to the characteristics of a particular peripheral device, the adaptive driver derives the device characteristics from data structures maintained by the operating system and constructs IRPs accordingly.

Abstract: Subject matter to regulate real-time data capture rates to match processor-bounded data consumption operations is described. In one aspect, a first transition time for a data source to transition from a first mode to a second mode is determined. A second transition time for the data source to change from the second mode to the first mode is also identified. Based on the first and second transition times, the data source is directed to transition into respective ones of the first and second modes such that real-time capture of data from the data source is regulated by a computing device to match processor-bound data consumption rates of an application consuming the data.

Abstract: An expander coupled between at least a first and second SCSI device for transmitting data and training patterns is provided. The expander includes, a first detection module for detecting a training pattern received from the first device; a second detection module that detects when a first section of the training pattern has been transmitted to the second device; and means for changing the expander's mode from a training mode to a repeat mode after the first section.

Abstract: The SCSI control block interface provides for distributed processing of storage commands that provides transports and processing blocks the ability to interconnect with each other independent of the underlying transport or hardware architecture. The interface receives a SCSI control block from a transport and determines a storage command associated with the SCSI control block. Based upon the storage command, a particular processor that processes the storage command is determined. The SCSI control block is routed to the appropriate processor for processing. After processing, the SCB is routed to a transport for delivery.

Abstract: A queuing system utilizing dual first-in, first-out (FIFO) memories is provided. The present queuing system is configured to use a first FIFO memory to receive and transfer a plurality of frames to a second FIFO memory wherein the frames include encrypted frame contents. The first FIFO memory is configured to transfer an interrupt to an associated processor in response to completion of the receipt of a valid frame. Next, the processor is configured to reinitialize the first FIFO memory for receipt of a subsequent frame. Additionally, the second FIFO memory is suitably adapted to concurrently store a plurality of frames transferred from the first FIFO memory. Finally, the present system is configured to transfer one of the stored frames out of the second FIFO memory in response to the completion of a data processing operation (e.g. initialization of a decryption algorithm).

Abstract: A configuration notification unit monitors internal messages generated by an operating system of a computer related to a device configuration process for plug and play devices coupled to the computer via a serial bus interface. The configuration notification unit outputs a real time warning to the user when it is unsafe to change the number of devices coupled to the computer. In a preferred embodiment, the configuration notification unit include a message handler coupled to an indication unit.

Abstract: A method for duplicating recording medium includes detecting a source recording medium and a plurality of target recording mediums. A source DMAC is configured for the source recording medium and a plurality of target DMACs for the target recording mediums. The data of a source recording medium is transmitted to a source FIFO buffer through the source DMAC. The data of the source FIFO buffer is transmitted to a plurality of target FIFO buffers through a multiplexer. The data of a plurality of target FIFO buffers is transmitted to a plurality of target recording mediums through a plurality of target DMACs.

Abstract: A system and method is disclosed for preventing the loss of event messages due to message buffer overruns. A fixed vendor-specific buffer pool is loaded with log messages by firmware in an adapter. A service application periodically polls a device driver for messages in the buffer pool. The device driver responds with the number of messages stored in the buffer pool and the total number of buffers in the buffer pool. The service application then issues “get next message” requests to receive the stored messages. Once the buffer pool has been emptied, the service application writes the messages to a disk file. The service application then computes a percent utilization of the buffer pool, and if the percent utilization exceeds a predetermined threshold, an algorithm is employed for increasing the polling frequency. If the percent utilization is below the threshold, an algorithm is employed for decreasing the polling frequency.