Abstract: A semiconductor device includes: a semiconductor substrate in which a cell region, an isolation region being a region which is located outward of the cell region, and a termination region including a guard ring region being located outward of the isolation region and an excess region being a region which is located outward of the guard ring region are defined; an insulating layer covering a top surface of the semiconductor substrate in the isolation region and the termination region; a surface electrode located on a portion of the top surface of the semiconductor substrate and a portion of a top surface of the insulating layer in the cell region and the isolation region; and a waterproof layer covering a portion of the insulating layer exposed from the surface electrode. The waterproof layer is spaced apart from the surface electrode.

Abstract: A power supply device for suppressing magnetic saturation includes a bridge rectifier, a boost inductor, a power switch element, a first PWM (Pulse Width Modulation) IC (Integrated Circuit), a first output stage circuit, an input switch circuit, a transformer, a first capacitor, a second output stage circuit, and a detection and control circuit. A leakage inductor and a magnetizing inductor are built in the transformer. The detection and control circuit includes an NTC (Negative Temperature Coefficient) resistor disposed adjacent to the transformer. The detection and control circuit detects the first voltage slope relative to the power switch element, and it detects the second voltage slope relative to the first output stage circuit. The detection and control circuit limits the inductive current flowing through the magnetizing inductor according to the first voltage slope, the second voltage slope, and the feedback voltage from the NTC resistor.

Abstract: An isolated communications apparatus applied to a transformer. The transformer includes N first rectifier units and a second rectifier unit, and the isolated communications apparatus includes N first control units, a second control unit, and a signal convergence unit. The first control units are connected to the first rectifier units in a one-to-one correspondence. Each first control unit is connected to the signal convergence unit, and the signal convergence unit and the second control unit are connected through an optical fiber. The signal convergence unit is configured to: receive first data packets from the N first control units, send the first data packets to the second control unit, receive at least one second data packet from the second control unit, determine a first control unit corresponding to each second data packet, and send each second data packet to a corresponding first control unit.

Abstract: In a switching power supply device, a control circuit controls a first thyristor, a second thyristor, and a switching element according to an input voltage. The control circuit maintains the first thyristor in an on state while maintaining the second thyristor and the switching element in an off state in a first period in which the absolute amplitude value is equal to or less than a first threshold value within the latter half of a first half-cycle of the input voltage at startup, and maintains the second thyristor in an on state while maintaining the first thyristor and the switching element in an off state in a second period in which the absolute amplitude value is equal to or less than a second threshold value within the latter half of a second half-cycle of the input voltage at startup. The second half-cycle is the half-cycle following the first half-cycle.

Abstract: A power supply circuit is provided with: an AC voltage supply part; and one or more Cockcroft-Walton circuits. The one or more Cockcroft-Walton circuits include a plurality of output terminals and are supplied with an AC voltage from the AC voltage supply part. The plurality of output terminals are configured to output different DC potentials for each output terminal according to a magnitude of the AC voltage.

Abstract: A diode pack housing for a rotating rectifier assembly can include a body having an interior surface defining an interior cavity open on a first end and configured to contain a diode pack and a plurality of bus bar channels defined axially on or in the inner surface in the interior cavity. The plurality of bus bar channels can be five or less bus bar channels.

Abstract: An isolated primary side switched converter (100) has a galvanic isolation stage (105) separating a primary side (101) and a secondary side (103). The secondary side winding (107) is connected to a rectification circuit and has a center tap. A first terminal (T1), a second terminal (T2) and a third terminal (T3) are provided for connecting one or more LED loads (LED1, LED2) to the secondary side (103) of the converter (100). The rectification circuit (109) is configured to set the first terminal (T1) at a positive electrical polarity and to set the second terminal (T2) at a negative polarity. The third terminal (T3) is electrically connected to the center tap. One or two LED loads can be connected between T1 and T3 (low voltage) and T2 and T3 (low voltage), or in one embodiment a single LED load can also be connected between T1 and T2 (high voltage).

Abstract: In an example, a method includes storing a pending PWM pulse for a switching voltage regulator. The method also includes determining a switching voltage regulator is operating in a current limit mode, where an inductor current is above a current limit threshold. The method includes providing a predetermined number of PWM pulses in the current limit mode. The method also includes, responsive to providing the predetermined number of PWM pulses, ceasing storage of pending PWM pulses for the switching voltage regulator.

Abstract: A voltage regulator including an amplifier, a start signal generator and a power transistor is provided. The amplifier has a first positive input terminal, a second positive input terminal, and a negative input terminal to receive a start signal, a reference voltage and a feedback voltage respectively. An output terminal of the amplifier generates a driving voltage. The start signal generator is coupled to the first positive input terminal of the amplifier and generates the start signal, which is incremental, during a startup time interval in a voltage bypass mode. The power transistor generates an output voltage according to the driving voltage based on an operating power. In the voltage bypass mode, the reference voltage is equal to the operating power. A soft-start effect can be effectively achieved by the voltage regulator in the voltage bypass mode.

Abstract: A method for balancing thermal stresses in semiconductor switching devices may include (a) monitoring temperatures of the semiconductor switching devices to provide a temperature difference between two of the switching devices; and (b) based on the temperature difference, providing a zero-sequence component to be used for adjusting conduction times of each of the semiconductor devices.

Abstract: Examples of the present disclosure provides a BUCK topological circuit for power supply including a rectification circuit, a first filter energy-storage circuit, a step-down constant-current driver chip, an output current setting circuit, a freewheeling circuit, a transformer, and a second filter energy-storage circuit. An external power supply capacitor is not required in the step-down constant-current driver chip.

Abstract: Disclosed is a digital LDO regulator capable of performing asynchronous binary search using a binary-weighted PMOS array. The digital LDO regulator includes a PMOS array unit including a binary-weighted PMOS array and that binary searches the PMOS array asynchronously, and a mode determining unit that operates in at least one of a fine mode, a coarse mode, and a medium mode, based on an output voltage of the PMOS array unit.

Abstract: According to one embodiment, a voltage generation circuit includes a first boost circuit, a voltage division circuit, a first detection circuit, a capacitor and a first switch. The first boost circuit outputs a first voltage. The voltage division circuit divides the first voltage. The first detection circuit is configured to detect a first monitor voltage supplied to the first input terminal, based on a reference voltage which is supplied to a second input terminal of the first detection circuit, and to control an operation of the first boost circuit. The capacitor is connected between an output terminal of the first boost circuit and the first input terminal of the first detection circuit. The first switch cuts off a connection between the capacitor and the first detection circuit, based on an output signal of the first detection circuit, until the first voltage is output from the first boost circuit.

Abstract: A method includes comparing a ramp signal with an output signal of an error amplifier to determine an initial turn-on time of a boost converter, generating a turn-on time of the boost converter through multiplying the initial turn-on time by a predetermined constant greater than or equal to 1, and maintaining a switching frequency of the boost converter substantially constant through varying a value of the predetermined constant.

Abstract: A magnetically geared apparatus comprising a rotor, the rotor comprising: a ring structure; and at least one pole piece mounted relative to the ring structure; wherein at least a portion of the ring structure forms a continuous ring radially inner to the at least one pole piece, wherein the at least one pole piece is received in a pole piece-receiving portion, the pole piece receiving portion being open at a radially outer end.

Abstract: To provide a power converter and a breaking mechanism which can break a DC current and can suppress that a fused material scatter to other circuits at fusing, in the case where the breaking mechanism of excess current is formed by a circuit pattern of a circuit board. In a power converter, a supporting member is provided with a support body part; a fixation projection part which projected from the support body part and to which the multilayer circuit board was fixed; and a support projection part which projected from the support body part and supports an one side circuit board face, wherein the fuse pattern is provided in an inner layer, and the support projection part overlaps with at least one part of a fusing part of the fuse pattern, viewing in a normal direction of the circuit board face of the multilayer circuit board.

Abstract: A voltage converter circuit includes a capacitor having a first end selectively connected to an input power source through a first input switch and a second end selectively connected to the input power source through a second input switch, and a single inductor configured to generate an output voltage in response to a voltage of a node between the single inductor and the first input switch, selectively connect the input power source through the first input switch at the node, and connect the first end of the capacitor at the node.

Abstract: An electronic device may include an inverter. The inverter may convert direct current (DC) power to alternating current (AC) power. The inverter may use a clock signal at a given frequency to output corresponding alternating current signals at the given frequency. The inverter may receive a dithered clock signal that is frequency dithered using a modulating signal. The dithered clock signal may have at least three different frequency levels during a repeated cycle of the modulating signal. The at least three different frequency levels may include a fundamental frequency, a first frequency that is lower than the fundamental frequency, and a second frequency that is higher than the fundamental frequency. The dithered clock signal may be, during the repeated cycle of the modulating signal, at the fundamental frequency for fewer total periods than at the first frequency and for fewer total periods than at the second frequency.

Abstract: There is provided a switching valve for a voltage source converter.

Abstract: A deadtime control scheme for improving buck converter light load efficiency.