Abstract: A multi-level inverter having one or more banks, each bank containing a plurality of low voltage MOSFET transistors. A processor configured to switch the plurality of low voltage MOSFET transistors in each bank to switch at multiple times during each cycle.

Abstract: A linear voltage regulator includes a transistor, an error amplifier, a feedback circuit and a compensation circuit. The transistor has a first terminal for receiving an input voltage, a second terminal for providing an output voltage, and a control terminal. The error amplifier has a first input terminal, a second input terminal and an output terminal, wherein the first input terminal receives a reference voltage, and the output terminal is coupled to the control terminal of the transistor. The feedback circuit receives the output voltage and generates a feedback voltage lower than the output voltage. The compensation circuit is configured to receive the feedback voltage and generate a compensation voltage at the second input terminal of the error amplifier. The compensation circuit includes a compensation capacitor for introducing a zero point into an open-loop transfer function of the linear voltage regulator to improve system stability.

Abstract: Pulse sharing control to enhance performance in multiple output power converters is described herein. During a switching cycle, an energy pulse is provided to more than one port (i.e., output) using pulse sharing transfer. Pulse sharing transfer may enhance performance by reducing audible noise due to subharmonics and by reducing a root mean square current of one or more secondary currents. A primary switch is closed to energize an energy transfer element via a primary current. Energy may be shared among a first load port on a first circuit path via a first secondary current and among a second load port on a second circuit path via a second secondary current.

Abstract: The present invention provides a device including a first power delivery channel and a second power delivery channel. The first power delivery channel includes a first voltage regulator, wherein the first voltage regulator is configured to receive a first input voltage to generate a first output signal. The second power delivery channel includes a second voltage regulator and a third voltage regulator, wherein the second voltage regulator receives a second input voltage to generate a second output signal, and the third voltage regulator receives the second output signal to generate a converted second output signal, wherein the first output signal and the converted second output signal are coupled together to a core circuit.

Abstract: A bandgap reference circuit includes a bandgap reference core circuit that includes a first bipolar transistor having a first emitter current density and a first base-emitter voltage, a second bipolar transistor having a second emitter current density that is smaller than the first emitter current density and having a second base-emitter voltage, a resistor that is connected to the emitter of the second bipolar transistor, and a differential amplifier circuit that is configured to control first and second emitter currents through the first and second bipolar transistors, respectively, such that a sum of the second base-emitter voltage and a voltage drop across the resistor approximates the first base-emitter voltage. The bandgap reference circuit further includes a first replica bipolar transistor that emulates an operating point of the first bipolar transistor and a second replica bipolar transistor that emulates an operating point of the second bipolar transistor.

Abstract: The present application provides a distributed LDO regulator structure without an external capacitor. The structure includes one CORE module; and one or more POWER modules driven by one of the CORE modules. The CORE module comprises a mirror source voltage generating circuit and a built-in LDO regulator circuit. An output end of an operational amplifier and a gate of the sixth PMOS together serve as a control voltage end of the POWER module. A negative input end of the operational amplifier is connected to a drain of the fifth PMOS and a source of the sixth PMOS by means of a first resistor, wherein a connection end serves as an output end of the built-in LDO regulator circuit. POWER modules having the same output voltage are connected to each other in parallel.

Abstract: A controlling circuit for a low-power low dropout regulator includes the low-power low dropout regulator, a current load detector and a bias current circuit. The low-power low dropout regulator has a first transmitting terminal and a second transmitting terminal. The first transmitting terminal is configured to transmit a first voltage, the second transmitting terminal is configured to transmit a second voltage, and the low-power low dropout regulator adjusts a voltage difference between the first voltage and the second voltage. The current load detector detects the first voltage and the second voltage, and compares the reference voltage with the second voltage to generate a detected signal. The bias current circuit generates a bias voltage and a reference current, and the low-power low dropout regulator dynamically adjust a bias current of the low-power low dropout regulator, so that the bias current is positively correlated with the reference current.

Abstract: A PFC circuit includes: a boost inductor, an auxiliary winding, an auxiliary switch tube, a main switch tube, a clamping capacitor, a series resistor and a control module; the boost inductor and the auxiliary winding have mutual inductance, a first terminal of the auxiliary winding is connected to a first terminal of the auxiliary switch tube, a second terminal of the auxiliary switch tube is connected to a first terminal of the clamping capacitor, a second terminal of the clamping capacitor is connected to a first terminal of the series resistor, and a second terminal of the series resistor is connected to a second terminal of the auxiliary winding; the main switch tube is connected between the boost inductor and the ground; and the control module is respectively connected to a control terminal of the main switch tube and a control terminal of the auxiliary switch tube.

Abstract: A power conversion apparatus includes: matrix converter circuitry configured to perform bidirectional power conversion between a primary side and a secondary side; and control circuitry configured to: calculate a deterioration level based on a secondary side current of the matrix converter circuitry, a carrier frequency, and a primary-secondary frequency difference between a primary side frequency and a secondary side frequency of the matrix converter circuitry; and output a deterioration notification in response to determining that the deterioration level exceeds a predetermined level.

Abstract: An apparatus includes first and second pluralities of switches, a controller for controlling these switches, gate-drivers for driving switches from the first plurality of switches, and first and second terminals configured for coupling to corresponding first and second external circuits at corresponding first and second voltages. During operation, the controller causes the first plurality of switches to transition between states. These transitions result in the second voltage being maintained at a value that is a multiple of the first voltage. The controller also causes the second plurality of switches to transition between states. These transitions resulting in capacitors being coupled or decoupled from the second voltage. The gate drivers derive, from the capacitors, charge for causing a voltage that enables switches from the first plurality of switches to be driven.

Abstract: A device includes a first impedance; a reference current generation circuit configured to generate a reference current according to a first potential difference, a reference voltage, and a first impedance value of the first impedance; a current mirror circuit configured to output an output current having a first ratio to the reference current according to the reference current; a second impedance configured to generate an output voltage according to a second impedance value of the second impedance, a voltage of a first node which is the same as the first potential difference, and the output current; and a negative feedback circuit configured to generate a feedback voltage according to the voltage of the first node, and adjust the output voltage according to the feedback voltage. There is a second ratio that is inversely proportional to the first ratio between the second impedance value and the first impedance value.

Abstract: An electrostatic chuck heater according to the present invention includes an alumina substrate having a wafer placement surface on its upper surface; an electrostatic electrode, a resistance heating element provided for each zone, and a multilayer jumper wire for supplying power to the resistance heating element, which are buried in the alumina substrate in this order from the wafer placement surface side; a heating element coupling via for vertically coupling the resistance heating element to the jumper wire; and a power supply via extending outward for supplying power to the jumper wire. At least the heating element coupling via and the power supply via contain ruthenium metal.

Abstract: The present invention provides a high voltage direct current (HVDC) transmission system (300, 600) comprising: a first station (102) comprising series-connected first and second HVDC converters (110, 130); a second station (104) comprising series-connected third and fourth HVDC converters (150, 170), wherein a neutral node (164) coupling the third HVDC converter (150) to the fourth HVDC converter (170) is coupled to earth; a first transmission line (200) connecting a positive node (114) of the first HVDC converter (110) to a corresponding positive node (154) of the third HVDC converter (150), wherein a first pole (240) of the system (300, 600) comprises the first HVDC converter (110), the third HVDC converter (150) and the first transmission line (200); a second transmission line (210) connecting a negative node (138) of the second HVDC converter (130) to a corresponding negative node (178) of the fourth HVDC converter (170), wherein a second pole (250) of the system (300, 600) comprises the second HVDC conve

Abstract: A power conversion system includes a power conversion circuit and a start circuit. The power conversion circuit includes a first terminal, a second terminal, an output capacitor, at least one switch unit, a flying capacitor and a magnetic element. The flying capacitor is connected between the first terminal and the second terminal. The output capacitor is electrically connected with the first terminal or the second terminal. The start circuit is configured to control the power conversion circuit to pre-charge. A first terminal of the start circuit is electrically connected with the first terminal, and a second terminal of the start circuit is electrically connected with the second terminal. During a start process of the power conversion circuit, the at least one flying capacitor and the output capacitor are pre-charged by the start circuit.

Abstract: A bandgap module and a linear regulator are provided. The linear regulator includes the bandgap module and an error amplifier. The voltage supply voltage includes a bandgap circuit, a lowpass filter, and a start-up module. The voltage supply voltage generates a bandgap voltage. The lowpass filter filters the bandgap voltage and generates a reference voltage accordingly. The start-up module includes a first start-up circuit and a second start-up circuit. The bandgap voltage is increased to a predefined value when the bandgap module operates in a first phase. The bandgap voltage maintains at the predefined value when the bandgap module operates in a second phase. The second phase is after the first phase.

Abstract: Systems and methods are disclosed related to low-power dynamic offset calibration of an error amplifier. An analog linear voltage regulator circuit tracks changes between a reference voltage and a regulated voltage to keep the regulated voltage as close as possible to the reference voltage. The analog linear voltage regulator includes an error amplifier that measures the error between the reference and regulated voltages and feedback circuitry. The error amplifier and feedback circuitry should be calibrated to correct for any offset within the circuits. The described offset calibration technique not only compensates for the offset in the error amplifier but also cancels any mismatch in the feedback network. During operation, conditions such as temperature and supply voltage may vary causing the offset to change. The technique is low power and dynamically cancels the offset even when the linear regulator is operating to supply the desired voltage.

Abstract: A method for regulating a voltage reference signal includes providing a first output current during a first interval and a boosted output current during a second interval to generate a low-dropout voltage reference signal based on a first power supply voltage, a second power supply voltage, and a reference voltage level. The method includes, during the second interval, compensating for a voltage drop caused by providing the boosted output current. The first output current may be provided in a first mode of operation. The boosted output current and voltage drop compensation may be provided in a boosted mode of operation.

Abstract: A coil has a winding that is coated with an epoxy resin in at least some areas, wherein a ratio of a compressive strength of the epoxy resin to the tensile strength thereof at room temperature ranges between 2 and 5, the modulus of elasticity at room temperature is at least 5000 MPa, and at a glass transition temperature of the epoxy resin, the modulus of elasticity and the tensile strength have values amounting to at least 30% of the values at room temperature.

Abstract: Various examples are provided related to modular multilevel converter (MMC) scale-up control methodologies which can be applied for MV and HV DC applications. In one example, an MMC includes first and second legs each with submodule (SM) groups connected in series, where each SM group includes a plurality of SMs; local group controllers that can control a corresponding SM group; and a central controller that can control output voltage of the MMC via the local group controllers. The local group controllers can provide capacitor voltage balancing (CVB) control of corresponding SM groups.

Abstract: A canned motor device includes a base unit, a motor, and front and rear covers. The base unit includes a side surface including inner and outer annular segments. The motor is mounted in the base unit and includes a flange. The rear cover is mounted in the base unit and includes a disk clamped sealingly between the flange and the inner annular segment. The front cover has an end abutting against the side surface and includes inner and outer surrounding segments. The disk and flange are clamped sealingly between the inner annular and surrounding segments. A first sealing element is disposed between the base unit and the disk. A second sealing element is disposed between the outer annular segment and the outer surrounding segment to form an airtight seal between the base unit and the front cover.