Patents Examined by Justin R Knapp
  • Patent number: 11521104
    Abstract: A quantum computing system computes soft information quantifying an effect of soft noise on multiple rounds of a syndrome measurement that is output by a quantum measurement circuit. The soft noise arises due to imperfections in a readout device that introduce variability in repeated measurements of ancilla qubits and is distinct from quantum noise arising from bit-flips in data qubits that are indirectly measured by the ancilla qubits. The quantum computing system applying decoding logic to identify fault locations within the quantum measurement circuit based on the computed soft information.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: December 6, 2022
    Assignee: Microsoft Licensing Technology, LLC
    Inventors: Nicolas Guillaume Delfosse, Christopher Anand Pattison, Michael Beverland, Marcus Palmer Da Silva
  • Patent number: 11522640
    Abstract: Disclosed herein are techniques to provide forward error correction for a high-speed interconnect symbol stream, such as, DisplayPort. The symbol stream may be split into FEC blocks and parity bits generated for each of the FEC blocks. The parity bits may be interleaved, encoded, and transmitted over an interconnect along with the symbol stream to provide forward error correction for the symbol stream.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: December 6, 2022
    Assignee: INTEL CORPORATION
    Inventors: Nausheen Ansari, Ziv Kabiry, Gal Yedidia
  • Patent number: 11522641
    Abstract: [Problem] To propose a technology capable of appropriately demodulating, in a receiving device, a plurality of pieces of data multiplexed through the quasi-synchronous LDM method. [Solution] A transmission device generates a UL modulated signal by using an IFFT process of NUL points, generates an LL modulated signal by using an IFFT process of NLL points different from the NUL points, and transmits signals obtained by timing-adjusting the modulated signals such that the start timings thereof coincide with each other in a predetermined cycle, and combining the timing-adjusted signals at a predetermined power ratio. In addition, the receiving device performs an NUL point FFT process on the reception signal from the transmitting device, reproduces UL and generates UL reception replica, on the basis of the result, and performs an NLL point FFT process on a signal obtained by subtracting the UL reception replica from the reception signal, and reproduces LL on the basis of the result.
    Type: Grant
    Filed: April 16, 2020
    Date of Patent: December 6, 2022
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventor: Tatsuhiro Nakada
  • Patent number: 11513897
    Abstract: Inventive aspects include a polar code encoding system, which includes a partitioning unit to receive and partition input data into partitioned input data units. Encoders encode the partitioned input data units, and generate encoded partitioned input data units. Multiplier units perform matrix multiplication on the partitioned input data units and generator matrices, and generate matrix products. Adder units perform matrix addition on the encoded partitioned input data units and the matrix products. A combining unit combines outputs of the encoders into a target code word X. The target code word X may be a length-N code word X, where N=N1+N2+ . . . +Nm, where each of N1, N2, through Nm are a power of two (2).
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: November 29, 2022
    Inventors: Wei Wu, Rekha Pitchumani, Zongwang Li
  • Patent number: 11502780
    Abstract: This application provides an encoding method and apparatus in wireless communications between a network device and a terminal. The method includes: performing cyclic redundancy check (CRC) encoding on A to-be-encoded information bits based on a CRC polynomial, to obtain a first bit sequence, where the first bit sequence includes L CRC bits and A information bits, L=11; and performing polar encoding on the first bit sequence.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: November 15, 2022
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Lingchen Huang, Shengchen Dai, Chen Xu, Yunfei Qiao, Rong Li
  • Patent number: 11502704
    Abstract: The present disclosure relates to the field of communication technologies, and discloses a polar coding/decoding method and apparatus, to improve sequence lookup efficiency. The method includes: obtaining a first sequence from a polar code construction sequence table based on a coding parameter, where the polar code construction sequence table includes at least one coding parameter and at least one sequence corresponding to the at least one coding parameter, the at least one coding parameter is mapped to the at least one sequence in a one-to-one manner, the first sequence is one of the at least one sequence; selecting serial numbers of K polarized channels from the first sequence based on a rate matching scheme and/or a reliability order; placing to-be-coded bits based on the selected serial numbers of the K polarized channels; and performing polar coding, to obtain a coded bit sequence.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: November 15, 2022
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Yunfei Qiao, Yinggang Du, Juan Song
  • Patent number: 11494684
    Abstract: A disclosed methodology for syndrome extraction in a quantum measurement circuit includes generating a graph representing a code implemented by the quantum measurement circuit. The graph includes bit nodes corresponding to data qubits in the quantum measurement circuit, check nodes corresponding to syndrome qubits in the quantum measurement circuit, and edges between the bit nodes and check nodes that are each associated with a stabilizer measurement provided by the code. The methodology provides for assigning each of the different edges in the graph to a select one of ā€œGā€ number of different edge types and performing at least G-number of temporally-separated rounds of qubit operations that each enact concurrent multi-qubit operations on endpoints of a subset of the edges assigned to a same one of the G different edge types.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: November 8, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Nicolas Guillaume Delfosse, Maxime Tremblay, Michael Edward Beverland
  • Patent number: 11481319
    Abstract: Techniques for using data mirroring across regions to reduce the likelihood of losing objects in a cloud object storage platform are provided. In one set of embodiments, a computer system can upload first and second copies of a data object to first and second regions of the cloud object storage platform respectively, where the first and second copies are identical. The computer system can then attempt to read the first copy of the data object from the first region. If the read attempt fails, the computer system can retrieve the second copy of the data object from the second region.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: October 25, 2022
    Assignee: VMWARE, INC.
    Inventors: Wenguang Wang, Vamsi Gunturu, Junlong Gao
  • Patent number: 11469779
    Abstract: According to some embodiments, a method for polar encoding includes obtaining an input bits index array Q, wherein each element Q[i] is an index of a polar coded transmission channel and corresponds to an input U[i] of a polar encoder. The elements of Q are ordered according to their associated channel quality. The method further includes obtaining an integer number X of bits for polar encoding and wireless transmission, wherein X is not greater than N. Upon determining the polar code block length N is not greater than the number of rate matched bits M available for transmission, the method includes assigning each of the bits as inputs to the polar encoder ordered according to the input bits index array Q.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: October 11, 2022
    Assignee: Telefonaktiebolaget LM Ericsson (Publ)
    Inventors: Xixian Chen, Qingchao Liu, Yashar Nezami
  • Patent number: 11467905
    Abstract: A stripe merging method and system based on erasure codes are provided. A StripeMerge-P algorithm is used first to determine alignment information of parity chunks of erasure code stripes based on a preprocessed hash table. Through a greedy strategy, erasure code stripe pairs to be merged are selected for merging. Through the hash table, location information of the parity chunks is directly looked up, so that no additional computing overhead is required, and the overhead of selecting and merging the erasure code stripe pairs is further reduced through the combination with the greedy strategy.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: October 11, 2022
    Assignee: HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Yuchong Hu, Qiaori Yao, Liangfeng Cheng, Yazhe Zhang, Dan Feng
  • Patent number: 11456819
    Abstract: Provided are a partial pseudo-randomization processing method, a corresponding apparatus, a device and a storage medium. The method includes performing pseudo-randomization processing on part of N bits b1, b2, . . . , bN to generate new N bits d1, d2, . . . , dN; and encoding the d1, d2, . . . , dN.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: September 27, 2022
    Assignee: ZTE Corporation
    Inventors: Yuzhou Hu, Zhifeng Yuan, Weimin Li, Jianqiang Dai, Li Tian, Hong Tang
  • Patent number: 11422889
    Abstract: A memory system includes: a nonvolatile memory device; a processor configured to generate a first map chunk including mapping information for accessing the nonvolatile memory device; a first error correction code (ECC) component configured to generate a first map codeword by adding a first parity bit to the first map chunk; a volatile memory configured to store the first map codeword; a second ECC component configured to generate first map data by performing decoding on the first map codeword that is outputted from the volatile memory and bypasses the first ECC component when the memory system is powered off; and a direct memory access (DMA) component configured to provide the first map data to the nonvolatile memory device.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: August 23, 2022
    Assignee: SK hynix Inc.
    Inventor: Do Hun Kim
  • Patent number: 11387940
    Abstract: A method including a network device receives a plurality of fragments of an Ethernet frame, where the plurality of fragments include an initial fragment and a first fragment, and the initial fragment includes a destination media access control (MAC) address field, in response to an error that occurs in the Ethernet frame, changes the first fragment to a second fragment, where the second fragment includes second type indication information (TII) and second to-be-transmitted data (TBTD), the second TII indicates that a type of the second TBTD is a control character, a value of first TBTD is different from a value of the second TBTD, and the second TBTD indicates that an error occurs in the Ethernet frame, and the network device sends the second fragment to a destination device.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: July 12, 2022
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Tongtong Wang, Xinyuan Wang
  • Patent number: 11379298
    Abstract: A circuit includes: a single-port memory interface which includes a sole address port configured to receive a read/write (RW) address, and a multi-port memory which has multiple address ports coupled to the sole address port of the single-port memory interface, and which is configured to store a data unit and parity bits, some of the parity bits being based on the corresponding RW address; a first decoding circuit configured to generate a decoded write address from the RW address and the parity bits; and an error detecting circuit configured to determine if an address error exists based on a comparison of the decoded write address to the read address.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: July 5, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Saman M. I. Adham, Ramin Shariat-Yazdi, Shih-Lien Linus Lu
  • Patent number: 11381257
    Abstract: A multi-carrier transmitter apparatus is disclosed. The apparatus includes an outer encoder, a shell mapper and an inner encoder. The outer encoder is configured to receive a signal, perform error correction using an outer code on the received signal and generate an outer encoder signal. The shell mapper is configured to perform constellation shaping on a subset of bits from the outer encoder signal and generate one or more constellation shaping bits. The inner encoder is configured to perform inner error correction/encoding using an inner code on a second subset of bits from the outer encoder signal and generate an inner correction signal.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: July 5, 2022
    Assignee: MaxLinear, Inc.
    Inventors: Rainer Strobel, Vladimir Oksman
  • Patent number: 11374592
    Abstract: A processing device in a memory system reads a sense word from a memory device and executes a plurality of parity check equations on corresponding subsets of the sense word to determine a plurality of parity check equation results. The processing device determines a syndrome for the sense word using the plurality of parity check equation results, determines whether the syndrome for the sense word satisfies a codeword criterion, and responsive to the syndrome for the sense word not satisfying the codeword criterion, performs an iterative low density parity check (LDPC) correction process, wherein at least one criterion of the iterative LDPC correction process is adjusted after a threshold number of iterations is performed.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: June 28, 2022
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Eyal En Gad, Zhengang Chen, Sivagnanam Parthasarathy, Yoav Weinberg
  • Patent number: 11374596
    Abstract: The disclosure discloses an algebraic decoding method and a decoder for a (n, n(n?1), n?1) permutation group code in a communication modulation system. The basic principle of the decoding method is: assuming that two code elements p(r1)=s1 and p(r2)=s2 can be correctly detected in a received real vector with a length of n, including their element values s1, s2 and position indices r1, r2 in the vector, an intermediate parameter w is determined by solving an equation (r1?r2)w=(s1?s2)(mod n); and each code element is calculated by w according to p(i)=(s1+(n?r1+i)w)(mod n), i=1, 2, . . . , n. The decoder is mainly composed of multiple n-dimensional registers, a w calculator, n code element calculators, and a code element buffer. In the disclosure, in a case where a receiver only correctly detects two code elements in a transmitted codeword with a length of n, the codeword can be correctly decoded by using the received information of the two code elements.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: June 28, 2022
    Assignee: HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Li Peng, Si Jia Chen, Ying Long Shi, Ya Yu Gao, Bin Dai, Lin Zhang, Kun Liang, Bo Zhou
  • Patent number: 11368251
    Abstract: Provided are systems and methods for convergent error vector indexing and retransmission in wireless data verifications. An example method includes transmitting a network packet to a receiver; receiving a further network packet being a copy of the network packet as received by the receiver, determining, based on the network packet and the further network packet, an error vector and locations of errors in the further network packet; sending, to the receiver, a first indexing packet including the locations of the errors; receiving a second indexing packet being a copy of the first indexing packet as received by the receiver; determining, based on the error vector and the second indexing packet, the locations of the errors in the second indexing packet; and sending a third indexing packet including the locations of the errors to the receiver, where the receiver corrects the further network packet using the third indexing packet.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: June 21, 2022
    Assignee: Aira Technologies, Inc.
    Inventors: Anand Chandrasekher, RaviKiran Gopalan, Yihan Jiang, Arman Rahimzamani
  • Patent number: 11362765
    Abstract: Through the identification of different packet-types, packets can be handled based on an assigned packet handling identifier. This identifier can, for example, enable forwarding of latency-sensitive packets without delay and allow error-sensitive packets to be stored for possible retransmission. In another embodiment, and optionally in conjunction with retransmission protocols including a packet handling identifier, a memory used for retransmission of packets can be shared with other transceiver functionality such as, coding, decoding, interleaving, deinterleaving, error correction, and the like.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: June 14, 2022
    Assignee: TQ DELTA, LLC
    Inventor: Marcos C. Tzannes
  • Patent number: 11361840
    Abstract: A storage device includes a nonvolatile memory, a communication interface connectable to a host, and a controller. The controller is configured to carry out writing of data that is received through the communication interface at a physical location of the nonvolatile memory when a write command associated with the data is received through the communication interface, control the communication interface to return a first notification upon determining that the writing of data at the physical location of the nonvolatile memory has completed, and control the communication interface to return a second notification a predetermined period of time after the first notification has been returned.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: June 14, 2022
    Assignee: KIOXIA CORPORATION
    Inventor: Daisuke Hashimoto