Patents Examined by Kyung S. Lee
  • Patent number: 11387020
    Abstract: A shunt resistor module which is coupled to a printed circuit board to be used for current measurement, includes: a resistor portion configured to have predetermined resistance; at least two terminal portions configured to extend from opposite ends of the resistor portion; lead pins fixed to first sides of the terminal portions to protrude to be electrically connected to the printed circuit board; and an exterior member formed to at least partially cover first surfaces of the terminal portions and to have pin holes opened to expose the lead pins and screw holes formed to be screwed to the printed circuit board.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: July 12, 2022
    Inventor: Jeong Wan Kim
  • Patent number: 11387021
    Abstract: A ceramic member includes a perovskite compound including La, Ca, Mn, and Ti as main components, wherein the amount of Ti is about 5 parts by mole or more and about 20 parts by mole or less, the amount of Ca is about 10 parts by mole or more and about 27 parts by mole or less, and the total amount of La and Ca is about 85 parts by mole or more and about 97 parts by mole or less based on the total amount of Mn and Ti of 100 parts by mole.
    Type: Grant
    Filed: October 26, 2020
    Date of Patent: July 12, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kohei Fukamachi
  • Patent number: 11378467
    Abstract: The present disclosure generally relates to the field of resistive sensing. In particular, the present disclosure relates to a highly sensitive reduced graphene oxide-nickel (RGO—Ni) composite based fast response temperature sensor. Aspects of the present disclosure provide a method for fabrication of a highly sensitive reduced graphene oxide-nickel (RGO—Ni) composite-based temperature sensor. An aspect of the present disclosure provides a temperature sensor comprising: a substrate; and a composite film deposited onto said substrate, wherein the composite film comprises a reduced graphene oxide-nickel composite film. In an embodiment, the temperature sensor is cryo-compatible.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: July 5, 2022
    Assignee: Indian Institute of Science
    Inventors: Vaishakh Kedambaimoole, Pavithra B. Jain, Manasa, Nagarjuna Neella, Rajanna Konandur, M M. Nayak, Narasimhiah Subrahmanyam Dinesh
  • Patent number: 11373787
    Abstract: The invention relates to a production method for an electrical resistance element (for example a shunt) with the following steps: —providing a resistance alloy in powder form, and—forming the resistance element from the powdered resistance material. The invention also relates to a correspondingly produced resistance element.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: June 28, 2022
    Assignees: Isabellenhuette Heusler GmbH & Co. KG, Schunk Sintermetalltechnik GmbH
    Inventors: Jan Marien, Jens Hartmann, Petra Schmidt, Andreas Baum, Phillip Prinz, Steffen Burk, Ingolf Langer, Alexander Witt, Joerg Ziesche, Sieglinde Mueller
  • Patent number: 11367547
    Abstract: Systems for disconnecting a surge arrester. One embodiment provides a surge arrester comprising a housing, a connecting interface configured to connect to an electrical power grid, and a disconnector device coupled to the connecting interface. A metal oxide varistor stack is coupled to the disconnector device, and a ground side connection is coupled to the metal oxide varistor stack, the ground side connection configured to connect to a system ground. The disconnector device is configured to disconnect the connecting interface from the system ground based on a predetermined disconnection condition.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: June 21, 2022
    Assignee: Hubbell Incorporated
    Inventors: Bastiaan Hubertus van Besouw, David Charles Hughes
  • Patent number: 11361885
    Abstract: A method includes coating at least one conductive element of an electronic device with an electrically non-conductive thixotropic liquid. An electronic device includes a first layer including an upper conductive element, a second layer including a lower conductive element, and a spacer positioned between the layers. The first layer, the second layer, and the spacer define a sensing chamber in which the upper and lower conductive elements move to vary the resistance of the electronic device. A non-conductive thixotropic liquid is present within the sensing chamber. Movement of the layers toward each other displaces the thixotropic liquid from an initial state coating at least one of the conductive elements to permit contact between the conductive elements, and movement of the first layer and the second layer away from each other returns the thixotropic liquid to the initial state.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: June 14, 2022
    Assignee: NURVV LIMITED
    Inventors: Derek Marsh, Wei Tu
  • Patent number: 11353366
    Abstract: A method for manufacturing a textile temperature sensor, including arranging a linear knitting machine having a first thread-guide and a second thread-guide; arranging a conductive insulated wire on the first thread-guide; meshing the conductive insulated wire for making a mesh portion B having a nonconductive surface; arranging an electric resistance measuring device configured to measure a variation of electric resistance, the electric resistance being a function of the temperature; the measuring device phase of the electric resistance including a first electric cable and a second electric cable; electric connection of the first electric cable to the first end and of the second electric cable to the second end; and arranging a control unit arranged to receive from the device the variation of electric resistance in order to calculate excursions of the temperature at the lead wire.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: June 7, 2022
    Assignee: KNITRONIX S.R.L.
    Inventor: Riccardo Marchesi
  • Patent number: 11348710
    Abstract: A metal oxide varistor (MOV) device including a MOV chip having first and second electrodes disposed on opposing side thereof, a first lead frame portion including a first contact tab electrically connected to the first electrode and a first lead contiguous with the first contact tab and extending away from the MOV chip, a second lead frame portion including a second contact tab electrically connected to the second electrode and a second lead contiguous with the second contact tab and extending away from the MOV chip, and a device body encasing the MOV chip, the first contact tab, the second contact tab, and portions of the first and second leads, wherein the first and second leads extend out of the device body and are bent into flat abutment with a bottom surface of the device body.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: May 31, 2022
    Assignee: Dongguan Littelfuse Electronics Company Limited
    Inventors: Dongjian Song, Werner Johler, Liang Gu, Libing Lu, Xiaolong Gong
  • Patent number: 11348709
    Abstract: A noise-preventing resistor has a structure in which a resistance wire is wound around an outer circumferential surface of a core, cap terminals are attached to either end part of the core, and part of an insulative coating (resin coating) covering the resistance wire and part of the resistance wire positioned underneath the insulative coating are cut, forming peeled regions exposing the resistance wire. As a result, conduction between the cap terminals and the resistance wire in the noise-preventing resistor is ensured.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: May 31, 2022
    Assignee: KOA Corporation
    Inventors: Tomohito Imai, Kentaro Takashima
  • Patent number: 11335480
    Abstract: A resistor includes a first insulator, a resistive body, a second insulator, a pair of electrodes, and a covering body. The first insulator has a first obverse surface facing in a thickness direction thereof. The resistive body is provided on the first obverse surface. The second insulator covers the resistive body. The pair of electrodes are electrically connected to the resistive body at both sides in a first direction perpendicular to the thickness direction. The covering body is formed on at least one of the first insulator and the second insulator. The covering body has electrical conductivity. The first layer is in contact with at least one of the first insulator and the second insulator.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: May 17, 2022
    Assignee: ROHM CO., LTD.
    Inventor: Kosaku Tanaka
  • Patent number: 11335479
    Abstract: A composite circuit protection device includes: a positive temperature coefficient (PTC) component which includes a positive temperature coefficient (PTC) layer that has two opposite surfaces, and first and second electrode layers that are respectively disposed on the two opposite surfaces of the PTC layer; a diode component that is connected to the second electrode layer of the PTC component; a first conductive lead that is bonded to the first electrode layer of the PTC component; and a second conductive lead that is bonded to the diode component. The PTC component has a rated voltage that ranges between 50% and 250% of a breakdown voltage of the diode component as determined at 1 mA.
    Type: Grant
    Filed: January 6, 2021
    Date of Patent: May 17, 2022
    Assignee: Fuzetec Technology Co., Ltd.
    Inventors: Jack Jih-Sang Chen, Chang-Hung Jiang
  • Patent number: 11322280
    Abstract: A chip resistor includes a substrate, a resistor layer, a first conductive layer, an insulating layer, a second conductive layer, a third conductive layer, and a fourth conductive layer. The first conductive layer is electrically connected to the resistor layer. The insulating layer covers the resistor layer and the first conductive layer. The second conductive layer covers the first conductive layer and the insulating layer. The third conductive layer covers the second conductive layer and the insulating layer. The fourth conductive layer covers the second conductive layer and the third conductive layer. Bonding strength between the third and fourth conductive layer is stronger than that between the second and fourth conductive layer.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: May 3, 2022
    Assignee: ROHM CO., LTD.
    Inventor: Takanori Shinoura
  • Patent number: 11324121
    Abstract: The method includes the steps of preparing at least three conductive elongated boards 711 made of an electrically conductive material and a resistive member 702 made of a resistive material, arranging the at least three conductive elongated boards 711 apart from each other along a width direction crossing a longitudinal direction in which one of the at least three conductive elongated boards 711 is elongated, forming a resistor aggregate 703 by bonding the resistive member 702 to the at least three conductive elongated boards 711, and collectively dividing the resistor aggregate 703 into a plurality of chip resistors by punching so that each of the chip resistors includes two electrodes and a resistor portion bonded to the two electrodes.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: May 3, 2022
    Assignee: ROHM CO., LTD.
    Inventor: Kentaro Naka
  • Patent number: 11313735
    Abstract: A thermistor sintered body and a temperature sensor element that can adjust a resistance value in a wider range while suppressing an influence on a B constant. A thermistor sintered body of the present invention includes: a Y2O3 phase as a main phase; and a Y(Cr/Mn)O3 phase as a subphase, wherein a chemical composition of Cr, Mn, Ca, Pr and Y excluding oxygen includes one or two of Cr: 20 mol % or less and Mn: 20 mol % or less, Ca: 1 to 15 mol %, and Pr: 0.5 to 30 mol %, with the balance being unavoidable impurities and Y. In the present invention, preferably, the subphase is a Y(Cr,Mn)O3 phase or a YCrO3 phase, and Pr is dissolved in the Y(Cr,Mn)O3 phase or the YCrO3 phase.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: April 26, 2022
    Assignee: SHIBAURA ELECTRONICS CO., LTD.
    Inventors: Akitaka Takeuchi, Naohiro Niizeki
  • Patent number: 11315708
    Abstract: A chip resistor includes: an insulating substrate; a resistor portion disposed on one surface of the insulating substrate and including a plurality of resistor bodies spaced apart from each other and a plurality of internal electrodes connecting the plurality of resistor bodies to each other; and a first external electrode and a second external electrode disposed on the one surface of the insulating substrate to be spaced apart from each other and respectively connected to the resistor portion, wherein each of the plurality of resistor bodies has a first end adjacent to the first external electrode and a second end opposing the first end and adjacent to the second external electrode, and each of the first end and the second end of each of the plurality of resistor bodies is connected to one of the plurality of internal electrodes, the first external electrode, or the second external electrode.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: April 26, 2022
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Kwang Hyun Park, Ah Ra Cho
  • Patent number: 11315709
    Abstract: Provided are metal oxide varistors comprising a sintered ceramic, in which the ceramic comprises, by weight, about 91.0% to about 97.0% ZnO, at least 0.3% Mn, at least 0.4% Bi, at least 1.0% Sb, and 0.50% or less Co. The metal oxide varistors as disclosed herein may exhibit reduced power dissipation, improved thermal stability, and may be produced at a lower cost relative to conventional MOV devices.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: April 26, 2022
    Assignee: Hubbell Incorporated
    Inventor: Stephen Franklin Poterala
  • Patent number: 11302462
    Abstract: A method of manufacturing resistor units that each comprise a carrier comprising resistor elements including ends with a respective first and second electrical terminal is disclosed. The method includes: a) providing a carrier plate; b) forming strips of a resistor material at the lower side of the carrier plate in a regular pattern such that a respective row of strips of the resistor material is formed along a longitudinal direction; c) forming a plurality of zones of an electrically conductive material at the lower side of the carrier plate in a regular pattern such that a respective row of zones of the electrically conductive material is formed along the longitudinal direction; and d) cutting through the carrier plate by regular transverse incisions, first longitudinal incisions, and second longitudinal incisions such that a respective resistor unit and a respective residual section are alternately formed along a transverse direction.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: April 12, 2022
    Assignee: VISHAY ELECTRONIC GMBH
    Inventors: Bertram Schott, Ondrej Sobora, Kerstin Tillmann
  • Patent number: 11302464
    Abstract: A chip varistor includes an element body exhibiting varistor characteristics, internal electrodes containing a first electrically conductive material, and an intermediate conductor containing a second electrically conductive material. The intermediate conductor is separated from the internal electrodes in a direction in which the internal electrodes oppose each other, and is disposed between the internal electrodes. At least a part of the intermediate conductor overlaps the internal electrodes in the direction in which the internal electrodes oppose each other. The element body includes a low resistance region in which the second electrically conductive material is diffused. The low resistance region is located between the first and second internal electrodes in the direction in which the first and second internal electrodes oppose each other.
    Type: Grant
    Filed: April 14, 2021
    Date of Patent: April 12, 2022
    Assignee: TDK CORPORATION
    Inventors: Satoshi Goto, Naoyoshi Yoshida, Takeshi Yanata, Takeshi Oyanagi, Daiki Suzuki, Shin Kagaya, Masayuki Uchida, Yusuke Imai
  • Patent number: 11295879
    Abstract: A surge arrester includes a polymer body or housing and a varistor assembly in the body or housing. The varistor assembly includes a plurality of varistor elements and a fuse electrically connected in series and forming a vertical stack of the plurality of varistor elements and the fuse. The stack has a first end surface, a second end surface, and a side surface extending between the first end surface and the second end surface. The varistor assembly includes a first end fitting at the first end surface of the stack and a second end fitting at the second end surface of the stack.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: April 5, 2022
    Assignee: TE CONNECTIVITY SERVICES GMBH
    Inventor: Senthil A. Kumar
  • Patent number: 11295877
    Abstract: A potentiometer comprises a cylindrical case (2) having an upper edge portion (3) and housing an electric adjustment device (5) enclosing a variable resistance, means (8) for the electrical connection of the electrical adjustment device (5) to the circuit to be controlled, a knob (9) partially inserted into the case (2), a drive shaft (10) at least partially housed in the case (2) with a first end (11) associated with the knob (9) to be integral in rotation therewith and a second end (12) interacting with the variable resistance to vary the instantaneous value thereof upon the rotation of the shaft (10). The electric adjustment device (5) comprises a box-like housing (14) coupled to the electrical connection means (8) and housing the variable resistance and having a longitudinal passing-through hole (15) suitable for snugly fit the second end (12) of the shaft (10).
    Type: Grant
    Filed: April 19, 2019
    Date of Patent: April 5, 2022
    Assignee: PIZZATO ELETTRICA S.R.L.
    Inventors: Marco Pizzato, Simone Zonta