Abstract: An integrated circuit is provided. A gate dielectric and a gate are provided respectively on and over a semiconductor substrate. A junction is formed adjacent the gate dielectric and a shaped spacer is formed around the gate. A spacer is formed under the shaped spacer and a liner is formed under the spacer. A first dielectric layer is formed over the semiconductor substrate, the shaped spacer, the spacer, the liner, and the gate. A second dielectric layer is formed over the first dielectric layer. A local interconnect opening is formed in the second dielectric layer down to the first dielectric layer. The local interconnect opening in the first dielectric layer is opened to expose the junction in the semiconductor substrate and the first gate. The local interconnect openings in the first and second dielectric layers are filled with a conductive material.

Abstract: An electronic package 100 comprising a semiconductor device 105, a heat spreader layer 110, and a thermal interface material layer 115 located between the semiconductor device and the heat spreader layer. The thermal interface material layer includes a resin layer 120 having heat conductive particles 125 suspended therein. A portion of the particles are exposed on at least one non-planar surface 135 of the resin layer such that the portion of exposed particles 130 occupies a majority of a total area of a horizontal plane 140 of the non-planar surface.

Abstract: In a GaN-based semiconductor device, an active layer of a GaN-based semiconductor is formed on a silicon substrate. A trench is formed in the active layer and extends from a top surface of the active layer to a depth reaching the silicon substrate. A first electrode is formed on an internal wall surface of the trench and extends from the top surface of the active layer to the silicon substrate. A second electrode is formed on the active layer to define a current path between the first electrode and the second electrode via the active layer in an on-state of the device. A bottom electrode is formed on a bottom surface of the silicon substrate and defines a bonding pad for the first electrode. The first electrode is formed of metal in direct ohmic contact with both the silicon substrate and the active layer.

Abstract: A plasma torch rotation assembly for relieving stress on a lead. The rotation assembly can include an outer housing, which can have a mounting surface adapted to be fixedly coupled to a torch mount. The rotation assembly can include an inner component disposed at least partially within the outer housing, and a bearing structure disposed between the outer housing and the inner component. The bearing structure can facilitate rotational movement of the outer housing relative to the inner component, about a longitudinal axis of the rotation assembly. The rotation assembly can include a torch adapter disposed near a first end of the inner component. The torch adapter can be adapted to mate with a plasma arc torch. The rotation assembly can include a receiving portion disposed at a second end of the inner component, the receiving portion adapted to receive at least a portion a lead.

Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a device over a substrate including a bond wire pad row located between a perimeter of the substrate and the device; configuring the bond wire pad row to include three sided bond wire pads that horizontally overlap; and forming an interconnection between the device and the bond wire pad row.

Abstract: A light emitting device includes a substrate having a surface region and a light emitting diode overlying the surface region. The light emitting diode is fabricated on a semipolar or nonpolar GaN containing substrate and emits electromagnetic radiation of a first wavelength. The diode includes a quantum well region characterized by an electron wave function and a hole wave function. The electron wave function and the hole wave function are substantially overlapped within a predetermined spatial region of the quantum well region. The device has a transparent phosphor overlying the light emitting diode. The phosphor is excited by the substantially polarized emission to emit electromagnetic radiation of a second wavelength.

Abstract: Thin freestanding nitride films are used as a growth substrate to enhance the optical, electrical, mechanical and mobility of nitride based devices and to enable the use of thick transparent conductive oxides. Optoelectronic devices such as LEDs, laser diodes, solar cells, biomedical devices, thermoelectrics, and other optoelectronic devices may be fabricated on the freestanding nitride films. The refractive index of the freestanding nitride films can be controlled via alloy composition. Light guiding or light extraction optical elements may be formed based on freestanding nitride films with or without layers. Dual sided processing is enabled by use of these freestanding nitride films. This enables more efficient output for light emitting devices and more efficient energy conversion for solar cells.

Abstract: An electrode assembly and welding system and method. An electrode assembly preferably includes an electrode mounting block, a weld electrode disposed in said mounting block with a first end extending therefrom for contact with a work piece or a projection weld nut, an insulating bushing separating the weld electrode from direct contact with the mounting block, and a contacting electrode floatingly installed into a receiving cavity located in a second end of the weld electrode, the contacting electrode provided for contact by a gun arm electrode of a weld gun. A system and method of the present invention makes use of cooperating electrode assemblies to weld projection weld nuts to a fixtured work piece. Welding current is transferred from the electrodes of a weld gun to the projection weld nut(s) and work piece via the contacting electrodes and weld electrodes of associated electrode assemblies.

Abstract: There is provided a light emitting device which makes it possible to reduce optical loss and improve brightness by increasing a ratio of fluorescent light that is not reabsorbed by a light emitting element while decreasing a ratio of scattered light that is reabsorbed by the light emitting element. Individual faces forming outer faces of the light emitting element 2 are in contact with a bonding member 3 or sealing member 4. The bonding member 3 and the sealing member 4 contain a fluorophor. Emitted light emitted from the faces of the light emitting element 2 is transformed into fluorescent light by the fluorophor. Therefore, the ratio of scattered light that is not transformed from the emitted light into the fluorescent light can be decreased while the ratio of fluorescent light is increased.

Abstract: An object is to reduce the adverse influence which a portion of a gate insulating layer where the thickness has decreased, that is, a step portion, has on semiconductor element characteristics so that the reliability of the semiconductor element is improved. A semiconductor layer is formed over an insulating surface; a side surface of the semiconductor layer is oxidized using wet oxidation to form a first insulating layer; a second insulating layer is formed over the semiconductor layer and the first insulating layer; and a gate electrode is formed over the semiconductor layer and the first insulating layer with the second insulating layer interposed therebetween.

Abstract: A thin film transistor (TFT) includes a substrate, a semiconductor layer disposed on the substrate and crystallized using a metal catalyst, a gate insulating layer disposed on the semiconductor layer, a gate electrode disposed on the gate insulating layer, an interlayer insulating layer disposed on the gate electrode, and source and drain electrodes disposed on the interlayer insulating layer and electrically connected to source and drain regions of the semiconductor layer through contact holes exposing predetermined regions of the source and drain regions of the semiconductor layer formed within the gate insulating layer and the interlayer insulating layer. A metal silicide including a metal that is different from the metal catalyst is present within a region of the semiconductor layer under the contact hole from the surface of the semiconductor layer to a predetermined depth.

Abstract: Resistive memory and methods of processing resistive memory are described herein. One or more method embodiments of processing resistive memory include forming a resistive memory cell material on an electrode having an access device contact, and forming a heater electrode on the resistive memory cell material after forming the resistive memory cell material on the electrode such that the heater electrode is self-aligned to the resistive memory cell material.

Abstract: A semiconductor device includes: a SOI substrate including a support layer, a first insulation film and a SOI layer; a first circuit; a second circuit; and a trench separation element. The SOI substrate further includes a first region and a second region. The first region has the support layer, the first insulation film and the SOI layer, which are stacked in this order, and the second region has only the support layer. The trench separation element penetrates the support layer, the first insulation film and the SOI layer. The trench separation element separates the first region and the second region. The first circuit is disposed in the SOI layer of the first region. The second circuit is disposed in the support layer of the second region.

Abstract: A welding system and method includes a main torch including a main electrode configured to form a first arc with a base metal; a first bypass torch including a first bypass electrode configured to form a second arc with the main electrode; and a second bypass torch including a second bypass electrode configured to form a third arc with the main electrode.

Abstract: A nonvolatile memory device includes a device isolation pattern, a charge trap layer, and a plurality of word lines. The device isolation pattern defines an active region in a semiconductor substrate and extends in a first direction. The charge trap layer covers the active region and the device isolation pattern. The word lines on the charge trap layer cross the active region and extend in a second direction. The charge trap layer disposed in a first region where the word line and the active region cross each other has a different nitrogen content ratio from the charge trap layer disposed in a second region surrounding the first region.

Abstract: Disclosed is a light emitting diode lamp that has low resistance to heat emitted therefrom. The LED lamp may include a heat coupling member thermally coupling a top part of a first lead to a top part of a second lead. The LED lamp may further include one or more top parts for lowering thermal resistance of the LED lamp. This configuration facilitates heat transfer from the first lead having an LED chip mounted thereon to the top part of the second lead and/or to the other top parts, lowering resistance to heat emitted from the LED lamp.

Abstract: A method of forming a high-K gate stack for a MOSFET device to control the threshold voltage for the MOSFET device. A first high-K metallic oxide layer is formed on a semiconductor substrate. At least one composite layer is then formed directly on the first layer. The composite layer is composed of a second high-K metallic oxide layer formed directly on a dipole induction layer. The dipole induction layer includes a high-K metallic oxide having higher oxygen vacancy affinity and lower oxygen vacancy diffusivity than the first and second layers. A metallic gate electrode is then formed on the composite layer. Formation of the various layers is such as to position the dipole induction layer of the composite layer between the gate electrode and substrate so as to shift the threshold voltage to a desired level. A high-K gate stack in a MOSFET device formed by the above method is also provided.

Abstract: The present memory device includes first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the passive layer and the second electrode. In undertaking an operation on the memory device, ions moves into within and from within the active layer, and the active layer is oriented so that the atoms of the active layer provide minimum obstruction to the movement of the ions into, within and from the active layer.

Abstract: A wireless headset is adapted to communicate with a sound source such as a music player or a cell phone or a suitable audio or sound communicated through a one-way or two-way communication device. The headset includes a mouth wearable communicator; and a linking unit coupled to the mouth wearable communicator, the linking unit adapted to communicate with the sound source.

Abstract: A light-emitting gallium nitride-based III-V group compound semiconductor device and a manufacturing method thereof are disclosed. The light emitting device includes a substrate, a n-type semiconductor layer over the substrate, an active layer over the n-type semiconductor layer, a p-type semiconductor layer over the active layer, a conductive layer over the p-type semiconductor layer, a first electrode disposed on the conductive layer and a second electrode arranged on exposed part of the n-type semiconductor layer. A resistant reflective layer or a contact window is disposed on the p-type semiconductor layer, corresponding to the first electrode so that current passes beside the resistant reflective layer or by the contact window to the active layer for generating light. When the light is transmitted to the conductive layer for being emitted, it is not absorbed or shielded by the first electrode. Thus the current is distributed efficiently over the conductive layer.