Patents Examined by Matthew Gordon
  • Patent number: 9899417
    Abstract: A semiconductor structure includes a semiconductor substrate, a layer of electrically insulating material above the semiconductor substrate, and a layer of semiconductor material above the layer of electrically insulating material. A first transistor includes a first source region, a first drain region, and a first channel region formed in the semiconductor substrate, a first gate insulation layer positioned above the first channel region, and an electrically conductive first gate electrode, wherein the first gate insulation layer includes a first portion of the electrically insulating material. A second transistor includes a second source region, a second drain region, and a second channel region formed in the layer of semiconductor material, a second gate insulation layer positioned above the second channel region, and an electrically conductive second gate electrode, wherein a second portion of the layer of electrically insulating material is positioned below the second channel region.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: February 20, 2018
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Stefan Flachowsky, Ralf Illgen
  • Patent number: 9899372
    Abstract: A method is presented for forming a semiconductor structure. The method includes forming a plurality of fins on a first region of the semiconductor substrate, forming a bi-polymer structure, selectively removing the first polymer of the bi-polymer structure and forming deep trenches in the semiconductor substrate resulting in pillars in a second region of the semiconductor structure. The method further includes selectively removing the second polymer of the bi-polymer structure, doping the pillars, and depositing a high-k metal gate (HKMG) over the first and second regions to form the MIS capacitor in the second region of the semiconductor substrate.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: February 20, 2018
    Assignee: International Business Machines Corporation
    Inventors: Zhenxing Bi, Kangguo Cheng, Peng Xu, Chen Zhang
  • Patent number: 9899633
    Abstract: The present disclosure provides an OLED display and display module thereof. The OLED display module includes: a cathode plate, an anode plate and a luminance function layer sandwiched in between the cathode plate and the anode plate, and characterized in that multiple reflectivities among multiple layers of the luminance function layer are satisfied with a following relationship, which is a reflectivity of the material of the luminance function layer near to the cathode plate is greatly higher than a reflectivity of another material of the luminance function layer distant from the cathode plate. The display module solves the technical problem of decreasing the contrast and sharpness of the OLED display caused by the cathode plate with the high reflectivity.
    Type: Grant
    Filed: December 25, 2015
    Date of Patent: February 20, 2018
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd
    Inventor: Lixuan Chen
  • Patent number: 9887358
    Abstract: Disclosed are an organic thin film transistor and a method for preparing the same, an array substrate and a display device. An organic semiconductor layer of the organic thin film transistor is formed on an anisotropic insulating layer, this guarantees that the organic semiconductor layer has a crystallization direction with a high degree of order and the organic semiconductor layer has a specific alignment, thus carrier mobility can be improved, so that the performance of the organic thin film transistor can be upgraded. Moreover, the process of preparing the insulating layer has advantages of simple process, large area and low cost, etc., and the thickness of the anisotropic insulating layer manufactured is small; since there exists no mechanical friction, there exists no badness caused by particles generated by friction.
    Type: Grant
    Filed: January 12, 2015
    Date of Patent: February 6, 2018
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Wei Huang
  • Patent number: 9887278
    Abstract: After forming a trench extending through an insulator layer and an underlying top semiconductor portion that is comprised of a first semiconductor material and a dopant of a first conductivity type to define an emitter and a collector on opposite sides of the trench in the top semiconductor portion, an intrinsic base comprising a second semiconductor material having a bandgap less than a bandgap of the first semiconductor material and a dopant of a second conductivity type opposite the first conductivity type is formed in a lower portion the trench by selective epitaxial growth. The intrinsic base protrudes above the top semiconductor portion and is laterally surrounded by entire top semiconductor portion and a portion of the insulator layer. An extrinsic base is then formed on top of the intrinsic base to fill a remaining volume of the trench by a deposition process.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: February 6, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jin Cai, Kevin K. Chan, Christopher P. D'Emic, Tak H. Ning, Jeng-Bang Yau
  • Patent number: 9876092
    Abstract: A semiconductor device of the present invention includes a semiconductor layer including a main IGBT cell and a sense IGBT cell connected in parallel to each other, a first resistance portion having a first resistance value formed using a gate wiring portion of the sense IGBT cell and a second resistance portion having a second resistance value higher than the first resistance value, a gate wiring electrically connected through mutually different channels to the first resistance portion and the second resistance portion, a first diode provided between the gate wiring and the first resistance portion, a second diode provided between the gate wiring and the second resistance portion in a manner oriented reversely to the first diode, an emitter electrode disposed on the semiconductor layer, electrically connected to an emitter of the main IGBT cell, and a sense emitter electrode disposed on the semiconductor layer, electrically connected to an emitter of the sense IGBT cell.
    Type: Grant
    Filed: May 3, 2017
    Date of Patent: January 23, 2018
    Assignee: ROHM CO., LTD.
    Inventor: Akihiro Hikasa
  • Patent number: 9870974
    Abstract: A power conversion apparatus includes: a circuit body including a switching device; a base member forming a first concave portion and a cooling surface; and a wedge inserted in the first concave portion of the base member. The first concave portion of the base member is formed by a substrate portion forming the cooling surface, a first wall disposed on the opposite side of the substrate portion from the cooling surface, and an intermediate portion interconnecting the first wall and the substrate portion. The first wall forms an insertion space for insertion of the wedge, and a heat transfer plane forming a heat dissipating surface and a heat transfer path of the circuit body. The intermediate portion is plastically deformed by inserting the wedge into the insertion space, thus causing the first wall to be displaced toward the location of the circuit body.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: January 16, 2018
    Assignee: Hitachi, Ltd.
    Inventors: Eiichi Ide, Hiroshi Shintani, Hisashi Tanie
  • Patent number: 9871218
    Abstract: Provided are organic light emitting display and manufacturing method of the organic light emitting display. According to an aspect of the present invention, there is provided a organic light emitting display comprising a substrate, a first electrode and a second electrode disposed on the substrate and opposed to each other, at least one organic light emitting layer positioned between the first electrode and the second electrode, and at least one color adjusting layer positioned between the organic light emitting layer and the second electrode.
    Type: Grant
    Filed: April 27, 2015
    Date of Patent: January 16, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Sung Jin Choi
  • Patent number: 9853097
    Abstract: An organic light emitting display in which each pixel has a driving thin film transistor for adjusting the current flowing through an organic light emitting diode based on a voltage applied to a gate electrode, includes the gate electrode of the driving thin film transistor; a signal line adjacent to the gate electrode of the driving thin film transistor; and a first shielding electrode located above the gate electrode of the driving thin film transistor, with a first insulating layer therebetween, wherein the first shielding electrode extends further towards the signal line than the gate electrode of the driving thin film transistor.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: December 26, 2017
    Assignee: LG Display Co., Ltd.
    Inventors: Nakwoo Kim, Jaeho Sim, Donghyun Yeo
  • Patent number: 9853238
    Abstract: A flexible display device is disclosed. In one aspect, the display device includes a substrate, a display unit formed over the substrate and a filler formed over the substrate and the display unit. An encapsulation substrate is formed over the encapsulation substrate, and a barrier layer is formed over the encapsulation substrate. The encapsulation substrate includes a base layer and a plurality of protrusions formed over a first surface of the base layer and spaced apart from each other. The barrier layer is formed over the first surface so as to cover the plurality of protrusions and a portion of the base layer exposed between the plurality of protrusions, and the first surface faces the display unit.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: December 26, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyunjoon Oh, Sangil Park, Hyejin Oh, Jeoungsub Lee, Minhoon Choi
  • Patent number: 9847385
    Abstract: An organic electroluminescent device includes a first transistor, a power supply line layer connected to one current terminal of the first transistor, a capacitive element including a first capacitive electrode connected to a gate of the first transistor, and a second capacitive electrode, a signal line, and a pixel electrode connected to the other current terminal of the first transistor, the first capacitive electrode is provided on a layer over the gate of the first transistor, and the power supply line layer is provided on a layer between the first capacitive electrode and the signal line.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: December 19, 2017
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Hitoshi Ota, Ryoichi Nozawa
  • Patent number: 9847263
    Abstract: A substrate processing method which can increase the yield by reprocessing a substrate whose processing has been interrupted by a processing interruption command during a substrate processing is disclosed. A substrate processing method performs a predetermined processing of a substrate while sequentially transporting the substrate to a plurality of processing sections according to a preset recipe. The substrate processing method includes processing a substrate in one of the processing sections; interrupting the processing of the substrate by a processing interruption command during processing of the substrate; setting the substrate whose processing has been interrupted in a standby state; and customizing the recipe and performing reprocessing of the processing-interrupted substrate according to the customized recipe, or performing reprocessing of the processing-interrupted substrate according to a preset recipe for reprocessing.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: December 19, 2017
    Assignee: EBARA CORPORATION
    Inventors: Hirofumi Otaki, Tsuneo Torikoshi
  • Patent number: 9843011
    Abstract: An organic EL device includes at least two light-emitting units and at least one intermediate electrode that are disposed between a lower electrode and an upper electrode, the at least one intermediate electrode being electrically connected to an external power source. The at least one intermediate electrode is disposed between the at least two light-emitting units. At least one of the at least one intermediate electrode consists of a first metal layer composed of a metal with a work function of 3 eV or lower and a second metal layer adjoining the first metal layer and composed of another metal with a work function of 4 eV or higher. The first and second metal layers have a total thickness of 15 nm or less. The first metal layer is adjacent to an anode side of the second metal layer, when a voltage is applied across the intermediate electrode and the electrode opposing the intermediate electrode.
    Type: Grant
    Filed: October 4, 2013
    Date of Patent: December 12, 2017
    Assignee: KONICA MINOLTA, INC.
    Inventors: Tomoyuki Nakayama, Kazuhiro Yoshida, Hiroshi Ishidai
  • Patent number: 9837443
    Abstract: Provided is a display device, including: a plurality of gate lines extending in a first direction; a plurality of source lines extending in a second direction; a gate driver configured to output a gate signal; and a plurality of gate lead-out lines extending in the second direction and being configured to transmit the gate signal to the plurality of gate lines, in which each of the plurality of gate lines is electrically connected to at least one of the plurality of gate lead-out lines, and at least one of the plurality of gate lines is electrically connected to at least two of the plurality of gate lead-out lines.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: December 5, 2017
    Assignee: Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Tetsuya Kawamura, Hironori Yasukawa
  • Patent number: 9812468
    Abstract: Provided is a display device, including: a plurality of gate lines extending in a first direction; a plurality of source lines extending in a second direction; a gate driver configured to output a gate signal; and a plurality of gate lead-out lines extending in the second direction and being configured to transmit the gate signal to the plurality of gate lines, in which each of the plurality of gate lines is electrically connected to at least one of the plurality of gate lead-out lines, and at least one of the plurality of gate lines is electrically connected to at least two of the plurality of gate lead-out lines.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: November 7, 2017
    Assignee: Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Tetsuya Kawamura, Hironori Yasukawa
  • Patent number: 9812393
    Abstract: Programmable via devices and fabrication methods thereof are presented. The programmable via devices include, for instance, a first metal layer and a second metal layer electrically connected by a via link. The via link includes a semiconductor portion and a metal portion, where the via link facilitates programming of the programmable via device by applying a programming current through the via link to migrate materials between the semiconductor portion and the metal portion to facilitate a change of an electrical resistance of the via link. In one embodiment, the programming current facilitates formation of at least one gap region within the via link, the at least one gap region facilitating the change of the electrical resistance of the via link.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: November 7, 2017
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Ajey P. Jacob, Suraj K. Patil, Min-hwa Chi
  • Patent number: 9812580
    Abstract: An integrated circuit may include a gate, having gate fingers. The integrated circuit may also include a body, having semiconductor pillars interlocking with the gate fingers of the gate. The integrated circuit may also include a backside contact(s) coupled to the body. The integrated circuit may further include a backside metallization. The backside metallization may be coupled to the body through the backside contact(s).
    Type: Grant
    Filed: September 6, 2016
    Date of Patent: November 7, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Sinan Goktepeli, Steve Fanelli
  • Patent number: 9806001
    Abstract: A semiconductor package can include a semiconductor die having an integrated circuit, a first die surface, and an opposite second die surface. A packaging can be attached to the die and have a holder surface opposite the first die surface. A heat spreader can be configured to cover the second die surface and the packaging surface and can be attached thereto by a layer of adhesive positioned between the heat spreader and the semiconductor die. A semiconductor package array can include an array of semiconductor dies and a heat spreader configured to cover each semiconductor die. A conductive lead can be electrically connected to the integrated circuit in a semiconductor die and can extend from the first die surface. Manufacturing a semiconductor package can include applying thermally conductive adhesive to the heat spreader and placing the heat spreader proximate the semiconductor die.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: October 31, 2017
    Assignee: Volterra Semiconductor LLC
    Inventors: Mihalis Michael, Ilija Jergovic
  • Patent number: 9799851
    Abstract: The present invention relates to the field of display, and discloses an organic light emitting diode array substrate, a manufacturing method thereof, and a display device, for the purposes of enlarging the color gamut of a display device and improving display quality. The organic light emitting diode array substrate comprises a substrate and multiple micro-cavity organic light emitting diodes which are disposed on the substrate and are arranged in arrays; wherein an angle exists between a light emitting surface of at least one micro-cavity organic light emitting diode and the plane of the substrate. In the embodiments of the invention, an angle exists between a light emitting surface of at least one micro-cavity organic light emitting diode and the plane of the substrate, such that the light with shorter wavelengths in the spectrum of the micro-cavity organic light emitting diode can be emitted in the direction of direct vision.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: October 24, 2017
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Wenyu Ma
  • Patent number: 9793446
    Abstract: Composites having semiconductor structures embedded in a matrix are described. In an example, a composite includes a matrix material. A plurality of semiconductor structures is embedded in the matrix material. Each semiconductor structure includes an anisotropic nanocrystalline core composed of a first semiconductor material. Each semiconductor structure also includes a nanocrystalline shell composed of a second, different, semiconductor material at least partially surrounding the anisotropic nanocrystalline core. An insulator layer encapsulates each nanocrystalline shell and anisotropic nanocrystalline core pairing.
    Type: Grant
    Filed: April 13, 2015
    Date of Patent: October 17, 2017
    Assignee: Pacific Light Technologies Corp.
    Inventors: Juanita Kurtin, Brian Theobald, Matthew J. Carillo, Oun-Ho Park, Georgeta Masson, Steven M. Hughes