Abstract: A quantum device (100) includes: an interposer (112); a quantum chip (111); and a connection part (130) that is provided between the interposer (112) and the quantum chip (111) and electrically connects a wiring layer of the interposer (112) to a wiring layer of the quantum chip (111), in which the connection part (130) includes: a plurality of pillars (131) arranged on a main surface of the interposer (112); and a metal film (132) provided on a surface of the plurality of pillars (131) in such a way that it contacts the wiring layer of the quantum chip (111) and the thickness of the metal film at outer peripheral parts of the tip of each of the plurality of pillars (131) becomes larger than the thickness of the metal film at a center part of the tip of each of the plurality of pillars (131).

Abstract: The present disclosure discloses a high-fidelity superconducting circuit structure, a superconducting quantum chip, and a superconducting quantum computer, which relate to the field of quantum computation. The specific implementation is as follows: computation qubits; a coupling device configured to be coupled with two computation qubits, respectively; a connecting component disposed between a computation qubit and the coupling device to couple the computation qubit with the coupling device, so as to implement a target quantum gate based on the coupling device and the computation qubit.

Abstract: The present disclosure describes non-classical (e.g., quantum) computing systems and methods that utilize dopant molecules contained in host materials as qubits.

Abstract: A method of generating a photon with multiple dimensions includes a step of generating a first photon encoded with quantum information in each of two or more frequency bins and at least one time bin. The method further includes performing a frequency dependent time operation to entangle (i.e. make non-separable) the frequency bins and the time bins in the photon.

Abstract: Apparatus and circuits with dual threshold voltage transistors and methods of fabricating the same are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a substrate; a first layer comprising a first III-V semiconductor material formed over the substrate; a first transistor formed over the first layer, and a second transistor formed over the first layer. The first transistor comprises a first gate structure comprising a first material, a first source region and a first drain region. The second transistor comprises a second gate structure comprising a second material, a second source region and a second drain region. The first material is different from the second material.

Abstract: Devices, systems, methods, and/or computer-implemented methods that can facilitate a qubit device comprising a vacuum encapsulated Josephson junction are provided. According to an embodiment, a device can comprise a substrate having an encapsulated vacuum cavity provided on the substrate. The device can further comprise one or more superconducting components of a superconducting circuit provided inside the encapsulated vacuum cavity.

Abstract: A system that includes: an array of qubits, each qubit of the array of qubits comprising a first electrode corresponding to a first node and a second electrode corresponding to a second node, wherein, for a first qubit in the array of qubits, the first qubit is positioned relative to a second qubit in the array of qubits such that a charge present on the first qubit induces a same charge on each of the first node of the second qubit and the second node of the second qubit, such that coupling between the first qubit and the second qubit is reduced, and wherein none of the nodes share a common ground is disclosed.

Abstract: Various embodiments of the present disclosure are directed towards a method for manufacturing a microelectromechanical systems (MEMS) device. The method includes forming a particle filter layer over a carrier substrate. The particle filter layer is patterned while the particle filter layer is disposed on the carrier substrate to define a particle filter in the particle filter layer. A MEMS substrate is bonded to the carrier substrate. A MEMS structure is formed over the MEMS substrate.

Abstract: Embodiments include a transistor device that comprises a gate electrode and a gate dielectric surrounding the gate electrode. In an embodiment, a source region may be below the gate electrode and a drain region may be above the gate electrode. In an embodiment, a channel region may be between the source region and the drain region. In an embodiment, the channel region is separated from a sidewall of the gate electrode by the gate dielectric. In an embodiment, a capacitor may be electrically coupled to the drain region.

Abstract: An optoelectronic module may include one or more non-rectangular optoelectronic dies e.g., light emitting diodes and photodiodes, arranged to maximize the usage of surface area when mounted to a base circuit board. Multi-axis and non-orthogonal axis dicing processes can be used to form the dies which have non-rectangular shapes.

Abstract: A method of modifying a resonant frequency of a quantum device includes generating an ion beam having a beam energy and exposing a surface of the quantum device to the ion beam for an exposure time. The ion beam is incident onto the quantum device at an oblique angle that is less than 90 degrees as measured from the surface of the quantum device. The quantum device includes a Josephson junction, the ion beam exposing the quantum device proximate to the Josephson junction to modify a property of the Josephson junction, the property being associated with the resonant frequency of the quantum device.

Abstract: A method for processing a semiconductor device with two closely space gates comprises forming a template structure, wherein the template structure includes at least one sub-structure having a dimension less than the CD. The method further comprises forming a gate layer on and around the template structure. Then, the method comprises removing the part of the gate layer formed on the template structure, and patterning the remaining gate layer into a gate structure including the two gates. Further, the method comprises selectively removing the template structure, wherein the spacing between the two gates is formed by the removed sub-structure.

Abstract: Systems and techniques that facilitate mode-selective couplers for frequency collision reduction are provided. In various embodiments, a device can comprise a control qubit. In various aspects, the device can comprise a first target qubit coupled to the control qubit by a first mode-selective coupler. In various instances, the first mode-selective coupler can facilitate A-mode coupling between the control qubit and the first target qubit. In various embodiments, the device can comprise a second target qubit coupled to the control qubit by a second mode-selective coupler. In various aspects, the second mode selective coupler can facilitate B-mode coupling between the control qubit and the second target qubit. In various embodiments, the first mode-selective coupler can comprise a capacitor that capacitively couples a middle capacitor pad of the control qubit to a middle capacitor pad of the first target qubit.

Abstract: A circuit element is formed on a substrate made of a compound semiconductor. A bonding pad is disposed on the circuit element so as to at least partially overlap the circuit element. The bonding pad includes a first metal film and a second metal film formed on the first metal film. A metal material of the second metal film has a higher Young's modulus than a metal material of the first metal film.

Abstract: A quantum circuit called a “qumon” is provided to cancel unwanted ZZ interaction in a superconducting qubit architecture. The qumon qubit has a high coherence, and a positive anharmonicity that may be tuned to cancel the negative anharmonicity in a coupled qubit, such as a transmon qubit. The qumon has three parallel branches, in which are a shunt capacitor; a Josephson junction having weighted energy level and capacitance; and several Josephson junctions in series. The weight is chosen to provide the desired anharmonicity, and the transverse flux noise and transverse charge noise each decrease in proportion to the number of the Josephson junctions in series. Because unwanted ZZ interactions are canceled, qumon qubits and transmon qubits may be capacitively coupled in an alternating pattern to provide a surface code in which these interactions are canceled in an extensible way.

Abstract: A quantum processing system is disclosed. In one embodiment, a quantum processing system comprises: a plurality of donor atoms positioned in a silicon crystal substrate, each donor atom positioned at a donor site; and a plurality of conductive control electrodes arranged about the donor atoms to operate the donor atoms as qubits. Where, at least two pairs of nearest neighbour donor atoms of the plurality of donor atoms are arranged along the [110] direction of the silicon crystal substrate and are configured to operate as qubits.

Abstract: Fabricating a steep-switch transistor includes receiving a semiconductor structure including a substrate, a fin disposed on the substrate, a source/drain disposed on the substrate adjacent to the fin, a gate disposed upon the fin, a cap disposed on the gate, and a trench extending to the source/drain. A trench contact is formed in the trench in contact with the source/drain. A recess is formed in a portion of the trench contact below a top surface of the cap using a recess patterning process. A bi-stable resistive system (BRS) material is deposited in the recess in contact with the portion of the trench contact. A source/drain contact is formed upon the BRS material, a portion of the trench contact, the BRS material, and a portion of the source/drain contact forming a reversible switch.

Abstract: In some embodiments, a semiconductor device is provided. The semiconductor device includes a semiconductor substrate having a first semiconductor material layer separated from a second semiconductor material layer by an insulating layer. A source region and a drain region are disposed in the first semiconductor material layer and spaced apart. A gate electrode is disposed over the first semiconductor material layer between the source region and the drain region. A first doped region having a first doping type is disposed in the second semiconductor material layer, where the gate electrode directly overlies the first doped region. A second doped region having a second doping type different than the first doping type is disposed in the second semiconductor material layer, where the second doped region extends beneath the first doped region and contacts opposing sides of the first doped region.

Abstract: Methods, systems and apparatus for forming Josephson junctions with reduced stray inductance. In one aspect, a device includes a substrate; a first superconductor layer on the substrate; an insulator layer on the first superconductor layer; a second superconductor layer on the insulator layer, wherein the first superconductor layer, the insulator layer, and the second superconductor layer form a superconductor tunnel junction; and a third superconductor layer directly on a surface of the first superconductor layer and directly on a surface of the second superconductor layer to provide a first contact to the superconducting tunnel junction and a second contact to the superconductor tunnel junction, respectively.

Abstract: A superconducting device includes a substrate, a metal oxide or metal oxynitride seed layer on the substrate, and a metal nitride superconductive layer disposed directly on the seed layer. The seed layer is an oxide or oxynitride of a first metal, and the superconductive layer is a nitride of a different second metal.