Patents Examined by Metasebia T Retebo
  • Patent number: 11979144
    Abstract: The present invention provides a driving circuit for a driving hip. The driving circuit includes a bootstrap circuit with a bootstrap voltage terminal. A power terminal of a high-voltage driving circuit is connected to the bootstrap voltage terminal, and a ground terminal of the high-voltage driving circuit is connected to a regulating terminal. A high-side drive circuit includes a high-side pull-up circuit and a high-side pull-down circuit. The driving circuit includes: an auxiliary power terminal; a mirror current source an input terminal of the mirror current source being connected to the bootstrap voltage terminal; a first MOS transistor; a second MOS transistor an equivalent diode component, an output terminal of the second MOS transistor being connected to the regulating terminal through the equivalent diode component; and an equivalent resistance component, the gate of the first MOS transistor being connected to the regulating terminal through the equivalent resistance component.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: May 7, 2024
    Assignee: SUZHOU NOVOSENSE MICROELECTRONICS CO., LTD.
    Inventors: Tao Lin, Shaoyu Ma, Yun Sheng
  • Patent number: 11979143
    Abstract: A circuit includes a high-side transistor pair and a low-side transistor pair having a common intermediate node. The high-side transistor pair includes a first transistor having a control node and a current flowpath therethrough configured to provide a current flow line between a supply voltage node and the intermediate node, and a second transistor having a current flowpath therethrough coupled to the control node of the first transistor. The low-side transistor pair includes a third transistor having a control node and a current flowpath therethrough configured to provide a current flow line between the intermediate node and the reference voltage node, and a fourth transistor having a current flowpath therethrough coupled to the control node of the third transistor. Testing circuitry is configured to be coupled to at least one of the second transistor and the fourth transistor to apply thereto a test-mode signal.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: May 7, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Nicola Errico, Valerio Bendotti, Luca Finazzi, Gaudenzia Bagnati
  • Patent number: 11962302
    Abstract: A semiconductor device includes a magnetic switch provided on a semiconductor substrate. The magnetic switch includes: a Hall element, first and second power supply terminals; a current source driving the Hall element; a switch circuit switching a differential output voltage supplied from two electrodes of the Hall element to a first or second state based on a control signal supplied from a control terminal; an amplifier amplifying a signal from the switch circuit; a reference voltage circuit generating a reference voltage based on a reference common mode voltage and a control signal; a comparator receiving an output signal of the amplifier and the reference voltage; and a latch circuit latching an output voltage of the comparator. The reference voltage of the reference voltage circuit is controlled by switching from a reference value to a voltage with a high or low adjustment value according to the output voltage of the comparator.
    Type: Grant
    Filed: March 9, 2022
    Date of Patent: April 16, 2024
    Assignee: ABLIC Inc.
    Inventor: Tomoki Hikichi
  • Patent number: 11962292
    Abstract: A gate driving device includes an operational amplifier, two impedances, a multiplexer, and an UVLO circuit. The operational amplifier has an output coupled to the gate of the SiC MOSFET, a positive power terminal coupled to a positive power rail, and a negative power terminal coupled to a negative power rail. The impedances are coupled in series and coupled between the output of the amplifier and a low-voltage terminal. The UVLO circuit is coupled to the multiplexer and the positive power rail and coupled to the positive power voltage of the positive power rail, a driving voltage, and an UVLO voltage. The UVLO circuit controls the multiplexer to transmit an off voltage or an on voltage to the positive input of the operational amplifier based on the positive power voltage, the driving voltage, and the UVLO voltage, thereby turning on or off the SiC MOSFET.
    Type: Grant
    Filed: October 28, 2022
    Date of Patent: April 16, 2024
    Assignee: TAIPEI ANJET CORPORATION
    Inventors: Man Hay Pong, Wen-Chin Wu
  • Patent number: 11955974
    Abstract: This disclosure is directed to a dual gate metal oxide semiconductor field effect transistor (MOSFET) device formed in a semiconductor material, as well as circuits and techniques for using the dual gate MOSFET device. In some examples, the dual gate MOSFET device may comprise a first MOSFET formed in the semiconductor material, and a second MOSFET formed in the semiconductor material, wherein the first MOSFET and the second MOSFET are arranged in parallel in the semiconductor material, wherein the first MOSFET and the second MOSFET include a common drain node and a common source node, and wherein the first MOSFET and the second MOSFET define different transfer characteristics.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: April 9, 2024
    Assignee: Infineon Technologies AG
    Inventors: Dirk Ahlers, Manuel Wilke, Benjamin Schmidt, Jonas Groenvall
  • Patent number: 11955962
    Abstract: A circuit for driving the voltage of a capacitive element between two voltage levels has at least one driver cell with a first pair of switches connected in series between a first terminal of a voltage source and the capacitive element, and a second pair of switches connected in series between a second terminal of the voltage source and the capacitive element. A plurality of non-dissipative elements may be connected in parallel or in series between the first pair of switches and the second pair of switches. Combinations of switches from the driver cells may be activated and deactivated in a defined sequence to provide step-wise transfer of energy to the capacitive element. The defined sequence may have a switching pattern with a voltage change portion arranged to cause a change in an output voltage of the capacitive element driver during application thereof on the capacitive element driver.
    Type: Grant
    Filed: December 28, 2022
    Date of Patent: April 9, 2024
    Assignee: NEOLITH LLC
    Inventors: Tsz Yin Man, Chi Fan Yung, Bruce C. Larson
  • Patent number: 11948897
    Abstract: Integrated circuits (ICs) that avoid or mitigate creation of changes in accumulated charge in a silicon-on-insulator (SOI) substrate, particularly an SOI substrate having a trap rich layer. In one embodiment, a FET is configured such that, in a standby mode, the FET is turned OFF while maintaining essentially the same VDS as during an active mode. In another embodiment, a FET is configured such that, in a standby mode, current flow through the FET is interrupted while maintaining essentially the same VGS as during the active mode. In another embodiment, a FET is configured such that, in a standby mode, the FET is switched into a very low current state (a “trickle current” state) that keeps both VGS and VDS close to their respective active mode operational voltages. Optionally, S-contacts may be formed in an IC substrate to create protected areas that encompass FETs that are sensitive to accumulated charge effects.
    Type: Grant
    Filed: February 11, 2022
    Date of Patent: April 2, 2024
    Assignee: pSemi Corporation
    Inventors: Robert Mark Englekirk, Keith Bargroff, Christopher C. Murphy, Tero Tapio Ranta, Simon Edward Willard
  • Patent number: 11942963
    Abstract: A follow-hold switch circuit comprising: a follower; a sampling sub-circuit for voltage sampling; a bootstrap-control sub-circuit, which provides a bootstrap voltage to the sampling sub-circuit when the circuit is in a following state; a sampling-switch-control sub-circuit, which provides a common-mode voltage to a bootstrap capacitor in the bootstrap-control sub-circuit when the circuit is in a holding state; the follower is connected to an output of the sampling sub-circuit; the sampling sub-circuit is connected to the bootstrap-control sub-circuit and the sampling-switch-control sub-circuit respectively through a sampling switch; the present disclosure can effectively improve the linearity of sampling switches.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: March 26, 2024
    Assignees: NO. 24 RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION, Chongqing GigaChip Technology Co., Ltd.
    Inventors: Daiguo Xu, Dongbing Fu, Zhengping Zhang, Zhou Yu, Jian'an Wang, Can Zhu, Ruzhang Li, Guangbing Chen, Yuxin Wang, Xueliang Xu
  • Patent number: 11942939
    Abstract: An apparatus for reducing a temperature influence in measuring a switching current based on stray inductance. The apparatus includes a current detector configured to output a voltage derived from a differential component of a current so as to detect a switching current of a power module, a filter configured to filter the voltage output from the current detector, an integrator configured to integrate a voltage output from the filter, an ADC configured to convert an analog voltage output from the integrator into a digital voltage and sample the digital voltage, a scaler configured to convert a sampled integrator output value output from the ADC into a scaled current value, and a compensator configured to remove a temperature dependent DCR effect from the scaled current value.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: March 26, 2024
    Assignee: Hyundai Mobis Co., Ltd.
    Inventor: Sang Min Kim
  • Patent number: 11942940
    Abstract: Systems, apparatuses, and methods for charging a bootstrap capacitor of a device during low power states are described. In an example, an apparatus can include a controller configured to enable a low power state of the device. The device can include a high side switching element and a low side switching element. The controller can, in response to the low power state of the device being enabled, operate the low side switching element of the device to charge the bootstrap capacitor of the device. The controller can, in response to the low power state of the device being enabled and a level of a control signal being a first level, activate the low side switching element to charge the bootstrap capacitor of the device.
    Type: Grant
    Filed: June 11, 2021
    Date of Patent: March 26, 2024
    Assignee: Renesas Electronics America Inc.
    Inventors: Aaron Shreeve, Chun Cheung, Michael Jason Houston, Mehul Shah
  • Patent number: 11942860
    Abstract: Circuits and methods to mitigate or eliminate potentially damaging events (e.g., damaging current spikes from in-rush current, charge transfer current, short circuits, etc.) in DC-DC power converters. Embodiments enable dynamic switching of conversion ratios in reconfigurable power converters while under load without turning off the power converter circuitry or suspending switching of the charge pump power switches. Embodiments selectively increase the ON resistance, RON, for at least some power FETs in a power converter by actively controlling the driver voltage to the gates of the power FETs. During normal operation, the power FET driver voltage may be set to overdrive the FET gate to lower RON to a desired level that allows high current flow. For other scenarios, the power FET driver voltage may be reduced so as to increase RON while ON and thus impede current flow to provide protection against potentially damaging events.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: March 26, 2024
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Antony Christopher Routledge
  • Patent number: 11935608
    Abstract: A signal generation circuit includes: a clock module, configured to generate a clock signal based on a flag signal; a control module, configured to generate a control signal according to number of transitions of the clock signal within a fixed time; and a generation module, respectively connected to the clock module and the control module, and configured to receive the clock signal, the control signal, and the flag signal, and to generate a target signal. When the flag signal changes from a first level to a second level, the target signal changes from a third level to a fourth level. After being maintained at the fourth level for a target duration, the target signal changes from the fourth level to the third level. The generation module is further configured to determine the target duration according to the clock signal and the control signal.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: March 19, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Zequn Huang
  • Patent number: 11936202
    Abstract: The present disclosure provides a signal processing method performed by a hybrid wireless power transmitting apparatus which is configured to transmit wireless power signals based on magnetic resonance and magnetic induction, the method comprising transmitting a first object detection signal via an inductive power transmitting unit and a second object detection signal via a magnetic resonant power transmitting unit alternatively; operating one of the inductive power transmitting unit and the magnetic resonant power transmitting unit which is selected based on an inductive response signal and a resonant response signal corresponding to the first object detection signal and the second object detection signal respectively; and transmitting wireless power signal via the selected power transmitting unit; and a hybrid wireless power transmitting apparatus using the method.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: March 19, 2024
    Assignee: GE Hybrid Technologies, LLC
    Inventors: Chun-Kil Jung, Byong-Uk Hwang
  • Patent number: 11929743
    Abstract: A high-voltage semiconductor switch is provided. The high-voltage semiconductor switch comprises one or more switch subcircuits, wherein each switch subcircuit may comprise one or more FET circuits and voltage-shifting transistor. The high-voltage semiconductor switch may be configured based on operational and environmental requirements, such as those of a quantum computing system, wherein the high-voltage switch may be located in a cryostat or vacuum chamber.
    Type: Grant
    Filed: July 7, 2022
    Date of Patent: March 12, 2024
    Assignee: QUANTINUUM LLC
    Inventors: David A. Deen, Paul M. Werking, Christopher Langer
  • Patent number: 11923711
    Abstract: A system comprises a positive voltage supply node and a negative voltage supply node configured for connection to a load, a power source coupled between the positive voltage supply node and the negative voltage supply node, an energy storage device, a solid-state switch, and a control system. The energy storage device and the solid-state switch are connected in series between the positive voltage supply node and the negative voltage supply node. The control system is configured to control activation and deactivation of the solid-state switch to (i) allow the energy storage device to be discharged and supply power to a load, and to (ii) modulate an amount of charging current that flows through the energy storage device from the power source (or load) to recharge the energy storage device.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: March 5, 2024
    Assignee: AMOGY INC.
    Inventor: Maxwell Spencer Mann
  • Patent number: 11923834
    Abstract: A switch device includes an output transistor, an overcurrent protection circuit configured to be capable of performing an overcurrent protection operation in which magnitude of target current flowing in the output transistor is limited to a predetermined upper limit current value or less, and a control circuit configured to be capable of controlling a state of the output transistor and capable of changing the upper limit current value among a plurality of current values including a predetermined first current value and a predetermined second current value less than the first current value. The control circuit can limit the magnitude of the target current to the first current value or less in response to the magnitude of the target current reaching the first current value, and then change the upper limit current value to the second current value.
    Type: Grant
    Filed: June 1, 2022
    Date of Patent: March 5, 2024
    Assignee: Rohm Co., Ltd.
    Inventor: Tetsuo Yamato
  • Patent number: 11912221
    Abstract: An actuator device with an actuator cup having a first end and a second end. The actuator cup defines a storage chamber containing a pyrotechnic material to produce gas. The storage chamber also includes a coolant. At least one electrical connection coupled to the first end, the electrical connection in reaction initiating communication with the pyrotechnic material. The second end of the actuator cup includes a concave surface before actuation of the pyrotechnic material and during the actuation of the pyrotechnic material the second end transitions from the concave surface to a convex surface.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: February 27, 2024
    Assignee: Autoliv ASP, Inc.
    Inventors: Francois Peremarty, Jeff Kida, Brent Alan Parks, Alan Ralph Larsen, Lutz Staack, Sven Hoffmann
  • Patent number: 11916428
    Abstract: This disclosure includes novel ways of implementing a power supply that powers a load. A main battery source produces a main battery voltage; each of multiple auxiliary battery sources in a set produces a respective auxiliary battery voltage. A controller initially sets a battery supply voltage to the main battery voltage, the main battery voltage is supplied to a power converter. The controller then monitors a magnitude of the battery supply voltage and adjusts the battery supply voltage supplied to the power converter based on a comparison of the magnitude of the battery supply voltage with respect to a threshold level. The adjusted battery supply voltage is provided from a serial connection of the main battery source and a first auxiliary battery source in the set.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: February 27, 2024
    Assignee: Infineon Technologies Austria AG
    Inventors: Luca Peluso, Matthias J. Kasper
  • Patent number: 11916545
    Abstract: A method for operating a normally off or normally on power semiconductor element. A threshold voltage change in a threshold voltage of the power semiconductor element in relation to a reference threshold voltage is determined. A switch-on gate voltage is applied between a gate terminal and a source terminal of the power semiconductor element for the purpose of switching on the power semiconductor element is changed by the threshold voltage change in relation to a reference switch-on gate voltage corresponding to the reference threshold voltage.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: February 27, 2024
    Assignee: Siemens Aktiengesellschaft
    Inventors: Benno Weis, Fabian Diepold
  • Patent number: 11909312
    Abstract: A regulator system includes a multi-bit detector system and a multi-cell charge/discharge circuit. The multi-bit detector system includes a plurality of detectors. Each of the plurality of detectors has a predetermined threshold voltage. The multi-cell charge/discharge circuit includes a plurality of charge pumps. Each of the charge pumps is configured to generate a predetermined charge. Each of the charge pumps is associated with a predetermined threshold voltage of the detector circuit.
    Type: Grant
    Filed: February 23, 2023
    Date of Patent: February 20, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Chia Liang Tai