Abstract: In a high-performance data storage system, an enclosure contains a multiplicity of disk drives, each of which has two high-speed serial data ports. Respective data lines are provided which connect each of the data ports with a respective high-speed data multiplexer. Importantly, each of the multiplexers is also connected with each of two distinct I/O modules. Failure of either I/O module still permits the remaining I/O module to have serial high-speed connectivity with each of the multiplexers, and thus with each of the data ports on each disk drive. Finally, the overall function of the system may be selected as JBOD (Just a Bunch Of Drives), as SAN (Storage Area Network), or NAS (Network Attached Storage), without requiring any mechanical or electronic change other than the I/O modules.

Abstract: An integral USB MODEM/USB LAN card peripheral comprises a first connector connected to a computer; a second connector connected to a telephone line; a third connector connected to LAN; a USB controller used to collect and dispatch internet data; wherein the USB controller has a micro-controller connected to a first memory, and a USB SIE (serial bus interface engine) connected between the first connector and the micro-controller. The micro-controller is connected to a MODEM module and an ether network media access controller through an internal bus, wherein the MODEM module is connected to the second connector for accessing Internet; and the ether network media access controller connected to the third connector through a physical layer for accessing LAN. Therefore, the present invention enables a computer to access LAN and Internet simultaneously; and the remote users to share compute resource with other users.

Abstract: Several different systems and methods are described involving arbitration between asynchronous and isochronous data for access to a data transport resource (e.g., a bus or a memory controller). A first embodiment of a system (e.g., a computer system or a communication system) includes an arbiter coupled to the data transport resource, an asynchronous queue for storing asynchronous data, and an isochronous queue for storing isochronous data. The isochronous queue has a data level range divided into multiple portions. A number of memory locations within the isochronous queue may define the data level range of the isochronous queue. The arbiter arbitrates between the asynchronous queue and the isochronous queue for access to the data transport resource dependent upon the portion of the data level range in which a level of data resides within the isochronous queue. The level of data within the isochronous queue may be a number of memory locations between a write pointer and a read pointer.

Abstract: A method and apparatus for automatically configuring a configurable integrated circuit. One embodiment comprises a method for automatically loading data including configuration data to a configurable integrated circuit upon initialization of a system in which the configurable integrated circuit is embedded. The method of one embodiment comprises storing a plurality of commands and a plurality of data elements in a non-volatile memory of the system. The method further comprises reading contents of an initial address in the non-volatile memory. If the initial address contains a command, depending upon a type of the command, the method comprises writing contents of a next address in the non-volatile memory to a register space of the configurable integrated circuit, to a configuration space of the configurable integrated circuit, or to a command space of the configurable integrated circuit.

Abstract: An input apparatus or keypad (14) for computers and networks is provided. The keypad (14) has a palm size housing (20) having an extended opening (30) in its top surface (28). An input or key assembly (32) mounted in the opening (30) has a number of keys (34) arrayed in a 6 by 4 matrix, for example, to which operator can access to input information. The housing (20) includes a processor for processing information input using keys into a corresponding signal, and a transmitter for transmitting the resultant signal to a receiver of the computer or network by wireless. In particular, the keypad (14) is designed ergonomically so that the operator can learn an input operation with ease and time-consuming and push keys so quickly.

Abstract: A method and apparatus assists communication between a writer of a shared file and the reader of the shared file without requiring the use of a shared file. When the writer fills a buffer with information and provides a write commend to write the buffer to a shared file, the buffer is not written to a file. Instead, the pointer to the buffer is passed to the reader, and the writer may be suspended until the reader indicates it has read the file. Alternately, two buffers may be used, with the contents of the buffer used by the writer copied to a second buffer, allowing the writer to reuse the first buffer before the reader has completed reading the contents of the second buffer.

Abstract: A management sub-system connects via a USB bus to a server or computer being managed. The management sub-system also couples to a management console, which has a number of conventional peripherals, including CD-ROM, floppy drive, hard disk, keyboard, mouse, and the like. These peripherals are emulated as USB peripherals coupled to the server by the management sub-system. The management sub-system includes a Composite USB function logic device that connects to the USB controller in the server. The Composite USB function logic device emulates the various peripherals available at the management console, and provides configuration data to the USB controller consistent with the emulation. Consequently, the server sends and receives data from these peripherals at the management console, as if the peripherals were locally connected by the USB bus to the server. The management sub-system monitors the operation of the server and publishes a web page that can be viewed by a web browser at the management console.

Abstract: A mechanism that includes an apparatus and method for ensuring that all transactions within any flow control class completes is herein provided. The mechanism includes a plunge transaction that is inserted in each pending transaction queue and which is transmitted to a particular destination device. All prior transactions in a flow control class are deemed to be complete when the destination device receives the plunge transactions in the flow control class.

Abstract: An information processing system, which has a computer, scanning apparatus, and printing apparatus using an IEEE 1394 bus as a communication interface, searches for an available channel in order to assign a predetermined number of channels to an apparatus having operation priority. When no available channel is found by the search, the system determines whether any of channels allocated by an other apparatus can be reassigned to the high-priority apparatus. If any channels are determined to be reassignable, the system reassigns the channels to the high-priority apparatus. This makes it possible to flexibly assign channels in an isochronous transfer serial bus and transfer information desired by the user.

Abstract: One embodiment of the present invention provides a procedure to configure the operation of the a device controller. In particular, the procedure operates in a system that includes a controller that is connected across a first input/output (I/O) interface to at least one other controlled device. An auxiliary computer is connected to the controller by a second I/O interface. The auxiliary computer has a processor therein for executing a set of computer program instructions stored in a first memory. The computer program instructions cause the auxiliary computer to first identify a set of resources in the system. Next, the auxiliary computer determines a set of compatible configuration options that are compatible with the identified resources. Next, the auxiliary computer generates an executable procedure from a number of software procedures that are stored in the memory of the auxiliary computer to implement the compatible configuration options.

Abstract: A method and apparatus is presented providing high-performance lossless data compression implemented in hardware for improving network communications. A compression module useful in a switching platform is also presented capable of compressing data stored in buffer memory. Instructions for a compression task are assigned to the compression module by a microprocessor writing a control block to a queue in stored local memory. The control block informs the compression module of the size and location of the unprocessed data, as well as a location in the buffer memory for storing the processed data and the maximum allowed size for the compressed data. Using this technique, the microprocessor can limit the compression of data to those data streams allowing compression, to those segments that are susceptible to compression, and to those segments that are large enough to show a transmission speed improvement via compression.

Abstract: A computer operating system identifies and renames communication (COMM) ports associated with infrared (IR) transceivers that communicate with IR devices. The operating system detects all available COMM ports, identifies a COMM port dedicated to an IR transceiver, and renames that COMM port from a non-descriptive virtual port name (e.g., COM4) to another, more descriptive virtual port name (e.g., “Infrared Port”). In this manner, rather than seeing a list of indistinguishable virtual port names (e.g., “COM0”, “COM1”, . . . “COM9”) in which one may be dedicated to the IR transceiver, a user is presented with a list of virtual port names that includes one conspicuously descriptive port name (e.g., “Infrared Port”). This removes the guesswork and frustration for the user during configuration. The operating system also enables reverse conversion from the descriptive name back to the non-descriptive virtual port name for internal use.

Abstract: An I/O mapping within a system memory of a computing system assigns a fixed address to each I/O device and I/O bridge in a larger address region of the system than the number of address bits of the I/O devices and/or the I/O bridges would allow. This fixed address assignment eliminates problems associated with fragmentation of I/O memory space of a conventional variable address assignment when I/O devices and/or I/O bridges are replaced on-line, i.e., hot-swapped. The I/O mapping utilizes a greater number of address bits than the address bits available from I/O devices to assign a much larger address space to each device by translating the larger number of bits address from the system to the smaller number of bits address of the I/O devices.

Abstract: A buffer for adapting data flows from input channels to output channels is provided. The buffer includes a DRAM organized in blocks and a memory controller for managing assignment of the blocks to the chains of linked blocks. The DRAM contains, as a chain of linked blocks, data associated with each communication channel formed by a pair of input and output channels, and also contains a main queue of free blocks for listing unoccupied blocks. The memory controller includes a cache memory containing a partial queue of free blocks that the memory controller uses in managing block assignment. According to one embodiment, when a level of the partial queue reaches a predetermined minimum limit the cache memory is at least partially filled by a burst from the main queue, and when a level of the partial queue reaches a predetermined maximum limit the cache memory is at least partially emptied by a burst into the main queue.

Abstract: A method and apparatus are provided for interactively guiding a user through a scanner installation procedure. When a scanner installation program is launched, the scanner installation program causes various screens having various options to be displayed to a user. The screens provide the user with information that guides the user step-by-step through the scanner installation procedure. The scanner installation program automatically detects which I/O ports of the user's computer are available for connection to the scanner and displays a message to the user indicating which I/O port(s) is available for connection to the scanner. The scanner installation program then provides the user with the option of seeing a visual demonstration of steps that need to be taken by the user in connecting the scanner to the available I/O port of the computer.

Abstract: In an example embodiment, a data transfer method adaptively transfers data from a host device to a target device across a channel-based interconnect. The method includes determining whether or not the size of the data to be transferred is greater than the maximum payload of a cell for the channel-based interconnect. If the size of the data to be transferred is not greater than the maximum payload, then a single cell is transferred from the host device to the target device which includes all of the data. If the size of the data to be transferred is greater than the maximum payload, then a request message is transferred from the host device to the target device. The request message includes a portion of said data to be transferred and control information indicating that not all of the data to be transferred is included in the request message.

Abstract: Control data for a device driver that is stored on a first non-volatile memory is updated by writing new driver control data to a second non-volatile memory. In an embodiment, the new driver control data may be stored on the second non-volatile memory without modifying the control data on the first non-volatile memory. In a further embodiment, a processor reads non-volatile from the first non-volatile memory into a system memory, reads supplemental driver control data from the second non-volatile memory, and updates the set of driver control data in the system memory based on the supplemental driver control data.

Abstract: A system interface includes a plurality of first directors, a plurality of second directors, a data transfer section and a message network. The data transfer section includes a cache memory. The cache memory is coupled to the plurality of first and second directors. The messaging network operates independently of the data transfer section and such network is coupled to the plurality of first directors and the plurality of second directors. The first and second directors control data transfer between the first directors and the second directors in response to messages passing between the first directors and the second directors through the messaging network to facilitate data transfer between first directors and the second directors. The data passes through the cache memory in the data transfer section. A method for operating a data storage system adapted to transfer data between a host computer/server and a bank of disk drives.

Abstract: Data fed in through a PIO or UART is first converted into IrDA-protocol-conforming data by a CPU executing a software program stored in a ROM, and the resulting data is then fed by way of a bus to a modulation circuit so as to be modulated. A signal fed in to a demodulation circuit is first demodulated to restore IrDA-protocol-conforming data, and the demodulated data is then converted back into its original data by the CPU executing the software program stored in the ROM. The restored data is fed by way of the bus to the PIO or UART.

Abstract: A queue having a ‘duplicate’ counter associated with each entry whereby duplicate data is not stored in the queue. Before data is placed in the queue, the queue is searched for an entry matching the data to be written. If a match is found, the duplicate counter associated with the entry is incremented. Further, if a match is found and the data stored therein is inconsistent with the current data, the contents of the queue are updated and the duplicate counter associated with the entry is reset to one. If a match is not found, the data is written to the queue and the duplicate counter associated with the entry is initialized to one.