Patents Examined by Paul Rodriguez
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Patent number: 8086427Abstract: A method of designing hearing aid molds is disclosed whereby two shapes corresponding to graphical images of ear impressions are registered with each other to facilitate joint processing of the hearing aid design. In a first embodiment, a first graphical representation of a first ear impression is received and a feature, such as the aperture of the ear impression, is identified on that graphical model. A first vector is generated that represents the orientation and shape of that first feature. The three-dimensional translation and rotation of that first vector are determined that are necessary to align the first vector with a second vector representing the orientation and a shape of a feature, once again such as the aperture, of a second ear impression. In another embodiment, this alignment is then refined by minimizing the sum of the distances between points on the first and second graphical representations.Type: GrantFiled: August 7, 2006Date of Patent: December 27, 2011Assignee: Siemens CorporationInventors: Tong Fang, Gozde Unal, Fred McBagonluri, Alexander Zouhar, Hui Xie, Gregory G. Slabaugh, Jason Jenn-Kwei Tyan
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Patent number: 8082137Abstract: A method and apparatus for modeling and thermal analysis of semiconductor chip designs is provided. One embodiment of a novel method for performing thermal testing of a semiconductor chip design includes calculating full-chip temperatures over the semiconductor chip design (e.g., to identify steep thermal gradients) and modeling the full-chip temperatures in accordance with a geometric multi-grid technique. The geometric multi-grid technique is tailored to determine temperatures within the semiconductor chip design based at least in part on the physical attributes or geometry of the design.Type: GrantFiled: June 11, 2008Date of Patent: December 20, 2011Assignee: Gradient Design Automation, Inc.Inventors: Peng Li, Larry Pileggi, Mehdi Asheghi, Rajit Chandra
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Patent number: 8082130Abstract: A method and calculator for obtaining spin polarized quantum transport in 3-dimensional atom-scale spintronic (spin electronics) devices under finite bias voltage, based on implementing Density Function Theory (DFT) in combination with the Keldysh non-equilibrium Greens function (NEGF) formalism to calculate spin polarized quantum transport in 3-dimensional nanostructures under finite bias and external voltage.Type: GrantFiled: January 16, 2008Date of Patent: December 20, 2011Assignee: The Royal Institution for the Advancement of Learning/McGill UniversityInventors: Hong Guo, Derek Waldron, Brian Larade
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Patent number: 8078441Abstract: A method for designing a haul road based on machine performance comprises receiving one or more haul road parameters and identifying at least one type of machine to be operated on the haul road. The method also includes selecting at least one target operating parameter associated with the at least one type of machine and simulating performance of the at least one type of machine to predict an operating value corresponding with the at least one target operating parameter. If the predicted operating value is not within a threshold range of the corresponding target operating parameter, one or more haul road parameters are adjusted.Type: GrantFiled: October 12, 2007Date of Patent: December 13, 2011Assignee: Caterpillar Inc.Inventors: Jonny Ray Greiner, Yang Liu, Bhavin Jagdishbhai Vyas
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Patent number: 8078447Abstract: A method of estimating a Miller coefficient for an aggressor network and a victim network coupled by a coupling capacitor includes synthesizing a reduced order system from the aggressor network and the victim network, estimating an active area across the coupling capacitor for an aggressor induced noise signal based on the reduced order system, calculating an estimate of the Miller coefficient based on the active area of the aggressor induced noise signal, and outputting the calculated estimate of the Miller coefficient.Type: GrantFiled: June 18, 2008Date of Patent: December 13, 2011Assignee: Oracle America, Inc.Inventors: Bogdan Tutuianu, Iris E. Chen, Jiyang Cheng
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Patent number: 8073672Abstract: Related communication signals between a simulator and an emulator are organized into logical channels. The signals in each channel are then be transmitted only as needed, reducing the use of the communication pathways between the simulator and the emulator. Further, the circuit components that will receive the communication signals to be shared on a channel are be physically located close together within the emulator, thereby reducing the time required to select and enable components of the emulator to receive the signals sent by the simulator. Similarly, emulator components that send communication signals to be shared on a channel are physically located close together within the emulator, thereby reducing the time required to select and enable components of the emulator to send these signals to the simulator.Type: GrantFiled: July 6, 2005Date of Patent: December 6, 2011Assignee: Mentor Graphics CorporationInventors: Nicolas Chaumont, Jean-Marc Brault
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Patent number: 8073665Abstract: A method for analyzing an oilfield network. The method includes collecting oilfield data from an oilfield network, modeling a first wellsite and a second wellsite using the oilfield data to create a first production model of the first wellsite and a second production model of the second wellsite. The method further includes modeling a sub-network of the oilfield network to create a third production model of the sub-network. The modeling of the sub-network includes identifying a junction of branches associated with the first wellsite and the second wellsite. A fourth production model is created for the junction by combining the first production model with the second production model. The production model of the sub-network is created using the fourth production model of the junction. The method further includes solving the oilfield network based on the third production model to create a production result, and storing the production result.Type: GrantFiled: February 19, 2009Date of Patent: December 6, 2011Assignee: Schlumberger Technology CorporationInventors: Colin Watters, Adrian Ferramosca, James Bennett, Daniel Lucas-Clements
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Patent number: 8073659Abstract: Multiple models for various stages of a non-linear process control are developed by clustering perturbation data obtained from the nonlinear process so as to permit multiple local data regions to be identified as a function of substantial similarity between the data, wherein the data of first data set represent the non-linear process. A discrete model corresponding to each of the local data regions is generated. The number of the discrete models may be reduced as a function of prediction error between actual outputs of the process and predicted outputs of the models and as a function of a gap metric based on closed loop similarity and frequency response similarity between the models.Type: GrantFiled: November 13, 2007Date of Patent: December 6, 2011Assignee: Honeywell International Inc.Inventors: Jinendra K. Gugaliya, Ravindra D. Gudi, Jinyi Mo, Guan Tien Tan
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Patent number: 8073664Abstract: Systems and methods for the automated positioning of pads and orienting of slot templates for the pads. The systems and methods also include automated adjustment of well path plans from a pad to selected well targets.Type: GrantFiled: February 11, 2009Date of Patent: December 6, 2011Assignee: Landmark Graphics CorporationInventors: Gary Schottle, Dan Colvin
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Patent number: 8069022Abstract: A method and apparatus is disclosed whereby a point on an ear impression model to be labeled is selected and a shape context is determined for that point. This shape context is then compared to average shape contexts for different regions on a reference ear impression model, also referred to herein as an ear impression shape atlas. A cost function is used to determine the minimum cost between the shape context for the selected point and one of the average shape contexts. Once the minimized cost is determined, the region label corresponding to the average shape context having a minimized cost is assigned to that point. In this way, points on the surface of an ear impression are classified and labeled as being located in regions corresponding to the regions on the ear impression shape atlas.Type: GrantFiled: August 18, 2006Date of Patent: November 29, 2011Assignee: Siemens CorporationInventors: Gregory G. Slabaugh, Gozde Unal, Tong Fang
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Patent number: 8069026Abstract: Clock gating analysis of a target circuit having a plurality of clock gates, involves the calculation of a clock gate function for each of the clock gates. The clock gate functions indicate an activation state of the clock gates and a combination of output values from sequential circuit elements in the target circuit are substituted into each of the clock gate functions to obtained clock gate function values. Combinations of the clock gate function values form individual clock gating states. Each clock gating state indicates an activation state of each of the local clocks, collectively. A table indicating correlations between the combinations of output values and the clock gating states is generated and from the conversion table, a group that includes all of the clock gating states possible is output.Type: GrantFiled: December 17, 2007Date of Patent: November 29, 2011Assignee: Fujitsu LimitedInventor: Hiroyuki Higuchi
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Patent number: 8069017Abstract: In one aspect of the invention, each bolt is modeled using a beam element in a FEA model. To apply desired pretension to one or more bolts, at least one pretension-versus-time curve is specified. Each pretension-versus-time curve includes ramp portion, desired pretension portion and optional unloading portion. Duration of the pretension-versus-time curve generally covers first 0.5-1% of total simulation time of a car crashworthiness analysis. Ramp portion starts from zero to desired pretension in a substantially linear manner, and hence being configured for applying desired pretension to a bolt gradually with smaller increments. Desired pretension portion is configured for ensuring the desired pretension can actually be applied to the beam element during an initialization process—a series of quasi-static analyses. Since the method is independent of the deformation of the beam, the method completely avoids the need to iteratively determine an axial strain or displacement that gives the desired pretension.Type: GrantFiled: September 25, 2008Date of Patent: November 29, 2011Assignee: Livermore Software Technology CorporationInventor: John O. Hallquist
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Patent number: 8065131Abstract: A method for simulating an industrial plant includes generating a library of industrial plant component types using user input. The library includes properties of the component types and rules to generate scripts in accordance with property values. The method further includes assembling a configuration of industrial plant components from the library using user input. The configuration is assembled into an editor configured to accept a layout and connection of the configuration of industrial plant components and to accept a configuration and setting of the properties of the industrial plant components. The method also includes generating a script or scripts for industrial plant components in the configuration of industrial plant in accordance with the rules, wherein the generated scripts include mathematical relationships within or among the industrial plant components, or both. The mathematical relationships are then solved. Results are either displayed or used to control an industrial plant.Type: GrantFiled: July 29, 2005Date of Patent: November 22, 2011Assignee: General Electric CompanyInventors: Larry Keith McDonald, Scott Terrell Williams, Scott Alden Atkins, Alfred Ong'iro, Ivan Joseph Johnson
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Patent number: 8065118Abstract: A method is provided for automatically determining the position of and placing a faceplate assembly on a hearing instrument shell that takes into account patient anatomical features. These anatomical features of the shell are used as landmarks for ensuring that the final position of the faceplate on the hearing instrument is optimized both in terms of esthetics and increased comfort. The protocols defined herein take advantage of the intrinsic features of the human ear anatomy and the geometry of the electronic components to ensure that design and manufacturing of ITEs are optimized for efficiency and the process can be completely automated to ensure consistence and practice reproducibility.Type: GrantFiled: October 16, 2007Date of Patent: November 22, 2011Assignee: Siemens Hearing Instruments Inc.Inventors: Fred McBagonluri, Raquel Calvachi, Luis Calvachi, legal representative
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Patent number: 8065117Abstract: Programming or modeling environments in which programs or models are simulated or executed with tunable sample times are disclosed. The tunable sample times can be changed during the simulation or execution of the programs or models without recompiling the programs or models. The sample times are parameterized and the value of the sample times is changed during the simulation or execution of the programs or models. The sample times may be changed manually by a user. Alternatively, the sample times may be automatically changed by programmatically defining when and how the sample times are determined.Type: GrantFiled: December 19, 2005Date of Patent: November 22, 2011Assignee: The MathWorks, Inc.Inventors: Biao Yu, Matthew Englehart
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Patent number: 8065133Abstract: The invention is a method of testing a storage network that includes a method of handling data at the port and bus level. The method includes emulating targets in computer memory, receiving data from initiators, and passing to computer memory only a portion of the data received. Bandwidth of internal memory and paths to memory are de-coupled from devices under test attached to ports, such that full bandwidth testing is possible at all test clients simultaneously. Data passed on a wire is returned or discarded at the port or bus level. The invention is useful for testing networks that have high bandwidths, and for testing large storage area networks.Type: GrantFiled: June 30, 2006Date of Patent: November 22, 2011Assignee: Sanblaze Technology, Inc.Inventor: B. Vincent Asbridge
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Patent number: 8060313Abstract: A simulation system includes electromagnetic field analyzing units that execute electromagnetic field analysis with respect to electromagnetic field analysis areas obtained by division of an area to be analyzed into the electromagnetic field analysis areas; one or more circuit analyzing units that execute circuit analysis with respect to a circuit unit in the area to be analyzed; and an aggregating unit that aggregates, from the electromagnetic field analyzing units, data for the circuit analysis by the one or more circuit analyzing units and transmits the data to the circuit analyzing units. The simulation system links plural processing units that mutually exchange data.Type: GrantFiled: June 24, 2009Date of Patent: November 15, 2011Assignee: Fujitsu LimitedInventor: Atsushi Takeuchi
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Patent number: 8060355Abstract: A method of providing simulation results includes detecting any power net and rail in a circuit netlist. The circuit can be divided into net-partitioned blocks. Using these net-partitioned blocks, a topological analysis can be performed to identify cuttable/un-cuttable devices and synchronization requirements. Then, the circuit can be re-divided into rail-partitioned blocks. Using these rail-partitioned blocks, a sparse solver can identify potential partitions, but eliminate fill-ins as determined by the topological analysis. A cost function can be applied to the potential partitions as well as the identified cuttable/un-cuttable devices to determine final cut points in the circuit and dynamic inputs to the final blocks. Simulation can be performed on the final blocks and simulation results can be generated.Type: GrantFiled: July 27, 2007Date of Patent: November 15, 2011Assignee: Synopsys, Inc.Inventors: Kevin J. Kerns, Mayukh Bhattacharya, Svetlana Rudnaya, Kiran Gullapalli
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Patent number: 8060356Abstract: Processor emulation using fragment level translation is disclosed. A target system having a main target processor, a secondary target processor element and an instruction memory associated with the secondary target processor element may be emulated with a host system having one or more host processors and a host memory. Two or more target system code instructions for the secondary target processor may be grouped into one or more fragments with known starts and ends. A data structure that maps the host memory locations of the starts and ends may be maintained. Each fragment may be translated into a corresponding set of position-independent translated fragments executable by the host system. The translated fragments may be loaded into one or more of the host processors. If a memory layout for target system code corresponding to the one or more fragments has changed, the fragments may be dynamically re-linked, without re-translation, and executed.Type: GrantFiled: December 9, 2008Date of Patent: November 15, 2011Assignee: Sony Computer Entertainment Inc.Inventor: Stewart Sargaison
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Patent number: 8060349Abstract: This invention presents a method of novel nonlinear control for designing Static Synchronous Compensators (STATCOM). A passivity-based approach is proposed for designing robust nonlinear STATCOM controller. The mathematical model of STATCOM will be represented by an Euler-Lagrange (EL) system corresponding to a set of EL parameters. By employing the Park's transformation, the differential geometry approach is used to investigate the power system dynamics with considering STATCOM under the synchronous d-q frame. The energy-dissipative properties of the proposed model derived in the synchronous d-q rotating frame are fully retained. This model also consider the dynamic response of the changable load. Finally, the passivity-based control is employed by using energy shaping and damping injection techniques to produce the proper control signals for Voltage Source Converter. So that the system embedded with STATCOM is more robust and stable.Type: GrantFiled: March 16, 2007Date of Patent: November 15, 2011Assignee: Chang Gung UniversityInventors: Chia-Chi Chu, Hung-Chi Tsai