Abstract: A method to prevent the formation of a thinner portion of insulating layer, especially a gate oxide layer, at the junction between the side walls and the bottom insulator is disclosed. First, a pad oxide layer is formed on the side walls and the bottom of the trench. Next, a bottom oxide is formed on the lower portion of the trench. Then, the upper portion of the bottom oxide and the exposed pad oxide layer are removed by wet etching to leave a bottom oxide having a concave surface. Next, the conformal gate oxide layer is grown on the exposed side walls of the trench.

Abstract: A method of deposition with 4-PASS which is performed by a WJ-1000 or WJ-999 machine. Before each deposition is performed, it is necessary to turn the wafer an angle of 90.degree. in the same direction. When deposition is this manner is performed four times on the same wafer, the uniformity in the four corners of the layer deposited on the 8-inch wafer can be improved. Over-polishing or recesses can be reduced and the kink effect can be prevented. 4-PASS deposition performed on the WJ-1000 or WJ-999 machine can make the uniformity within the wafer better and the yield of production can be increased.

Abstract: With the present invention, a plurality of contiguous openings within an integrated circuit are etched with high etch selectivity. The present invention includes the step of depositing a first masking layer adjacent a first opening layer. The first masking layer has a first pattern for defining a first opening in the first opening layer. The present invention also includes the step of depositing a second opening layer adjacent the first masking layer. Additionally, the present invention includes the step of depositing a second masking layer, that is comprised of a hard mask material, adjacent the second insulating layer. The second masking layer has a second pattern for defining a second opening in the second opening layer. The second pattern is aligned with the first pattern such that the first opening and the second opening are contiguous.

Abstract: A process for forming a nanoporous dielectric coating on a substrate. The process follows the steps of blending an alkoxysilane with a solvent composition and optional water; depositing the mixture onto a substrate while evaporating at least a portion of the solvent composition; placing the substrate in a sealed chamber and evacuating the chamber to a pressure below atmospheric pressure; exposing the substrate to water vapor at a pressure below atmospheric pressure and then exposing the substrate to base vapor.

Abstract: A process for the manufacture of nanoporous silica dielectric films by vapor deposition of silica precursors on a substrate. The process provides for vaporizing at least one alkoxysilane composition; depositing the vaporized alkoxysilane composition onto a substrate; exposing the deposited alkoxysilane composition to a water vapor, and either an acid or a base vapor; and drying the exposed alkoxysilane composition, thereby forming a relatively high porosity, low dielectric constant, silicon containing polymer composition on the substrate.