Abstract: Silicon substrate is provided with silicon single-crystalline wafer, natural oxide film and poly-crystalline silicon film. The thickness of natural oxide film is controlled to be less than 10 .ANG.. Since the thickness of natural oxide film is made less than 10 .ANG., heavy metals travel smoothly from silicon single-crystalline wafer to poly-crystalline silicon film in the process of gettering. In other words, it is possible to enhance gettering effect.

Abstract: A technique for improving the radiation hardness and hot-electron resistance of a CMOS integrated circuit is described whereby undesirable hydrogen ions may be vented through any holes, such as contact holes, in an overlying passivation layer by applying an elevated temperature and/or electrical bias to the integrated circuit die. The elevated temperature and electrical bias serve to accelerate the process by which hydrogen vents from the die. The elimination of unwanted hydrogen significantly reduces threshold shifts in the CMOS integrated circuit, providing greater radiation hardness and hot-electron resistance.

Abstract: A method of producing a semiconductor device, comprising the following steps: (1) providing a patterned resist mask over a semiconductor substrate, the resist mask being formed with a first opening portion having a first aspect ratio, and a second opening portion having a second aspect ratio larger than the first aspect ratio; (2) forming an impurity diffusion layer by an oblique ion-implantation of impurity ion into a surface of the semiconductor substrate through the second opening portion at an implantation angle to prevent the impurity ion from reaching a bottom surface of the second opening portion; and (3) ion-implanting impurity ion from substantially vertical angle to the semiconductor substrate by using the resist mask.

Abstract: A method for desorbing the surface oxide on a silicon substrate is performed by implanting particles such at atomic or ionic hydrogen into the oxide layer on the silicon substrate. The oxide is then removed by breaking the bonds between the silicon and oxygen atoms within the oxide. The bonds may be broken by heating the substrate, for example. The temperature to which the substrate must be raised is substantially less than the temperature required to desorb an oxide layer that has not undergone an implantation step. In one particular example, the particles implanted into the oxide surface are hydrogen ions generated by electron cyclotron resonance.

Abstract: This invention constitutes a process for fabricating a structure which, when incorporated in an integrated circuit, will reduce current leakage into the substrate from transistor source/drain regions. The structure is particularly useful in dynamic random access memories, as it will minimize the effect of alpha particle radiation, thus improving the soft error rate. A trench is etched through the transistor source or drain region. A high dosage of oxygen ions is then implanted at low energy in the floor, but not the sidewalls of the trench. The resulting oxygen-implanted silicon layer at the bottom of the trench is then converted to a silicon dioxide barrier layer through rapid thermal processing or furnace annealing in an inert ambiance. The trench is then lined with a deposited contact layer that is rendered conductive either during or subsequent to deposition. Contact between the contact layer and the source or drain region is made through the sidewalls of the trench, which were not implanted with oxygen.

Abstract: An integrated circuit structure vertically isolated electrically from the underlying substrate is formed in/on a single crystal semiconductor substrate, such as a silicon semiconductor wafer, by first implanting the substrate with a sufficient dosage of noble gas atoms to inhibit subsequent recrystallization of the semiconductor lattice in the implanted region during subsequent annealing, resulting in the formation of an isolation layer comprising implanted noble gas atoms enmeshed with semiconductor atoms in the substrate which has sufficient resistivity to act as an isolation layer. The preferred noble gases used to form such isolation layers are neon, argon, krypton, and xenon. When neon atoms are implanted, the minimum dosage should be at least about 6.times.10.sup.15 neon atoms/cm.sup.2 to inhibit subsequent recrystallization of the silicon substrate. When argon atoms are implanted, the minimum dosage should be at least about 2.times.10.sup.15 argon atoms/cm.sup.2.

Abstract: In manufacturing a semiconductor device, when a SORI limit value of a silicon single crystal wafer to be material in manufacturing devices, and a bulk micro defect density are defined in fixed ranges for said wafer, as required by the device yield and the gettering capability, said wafer having an initial oxygen concentration capable of simultaneously satisfying said fixed ranges is subject to a preheat treatment for the formation of an oxygen precipitate nucleus by using a time capable of simultaneously satisifying a fixed range between the upper and lower limit values of said initial oxygen concentration and the fixed range of said bulk micro defect density. Use of the process of the present invention will make it possible that the SORI of a wafer is limited to its lowest extent, and a combination of a variety of conditions for insuring the BMD density required for exertion of a desired gettering capability is efficiently chosen in a short period of time without relying upon trial and error.

Abstract: Recessed isolation oxide is deposited in shallow trenches simultaneoulsy with oxide deposition in deep isolation trenches. A single planarization of both trench fillings provides efficient recessed isolation oxide without bird's beak or bird's head problems of LOCOS isolation oxide. Self-aligned trench filling by successive conformal depositions of oxide and polysilicon followed by planarization to remove polysilicon away from the trenches. The the remaining polysilicon may be used as an oxide etch mask to remove all of the oxide except in the trenches.

Abstract: A preferred embodiment of this invention comprises an oxidizable layer (e.g. TiN 50), a conductive exotic-nitride barrier layer (e.g. Ti--A--N 34) overlying the oxidizable layer, an oxygen stable layer (e.g. platinum 36) overlying the exotic-nitride layer, and a high-dielectric-constant material layer (e.g. barium strontium titanate 38) overlying the oxygen stable layer. The exotic-nitride barrier layer substantially inhibits diffusion of oxygen to the oxidizable layer, thus minimizing deleterious oxidation of the oxidizable layer.

Abstract: A method of fabricating a super thin O/N/O stacked dielectric by oxidizing a thin nitride layer in low pressure oxygen for high-density DRAMs is disclosed. A thin nitride layer with a thickness of approximately 20 .ANG. to 60 .ANG. is formed over the surface of a silicon substrate. The nitride layer is oxidized in pure oxygen ambient of 0.01 Torr to 76 Torr at a temperature from 750.degree. C. to 950.degree. C. for approximately 10 to 60 minutes. A super thin oxide/nitride/oxide (O/N/O) stacked dielectric exhibiting a low leakage current and high reliability for use in high-density DRAMs is formed by the aforementioned low-pressure dry-oxidation procedure.

Abstract: Reciprocal diffusion is prevented in a SiC electronic device by interposing an intermediate layer composed of W or a W-Si alloy rather than forming the Ni electrode directly on a SiC base, providing a stable electrode for which the contact resistance does not increase even when high temperatures are maintained. Bonding is facilitated when Au layer is formed on top of the Ni layer.

Abstract: A process for making a MOS device on a silicon substrate includes the step of forming a buried layer of germanium-silicon alloy in the substrate, or, alternatively, a buried layer of silicon enclosed between thin, germanium-rich layers. This buried layer is doped with boron, and tends to confine the boron during annealing and oxidation steps. The process includes a step of exposing the substrate to an oxidizing atmosphere such that an oxide layer 10 .ANG.-500 .ANG. thick is grown on the substrate.

Abstract: A gate insulating layer and a gate electrode are formed on a semiconductor substrate. An oxidation stopper made of silicon nitride is formed on a sidewall of the gate electrode and a sidewall of the gate insulating layer. Then, a diffusion and oxidation process is carried out for gettering impurities from the semiconductor substrate.

Abstract: A memory cell includes a pair of spaced apart conductors on an insulating layer, and a novel electrically alterable resistive component between the conductors. This resistive component consist essentially of silicon, having a crystalline grain size which is smaller than polycrystalline with dopant atoms that are interstitial in the silicon. Process temperatures are limited such that the dopant atoms remain interstitial and do not become substitutional.

Abstract: A new method for planarization of shallow trenches is presented. Shallow trenches are patterned into a semiconductor substrate that has been coated with a layer of silicon nitride. A conformal coating of oxide is deposited onto the wafer to fill the trenches. A thin layer of etch-stop silicon and a second layer of oxide are then deposited. The second layer of oxide is patterned with a filler mask using conventional photolithographic techniques and etched to the silicon etch-stop layer, leaving blocks of oxide in the depressions above the trenches and oxide spacers along the sidewalls. Chemical mechanical polishing is then used to polish the oxide back to the silicon nitride. The process offers excellent global planarity, minimal variation in silicon nitride thickness across active areas of varying size and density, and relative insensitivity to chip design.

Abstract: Oxygen ions are partially implanted into a semiconductor substrate 1 to form an oxygen ion implantation area. Then, a trench 2 surrounding the oxygen ion implantation area is formed in the semiconductor substrate 1 so as to remove the outer peripheral portion of the oxygen ion implantation area. Then, the semiconductor substrate 1 are heat treated to turn the oxygen ion implantation area into a buried oxide film 4 which is stable. Then, an insulating film 3 is buried into the trench 2.

Abstract: Through-holes are formed in a substrate wafer by electrochemical etching, so that a perforated, self-supporting layer of n-doped, monocrystalline silicon arises. An n-doped region and a p-doped region that form a pn-junction and that both adjoin a first principal face of the self-supporting layer are produced in the self-supporting layer. A contact to the n-doped region and a contact to the p-doped region are formed on the first principal face, so that the pn-junction can be interconnected as solar cell into which the light incidence can occur via a second principal face lying opposite the first.

Abstract: A method of manufacturing and a structure of a semiconductor device is disclosed whereby a gate insulating layer, a polycrystalline silicon layer, a tungsten silicide layer and a first insulating layer are formed on a semiconductor substrate. Gates are formed by the removal of the layers by dry etching, wherein the etch rate of the tungsten silicide layer is faster than the other layers, thereby forming an undercut region in the tungsten silicide layer. A second insulating layer is formed on the surface of the resultant structure to form spacers, and a contact window is formed between the gates via an etching process. The second insulating layer portion which forms the spacers need not be thick to prevent etching of the gates when forming the contact window, therefore good step coverage is achieved and reliability of the device is increased.

Abstract: A method for forming a photoelectric conversion device, which comprises forming at least one of the constituent elements of the photoelectric conversion device on a photoelectric conversion region having established on either surface or both surfaces of a substrate for forming thereon the photoelectric conversion device, and then separating the substrate into two parts by a plane being incorporated between the two surfaces.

Abstract: A new method of forming a silicon-on-insulator device using large tilt-angle implant is described. A first silicon oxide layer is formed on the surface of a semiconductor substrate. A first layer of tungsten is deposited over the silicon oxide layer and patterned. The semiconductor substrate is etched where it is not covered by the patterned tungsten layer to provide a silicon pillar underlying the patterned tungsten layer. A second silicon oxide layer is formed on all exposed surfaces of the silicon pillar and the silicon semiconductor substrate. A second tungsten layer is deposited over all surfaces of the substrate and anisotropically etched to form spacers on the sidewalls of the silicon pillar. An oxygen ion implantation is performed at a tilt angle to form implanted regions within the semiconductor substrate wherein the implanted regions extend and intersect under the silicon pillar.