Patents Examined by Stephen Jackson
  • Patent number: 5894394
    Abstract: First threshold corresponding to a large electric current capable of breaking a MOS-FET even if the electric current flows even in a short period is provided for a difference amplifying circuit and second threshold lower than the first threshold is stored in a memory. If a detected electric current value is higher than the first threshold or if a CPU determines that an electric current higher than the second threshold has flowed continuously for a period longer than a predetermined period, the semiconductor switch is switched off.
    Type: Grant
    Filed: June 11, 1997
    Date of Patent: April 13, 1999
    Assignee: Yazaki Corporation
    Inventors: Akira Baba, Hiroo Yabe
  • Patent number: 5894395
    Abstract: Contactor-circuit breaker housing firstly power poles and an electromagnet serving to activate the moving contacts in contactor mode and including a fixed magnetic circuit, a moving magnetic circuit and a coil whose electric supply is controlled by a switch, and secondly at least one current sensor serving to control a releasing electromagnet. The activating electromagnet and the releasing electromagnet are constituted by a single electromagnet whose moving magnetic circuit is a pivoting pallet linked mechanically to the contact-holders of the poles and having a weak moment of inertia. An electric unit is provided for the rapid reduction of the magnetic flux, triggered by an electronic control device associated with the current sensor.
    Type: Grant
    Filed: January 9, 1998
    Date of Patent: April 13, 1999
    Assignee: Schneider Electric SA
    Inventors: Gilles Baurand, Karim Benkaroun, Alain Gousset, Jacques Olifant, Daniel Riffaud
  • Patent number: 5894393
    Abstract: A ground fault and over-voltage detector and method is disclosed for sensing a loss of neutral continuity between the respective neutral conductors of a ground power unit and an aircraft power system coupled to the unit. The detector includes a feedback path for carrying a feedback signal from the aircraft to the ground power unit. The feedback signal comprises a voltage signal referenced to the aircraft neutral and includes a ground fault voltage component. The detector further includes a signal conditioner disposed in the ground power unit for receiving the feedback signal and generating a signal representative of the magnitude of the ground fault voltage component. A comparator connected to the output of the signal conditioner contrasts the ground fault voltage magnitude signal to a predetermined threshold and a cutoff mechanism responsive to the comparator, when the ground fault voltage is greater than the threshold, to interrupt ground power from the ground power unit to the aircraft.
    Type: Grant
    Filed: December 12, 1997
    Date of Patent: April 13, 1999
    Assignee: Trilectron Industies, Inc.
    Inventors: Stephen H. Elliott, John A. Miller, Norman Kosciusko
  • Patent number: 5892645
    Abstract: A protection apparatus for a spot network substation has a plurality of receiving lines connected between a network bus and a plurality of power sources. Each receiving line is connected to a primary switching device, a network transformer and a protector CB. A detector for detecting a phase of each receiving line voltage and a judging unit for judging the detected phase are provided on the primary side of each network transformer. A previously stored basic phase is compared with the detected phase of the receiving line voltage. If there is a lag in the detected phase of the receiving line voltage, it is judged to be a power-stop of the corresponding power source and the protector CB is tripped.
    Type: Grant
    Filed: July 29, 1997
    Date of Patent: April 6, 1999
    Assignees: Hitachi, Ltd., The Tokyo Electric Power Co., Inc.
    Inventors: Yoshiyasu Watanabe, Toru Tanimizu, Kazuo Kano, Yasunobu Kanou, Toshio Horikoshi, Koji Kondou, Ryutaro Yamamoto, Nobuhiro Kuroda
  • Patent number: 5889643
    Abstract: A multiwire branch circuit including two line conductors and a grounded, common neutral conductor is protected by a two pole circuit breaker connected to interrupt current flow in the two ungrounded line conductors. Three separate protection circuits provide arc fault protection for each of the ungrounded line conductors and ground fault protection for all three conductors. The arc fault detectors use the bimetal of the thermal-magnetic trip device for the associated line conductor, and therefore, are individually referenced to the associated line voltage. Hence, the outputs of the arc fault detectors are electrically isolated from each other and from the output of the ground fault detector, but operate a common trip circuit to open the two pole circuit breaker. The arc fault detectors have separate isolated power supplies. The ground fault detector is powered by a supply which is energized if either of the ungrounded line conductors is energized.
    Type: Grant
    Filed: September 29, 1997
    Date of Patent: March 30, 1999
    Assignee: Eaton Corporation
    Inventor: Robert Tracy Elms
  • Patent number: 5886862
    Abstract: An electrostatic discharge protection system provides electrostatic discharge protection for an integrated circuit having a package and a semiconductor device installed within the package. The package includes a first pin, a second pin and a reference pin. The semiconductor device includes a first conductor that connects with the first pin, a second conductor that connects with the second pin, and a reference conductor that connects with the reference pin. The integrated circuit operates within one of a normal operating mode and a power conservation mode when the first and second pins receive a power supply signal. The electrostatic discharge protection system includes a first protection device that detects and couples electrostatic discharge events from the first conductor to the reference conductor by reference to a voltage potential difference between the second conductor and the reference conductor.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: March 23, 1999
    Assignee: Digital Equipment Corporation
    Inventors: Warren Robert Anderson, Nicholas John Howorth
  • Patent number: 5886861
    Abstract: An arc fault detector turns on an electronic switch connecting a power distribution cable to ground thereby actuating a cable limiter to isolate the power distribution cable in response to an arc fault even though the arc fault itself does not create a low enough impedance fault to actuate the cable limiter directly. The electronic switch can be a sacrificial low cost silicon controlled rectifier which is destroyed by the ground fault it creates as long as the let-through current of the cable limiter is below the explosion current of the SCR. A single arc fault detector and SCR which fails as a short circuit can be used to actuate cable limiters at both ends of a short power distribution cable fed at both ends, or preferably separate protection can be provided adjacent both cable limiters.
    Type: Grant
    Filed: September 15, 1997
    Date of Patent: March 23, 1999
    Assignee: Eaton Corporation
    Inventor: Robert Neville Parry
  • Patent number: 5880917
    Abstract: A circuit for providing electrostatic discharge (ESD) protection is disclosed. The circuit comprises a pair of CMOS field effect pull up and pull down transistors with reduced resistance source and drain, having a well resistor formed external to them between supply and ground busses respectively. During an ESD event, the well resistors serve to both limit the current flow through the transistors, and reduce the voltage drop across them.
    Type: Grant
    Filed: August 4, 1997
    Date of Patent: March 9, 1999
    Assignee: Micron Technology, Inc.
    Inventors: Stephen L. Casper, Manny K. F. Ma, Joseph C. Sher
  • Patent number: 5880919
    Abstract: A surge protector is provided that has a gas tube and at least one MOV that is coordinated with the gas tube such that the MOV interacts with the gas tube to lower the impulse breakdown voltage of a gas tube of a type that has a wide range of DC breakdown voltages across a population of the gas tubes. The gas tube is a generally cylindrical three element gas tube and the MOVs are disposed at opposite ends of the gas with fusible elements maintained in position by a clip. A population of the gas tubes has a range of breakdown voltages and the clamping voltage of the MOVs is set within this range such that the MOV will interact with any gas tube with a breakdown voltage in the population range to divert a surge to ground.
    Type: Grant
    Filed: June 24, 1997
    Date of Patent: March 9, 1999
    Assignee: Siecor Corporation
    Inventors: John J. Napiorkowski, Boyd G. Brower
  • Patent number: 5877930
    Abstract: A circuit for limiting voltage transient excursions on a power supply node is disclosed. The circuit includes a first field effect transistor dispose to provide a capacitance and having source and drain electrodes coupled to said external supply node path and having a gate electrode and first and second clamp transistors. A resistance is coupled between the gate electrode of said first transistor and the internal supply return node and to gate electrodes of the clamp transistors. The circuit also include process resistances between internal and external supply connection to provide a charge transfer path between external and internal supply nodes and external and internal return nodes.
    Type: Grant
    Filed: March 27, 1997
    Date of Patent: March 2, 1999
    Assignee: Digital Equipment Corporation
    Inventor: William B. Gist
  • Patent number: 5875085
    Abstract: This device includes, connected in parallel with each of the elements (I, II), corresponding shunt regulators (S11, R11, S21, R21) linked together in series, and the control electrodes of which are connected to networks of resistors which represent voltages of the elements which can be applied to respective comparators (C11, C12, C21, C22) of the lower and upper threshold voltages (Vth11, Vth12, Vth21, Vth22) of the elements with a reference voltage delivered by a reference voltage source (Vref), a switching MOSFET transistor (4), with low conduction resistance and with defined off-state impedance, connected between the most negative terminal of the set of elements (II) in series and the negative terminal (Vbat-) of the protection device and means of control of the MOSFET transistor from output signals from the comparators (C11, C12, C21, C22) in order to alter the state of the said MOSFET transistor (4) for the purpose of regulating the state of charge and of discharge of the elements (I, II).
    Type: Grant
    Filed: February 23, 1996
    Date of Patent: February 23, 1999
    Assignee: Texas Instruments Incorporated
    Inventor: Joseph Farley
  • Patent number: 5870267
    Abstract: A plurality of LSI circuits including image processing LSI circuits operable in synchronism with a control clock signal from a clock generator are mounted on a graphic board. Temperature sensors are associated with those of the LSI circuits which give off a larger amount of heat than the other LSI circuits. Detected temperature signals from the temperature sensors are supplied to a temperature monitoring microcomputer, which determine respective temperatures of the corresponding LSI circuits based on the supplied detected temperature signals. The temperature monitoring microcomputer determines whether a highest one of the determined temperatures is higher than a first threshold value and a second threshold value which is greater than the first threshold value. If the temperature is higher than the first threshold value and lower than the second threshold value, then the temperature monitoring microcomputer issues a warning signal to a main CPU to suppress overheating of the LSI circuits.
    Type: Grant
    Filed: July 23, 1997
    Date of Patent: February 9, 1999
    Assignee: Konami Co., Ltd.
    Inventor: Toyofumi Kitano
  • Patent number: 5864455
    Abstract: An in-line cord ground fault circuit interrupter which contains within a common housing the sensing unit and the tripping relay usually found separately packaged at a remote location. The fixed contacts are mounted on fixed contact arms mounted adjacent one surface of a printed circuit board with the movable contacts mounted on movable contact arms mounted adjacent the second surface. The tripping relay operates an armature between an open and a closed condition and by cams on the arms of the armature opens and closes the movable contacts with the fixed contacts. The two portion housing allows the components of the interrupter to be mounted on one portion of the housing which also supports the line and load conductors making assembly of the rear housing portion to the front housing portion easy. A stop member and a positioning post are provided on the interior of the front cover to check the position of the armature in the non-energized state to verify proper contact placement and gaps.
    Type: Grant
    Filed: October 1, 1997
    Date of Patent: January 26, 1999
    Assignee: Leviton Manufacturing Co., Inc.
    Inventors: Paul D. Gernhardt, David Y. Chan, Serge P. Krzyzanowski, James Richter
  • Patent number: 5859758
    Abstract: An electro-static discharge (ESD) protection circuit for a semiconductor device includes a primary ESD protection circuit including at least two diodes, the primary ESD protection circuit being located between a positive voltage and a negative voltage, and connected to input/output terminals of the semiconductor device, the primary ESD protection circuit bypassing any static electricity applied from the input/output terminals; and a secondary ESD protection circuit connected to the primary ESD protection circuit in parallel, the secondary ESD protection circuit including at least two diodes.
    Type: Grant
    Filed: May 27, 1997
    Date of Patent: January 12, 1999
    Assignee: LG Semicon Co., Ltd.
    Inventor: Dae Seong Kim
  • Patent number: 5859757
    Abstract: An output transistor supplies a current based on a drive current to a load. An output voltage is divided by a feedback voltage, and an error amplifier outputs a voltage according to a difference in feedback voltage. Furthermore, the base drive circuit controls a drive current of the output transistor according to an output voltage of the error amplifier. The drive current flows into GND via only the drive current detecting resistor. The short-circuit overcurrent protecting circuit detects an overcurrent based on a terminal based voltage of the drive current detecting resistor, and detects an occurrence of a short circuit by observing a feedback voltage. According to the described arrangement, as the need of the short-circuit detection-use transistor to be biased by the drive current can be eliminated, variations in output voltage of the error amplifier can be suppressed, and improved transient response characteristics can be achieved.
    Type: Grant
    Filed: September 26, 1997
    Date of Patent: January 12, 1999
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Koichi Hanafusa, Akio Nakajima
  • Patent number: 5854731
    Abstract: An electrical system has a solid state switch controlled by a circuit emulating the thermal sensor of an electrothermal circuit breaker. A current sensor senses current flowing through the switch. In one arrangement, the current sensor supplies an output to a multiplier, which derives a voltage representative of a current squared, this being supplied to a resistor capacitor circuit having a time constant emulating the thermal sensor. In another arrangement, the output of the current sensor is supplied via an A/D converter to a processor that calculates the difference between heat gain and heat loss of the emulated thermal sensor. The switch is opened when the emulated temperature exceeds a threshold.
    Type: Grant
    Filed: December 22, 1997
    Date of Patent: December 29, 1998
    Assignee: Smiths Industries Public Limited Company
    Inventor: Kevin Paul Thomas
  • Patent number: 5847916
    Abstract: A protector for use in a telecommunications system to establish an electrical connection between two lines includes a base and at least two line terminals extending from one surface of the base. A ground terminal also extends from the one surface of the base and is spaced from the two line terminals. A circuit board is mounted on another surface of the base and has electrical paths on it leading to the at least two line terminals and to the ground terminal. An overload detector is mounted on the circuit board and establishes an electrical connection between the at least two line terminals by way of the electrical paths in normal operation and establishes an electrical connection between at least one of the at least two line terminals and the ground terminal by way of the electrical paths in the event of an overload condition.
    Type: Grant
    Filed: December 22, 1995
    Date of Patent: December 8, 1998
    Assignee: Circa Enterprises Inc.
    Inventor: Jacobus T. Barbier
  • Patent number: 5847912
    Abstract: An active rectifier circuit for automatically selecting a pathway for reversible current to move. The rectifier circuit includes a transistor element that is preferably a MOSFET controlled by an amplifier. The amplifier is coupled to a reference voltage source that regulates operation of the transistor element at a potential much lower than is currently available with diode devices. In one application, the rectifier is a battery protection circuit for use within rechargeable battery packs. The battery protection circuit employs the amplifier to drive a pair of discrete MOSFETs having their sources coupled together. In this application, the amplifier functions as a sensitive current detector. The battery protection circuit automatically detects when any battery cell is over-charged or under-charged thereby opening and protecting the MOSFETs. The battery protection circuit determines the direction of current flow within the battery pack.
    Type: Grant
    Filed: May 3, 1996
    Date of Patent: December 8, 1998
    Inventors: Gregory J. Smith, Anthony D. Wang
  • Patent number: 5841619
    Abstract: To an input terminal is connected one end of the source-to-drain current path of an NMOS the gate of which is connected to Vcc. The other end of the current path of the NMOS is connected by a protection circuit comprised of a PMOS and an NMOS to the common gates of a PMOS and an NMOS in the input stage of an internal circuit. In the protection circuit, the PMOS has its source and gate connected to Vcc and its drain connected to the common gates of the PMOS and the NMOS, while the NMOS has its source and gate connected to Vss and its drain connected to the common drains of the PMOS and the NMOS.
    Type: Grant
    Filed: December 5, 1995
    Date of Patent: November 24, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Shigehara, Yasunori Tanaka, Junya Masumi
  • Patent number: 5841615
    Abstract: A ground fault circuit interrupt system with auxiliary surge suppression ability is provided which includes line-side system, phase, neutral and ground terminals electrically connectable to phase, neutral and ground terminals of an AC source and load-side system, phase, neutral and ground terminals electrically connectable, respectively, to phase, neutral and ground terminals of an electrical load. The system includes a ground fault circuit interrupter including line- and load-side phase and neutral ports for electrical connection to the line-side system, phase and neutral terminals for controlling a state of conduction of AC between the source and electrical load in accordance with a detection of an interrupt condition.
    Type: Grant
    Filed: April 16, 1997
    Date of Patent: November 24, 1998
    Assignee: Leviton Manufacturing Co., Inc.
    Inventor: Bernard Gershen