Abstract: A voltage clamp for protecting a load from transients in a supply line comprising pass transistors coupled to a bias circuit path. The bias circuit path determines the clamp turn-on voltage of the voltage clamp and comprises transistors configured as zener diodes and transistors configured as forward biased pn junctions. The pass transistors are coupled to the bias path so as to conduct current from the supply line to ground when the voltage drop across the bias circuit path reaches the clamp turn-on voltage. The collector-to-emitter voltage drops of the pass transistors during current conduction are equal to one another and sum up to the clamp turn-on voltage, and therefore, the pass transistors advantageously share equally the clamp turn-on voltage drop across their collector-to-emitter junctions. The bias circuit path is temperature compensated so that the clamp turn-on voltage is substantially independent of temperature.

Abstract: A preprocessing circuit receives signals representative of a current circulating in a primary winding and of a current circulating in a secondary winding of a transformer. The signals representative of currents are used to calculate the values of a through current and a differential current. The preprocessing circuit performs a spectral analysis and provides a neural network with signals representative of the fundamental component of the through current, of the fundamental component of the differential current, of the second harmonic and of the fifth harmonic of the differential current. The neural network identifies fault conditions and normal operation states, and supplies a triggering and/or alarm signal to an output when a fault condition is detected.

Abstract: A control method and apparatus is provided for isolating network faults via the communication between neighboring network locations and the control of sectionalizing switches at the network locations. Control apparatus is provided at particular network locations which responds to detected fault conditions and communicates the detected fault condition to the control apparatus at neighboring network locations. The appropriate control apparatus, in response to the information received from neighboring network locations, opens a sectionalizing switch to isolate the fault condition. In one particular arrangement, each control apparatus that detects a fault condition sends a signal to appropriate source-side, neighboring control apparatus to inhibit the source-side control apparatus from opening their respective sectionalizing switches. Further, any control apparatus that detected a fault condition and that does not receive an inhibiting signal, controls its sectionalizing switch to open.

Abstract: The invention provides a circuit to protect an AC motor powered by a Variable Frequency Drive (VFD) from overvoltages caused by reflected waves. A full wave bridge rectifier circuit across the lines of the motor to be protected provides rectified voltage output to a capacitor, across which a low resistance discharge resistor in series with one or more zener diodes is attached. When an overvoltage above the clamping voltage of the zener diode(s) occurs across the protected lines, the zener diode(s) will conduct, causing the excess charge across the capacitor to discharge through the resistor until the voltage drops below the clamping voltage of the diode(s).

Abstract: A protective circuit for protecting internal circuits of semiconductor integrated circuits (ICs) from ElectroStatic Discharges (ESD) into a voltage conduit of a semiconductor IC. The protective circuit is coupled in parallel with the internal circuit of the semiconductor IC such that the protective circuit and the internal circuit are each coupled to a first voltage conduit at a first reference voltage at one end and to a second voltage conduit at a second reference voltage at another end. The protective circuit includes an ESD protection device (or devices) for channeling an ESD discharge from the first voltage conduit through the protective circuit to the second voltage conduit. The protective circuit also includes a control circuit for turning "on" (e.g. operating in a low impedance state) the ESD protection device during the occurrence of the ESD discharge into the first voltage conduit.

Abstract: A novel line-current protection circuit and method that is useable with a PCMCIA modem card is disclosed. The protection circuit is adapted to detect when an excessive voltage is present across the tip and the ring leads of a telephone subscriber loop by sensing the amount of line-current being supplied to line interface circuitry disposed on the PCMCIA modem card. The protection circuit includes a current sensing circuit portion that is placed in series with the tip lead and which detects when the line current exceeds a predetermined maximum amount. In the event the line current exceeds the maximum, the current sensing circuit asserts an excessive line current signal. A control and delay circuit causes the relay circuit to open the electrical connection between the modem and the telephone line only when the line current exceeds a predetermined maximum amount for a minimum amount of time.

Abstract: An improved electro-static discharge and latch-up prevention circuit capable of preventing circuit malfunctions caused by an electro-static discharge and permitting an integrated circuit, in which a bias condition is stable, to perform a signal input/output operation by applying an electro-static having a certain level having a limited range to the integrated circuit, which includes an electro-static discharge prevention unit provided in the interior of or at the outside of an integrated circuit and connected between a positive voltage and a negative voltage in series for preventing positive and negative electro-static discharges; a switching unit connected between the electro-static discharge prevention unit and the interior circuit of the integrated circuit chip for switching; and a control unit for outputting a control signal so as to control a switching operation of the switching unit.

Abstract: Combination coaxial surge arrestor and power extraction apparatus for providing overvoltage protection for a coaxial transmission line carrying both an RF signal and AC power and for extracting AC power from the coaxial transmission line. The surge arrestor comprises a coaxial gas discharge tube with a center conductor and a conductive body. The apparatus includes an inductor for extracting the AC power, the inductor having a high reactance at the frequency of the RF signal and a low reactance at the frequency of the AC power, and a capacitor for passing the RF signal, the capacitor having a low reactance at the frequency of the RF signal and a high reactance at the frequency of the AC power.

Abstract: An electrostatic discharge protection circuit comprising a first transistor formed on a semiconductor substrate adjacently to one side of an insulation oxide film region, for transferring a voltage from a first voltage terminal to an output terminal in response to a first input signal, a second transistor formed on the semiconductor substrate adjacently to the other side of the insulation oxide film region, for transferring a voltage form a second input signal, and an NPN transistor having its collector connected to the first voltage terminal, its emitter connected to the output terminal and its base connected to a bulk region of the second transistor. According to the present invention, when a semiconductor device is exposed to electrostatic discharge, the electrostatic discharge protection circuit discharges charges introduced by the electrostatic discharge before they are discharge through an internal circuitry.

Abstract: An apparatus to provide protection for electronic devices which receive power for their operation at least in part from a vehicle's electrical system and battery. The electronic device protecting apparatus has an electrical system voltage sensor, an engine start sensor, and an electronic device decoupler interconnected such that the electronic devices are decoupled from the electrical system and battery when the battery voltage drops below a predetermined level and when the engine is being started. The preferred apparatus allows the operator to select between a warning that system voltage is low and an automatic restart of the vehicle's engine and charging system. The apparatus further includes a bypass function to accommodate electronic devices which draw temporarily high current.

Abstract: A power circuit includes a high-side transistor, a low-side transistor and a current sensing resistor in series connection as well as a threshold detection circuit for turning off the transistors when the current in the current sensing resistor exceeds a predetermined level. The circuit further includes a driver circuit for providing a bias voltage to the low-side transistor and a voltage storing device, such as a capacitor, coupled from the low-side transistor to the driver circuit to maintain the bias voltage at a sufficient magnitude to momentarily keep the low-side transistor on during a fault condition.

Abstract: According to a field ground fault detector, a predetermined resistor is connected in series to a predetermined DC voltage. A DC voltage is applied between an N electrode side field circuit of a generator and a ground through the resistor. A voltage applied between terminals of the resistor is input to a low-pass filter. A voltage applied between the N electrode side field circuit and the ground is input to another low-pass filter. Output voltages of the low-pass filters are input to a level ratio determining circuit. The level ratio determining circuit outputs the determined result of the ground fault to the outside of the field ground fault detector corresponding to these voltages. Thus, even if the DC voltage varies or a higher harmonic voltage takes place in a generator of a thyristor exciting type, it does not affect the detecting sensitivity of the ground fault.

Abstract: A MOS field-effect transistor (T2) is provided in conjunction with transistors (T1 and T3) as polarity reversal protection in an electrical circuit arrangement (1). Polarity reversal protection of this type is realized by the drain-source path of the transistor (T2). Transistors (T1 and T3) form a comparator. If the drain-source voltage of the transistor (T2) becomes negative then the transistor (T3) switches on. This, in turn has the effect of switching off the transistor (T2) thereby providing polarity reversal protection. The electronic circuit arrangement (1) configured according to the invention can advantageously be used in an airbag system (10).

Abstract: A motor starter for an electrical circuit includes separable contacts for switching an electrical current flowing between a power source and a motor; an operating mechanism responsive to a trip signal for opening and closing the separable contacts; a separable contact state detection circuit providing an operating signal having two states corresponding to the open and closed positions of the separable contacts; a current transformer sensing the electrical current flowing between the power source and the motor and providing a sensed current value; and an overload relay generating the trip signal as an I.sup.2 t function of the sensed current value and the two states of the operating signal. The overload relay employs a pair of thermal time constants which closely model the motor under both natural convection and forced air cooling conditions.

Abstract: A motor control assembly and method of controlling a motor includes a three phase variable reluctance motor. Each phase includes two separate coils driven by separate driver circuits under the control of a microcomputer. The microcomputer monitors feedback from each driver circuit to determine faults or errors in the driver circuits or respective coils. In the case of a fault detection, one of the driver circuits and coils for each phase may be disabled to allow continued operation of the motor with the remaining driver circuits and coils.

Abstract: A faulted circuit indicator includes a variable load levelling circuit which can automatically adjust itself to a peak current in order to accommodate a relatively wide range of load currents. The variable load levelling circuit is operatively connected to a current sensing circuit and is responsive to a varying load current flowing through the cable for regulating a variable output voltage therefrom to be at a constant reference value. As a result, the need to store in inventory large quantities of fault indicators with different rated currents has been substantially reduced.

Abstract: An ESD protection circuit for use in a CMOS output buffer circuit has been disclosed. The ESD protection circuit provides a high ESD failure threshold in a small layout area to protect the output buffer against ESD failure. The output buffer includes a pull-up PMOS device and pull-down NMOS device whose common drain is connected to an output pad. The source of the PMOS device is connected to VDD and the source of NMOS device is connected to VSS. The ESD protection circuit is formed by a PTLSCR device and an NTLSCR device. The PTLSCR (NTLSCR) is formed by inserting a short-channel thin-oxide PMOS (NMOS) device into a lateral SCR structure. These MOS devices reduce the turn-on voltage of the lateral SCR to the snapback breakdown voltage of the MOS rather than the original switching voltage of the SCR. The ESD protection circuit also includes two parasitic diodes D.sub.p between output pad and VDD and D.sub.n between output pad and VSS.

Abstract: A relay for monitoring an electrical system to protect the electrical system from an overcurrent condition as a time dependent function of an electrical current level in the electrical system is disclosed. The relay includes a memory which stores a current level count and a current level detector coupled to the electrical system which detects the electrical current level in the electrical system over time. A microprocessor responds to the current level detector by varying the current level count in the memory as a function of the electrical current level over time. The microprocessor also detects an occurrence of the electrical current level falling below a minimum current level. A timer responds to the microprocessor by measuring a period of time during which the electrical current level is less than the minimum current level.

Abstract: An apparatus for protecting an integrated circuit against damage from electrostatic discharges (ESD) includes a single ESD bus that is connected to multiple input pads through a respective diode. The ESD bus is isolated from the positive power supply bus V.sub.DD. The ESD bus is coupled to the negative power supply bus V.sub.SS by a FET-triggered SCR circuit. ESD charge on an input pad forward biases the respective diode and charges the ESD bus. When the voltage of the ESD bus reaches a predetermined threshold voltage, the FET breaks down, and triggers the SCR circuit to shunt the charge on the ESD bus to V.sub.SS. The threshold voltage is selected such that, in normal operation, voltages higher than V.sub.DD may be applied to the input pad without input leakage current.

Abstract: The invention is a self-terminating helper flip-flop buffer circuit pertinent to a dynamic random access memory (DRAM) or static random access memory (SRAM) device. The invention turns off a device which is sourcing current to pull the data line low. The device is turned off when the potential on the low data line has transitioned to the trip point of the output data latch. The circuit of the invention senses the transition and provides the self terminating signal to the current source.