Abstract: A receiving station repeatedly performs decoding processing of data in a decoding processing portion, performs error detection of the decoding results, and transmits to a transmitting station an error detection result (ACK/NACK) for decoding results for a preset number of executions, and moreover issues a request to the transmitting station to modify the data transmission interval based on the data reception characteristic. The transmitting station transmits data at transmission intervals according to the transmission interval modification requests sent from the receiving station. The receiving station selectively inputs to the decoding processing portion the data received from the transmitting station and the previous decoding result data.

Abstract: A method and device for selectively refreshing a region of a non-volatile memory of a data storage device is disclosed. In a particular embodiment, a method is disclosed that includes comparing a time stamp received from a host device to a first time stamp retrieved from a data storage device for a first region of a non-volatile memory, the first region including a least recently accessed region of a memory array within the data storage device. The method also includes selectively refreshing the first region based on a comparison of a difference between the time stamp received from the host device and the first time stamp as compared to a threshold, where the threshold is adjusted based on a first error count corresponding to a number of errors detected by an error correction code (ECC) engine with respect to data retrieved from the first region.

Abstract: Some embodiments of the present invention provide a system that can be reconfigured to provide error detection and correction after a failure of a memory component in a memory system. During operation, the system accesses a block of data from the memory system, wherein each block of data in the memory system includes an array of bits logically organized into R rows and C columns, including two checkbit columns containing checkbits, and C?2 data-bit columns containing data bits, wherein each column is stored in a different memory component, and wherein the checkbits are generated from the data bits to provide block-level detection and correction for a failed memory component. Next, upon examining the block of data, the system determines that a specific memory component in the memory system has failed.

Abstract: Methods and systems are provided for implementing quality of service (QoS) by using Hybrid ARQ (HARQ) response for triggering the EV-DO reverse activity bit (RAB). In an embodiment, an access node provides service to a plurality of access terminals, the plurality including a select group of one or more access terminals. The access node detects that it has, over a time period, sent more than a threshold number of HARQ negative acknowledgements (NACKs) with respect to reverse-link communication of the select group, and responsively (1) sets the RAB for the first wireless coverage area and (2) instructs the select group of access terminals to ignore the RAB. The select group ignores the RAB, while the rest of the access terminals obey the RAB.

Abstract: A quadratic permutation polynomial (QPP) interleaver is described for turbo coding and decoding. The QPP interleaver has the form: ?(n)=f1n+f2n2 mod K, where the QPP coefficients f1 and f2. are designed to provide good error performance for a given block length K.

Abstract: A method and apparatus for encoding channel quality indicator (CQI) and precoding control information (PCI) bits are disclosed. Each of the input bits, such as CQI bits and/or PCI bits, has a particular significance. The input bits are encoded with a linear block coding. The input bits are provided with an unequal error protection based on the significance of each input bit. The input bits may be duplicated based on the significance of each input bit and equal protection coding may be performed. A generator matrix for the encoding may be generated by elementary operation of conventional basis sequences to provide more protection to a most significant bit (MSB).

Abstract: Transmitters and receivers deal with streams of data, wherein the receiver is expected to begin using received data before receiving all of the data. Concurrent streams are sent and FEC coding is used with the streams and done as an aggregate. The transmitter performs FEC operations over the plurality of streams, wherein source blocks from at least two streams logically associated into a jumbo source block and FEC processing is performed to generate one or more jumbo repair block from the jumbo source block. Each of the source blocks comprises one or more source symbols from their respective stream. The jumbo source symbols can be of constant size and are suitably aligned along size boundaries that make processing efficient. Each source symbol need not be the same size, and the number of source symbols from each stream in a jumbo source block need not be the same value across streams.

Abstract: A method and system for wireless data communication. A request is accepted for communication of a data collection including a plurality of data objects. For each of the plurality of data objects, content importance and error resilience properties are evaluated. A transmission order of the data objects is determined based upon evaluated content importance, error resilience properties, past channel conditions and predicted channel conditions, and one or more data objects are selected based on the determined order. An error control level is selected for transmission of data packets for communicating the selected data objects based upon error resilience properties and current channel conditions to achieve communication of the data collection.

Abstract: A maximum likelihood detection (MLD) method is disclosed. Received data is processed to obtain preliminary parameters. An initial radius r is determined. r2 is multiplied by a corresponding scaling factor according to a partial Euclidean distance (PED) constraint function to determine the upper limit values of PED for each layer. It is examined whether a sub-lattice exceeds a search scope according to the upper limit values of PED for each layer to search a better solution by utilizing the preliminary parameters.

Abstract: A memory device includes a semiconductor memory including a plurality of memory cells, and a controller including a buffer which temporarily stores data, a data pattern check circuit which checks a predetermined data pattern of data that are stored in the buffer and are to be stored in a plurality of neighboring ones of the memory cells, and sends an address in accordance with a result of the check, and a data correction circuit which corrects a value of data at the address that is sent, and sends the corrected value to the semiconductor memory.

Abstract: Data structures of different sizes may be stored in memory using different ECC schemes. A memory device may include multiple ECC engines to support error correction operations on different sized data structures.

Abstract: A method and system are disclosed for detecting memory chip failure in a computer memory system. The method comprises the steps of accessing user data from a set of user data chips, and testing the user data for errors using data from a set of system data chips. This testing is done by generating a sequence of check symbols from the user data, grouping the user data into a sequence of data symbols, and computing a specified sequence of syndromes. If all the syndromes are zero, the user data has no errors. If one of the syndromes is non-zero, then a set of discriminator expressions are computed, and used to determine whether a single or double symbol error has occurred. In the preferred embodiment, less than two full system data chips are used for testing and correcting the user data.

Abstract: A communication apparatus that is present between each of receiver and sender LANs including a user network and a WAN, and relays a packet exchanged between the sender and receiver LANs through the WAN while correcting an error in the packet. The communication apparatus determines whether to perform error correction on a packet received from the sender LAN. When it is determined not to perform the error correction, the communication apparatus instantly transfers the packet to the receiver LAN.

Abstract: A memory controller includes a buffer to which data, which is to be transferred to a memory, is input, an ECC parity generating unit which generates an ECC parity in units of a predetermined data length from the data which is to be transferred to the memory, and a memory interface which adds the generated ECC parity in units of the predetermined data length, and delivers the data with the ECC parity to the memory. When a data length of the data which is to be transferred to the memory is less than the predetermined data length, the ECC parity generating unit regards data of a part that is short of the predetermined data length as “0”, and generates the ECC parity from the data of less than the predetermined data length.

Abstract: In a transmitter, a standard stream of encoded multi-media data and uniform error correction data is transmitted through a first channel. The uniform error correction data provides substantially the same error correction for all portions of the encoded multimedia data. Simultaneously, additional unequal error correction data is generated for critical portions of the standard stream and not for other portions of the standard stream, and the additional error correct data is transmitted through a second channel. In a receiver, the additional error correct data is used to error correct just the critical portions of the standard stream, and then the uniform error correction data is used to error correct all the portions of the encoded multimedia data of the standard stream.

Abstract: In a method of rewriting a primary sector of a sector erasable semiconductor memory device, a bootloader code is copied from the primary sector to a second sector, all content of the first sector is subsequently erased, and the bootloader code is recopied from the second to the primary sector. Subsequently, an application code is written to a remaining unused part of the primary sector.

Abstract: A method for encoding a block of data to allow it to be stored or transmitted correctly in the face of accidental or deliberate modifications, the method including constructing a number n greater than one of original components, each of which is derived from the block and each of which is smaller than the block, and combining original components to construct a number m greater than one of new components, wherein each of the new components is smaller than the sum of the sizes of the original components combined to produce it, wherein the block can be reconstructed from any set of n different components selected from the original components and new components, and wherein a set of n different components selected from the original components and new components contains more redundant information about the block than the set of n original components.

Abstract: An aspect of the present invention reduces the additional number of signal lines of a bus for control signals by using a set of signal lines to transfer data bits in some durations and to transfer control signals in some other durations. In one embodiment, the same signal lines are used to transfer data in a data transfer phase, and for bus arbitration in a bus arbitration phase. As a result, the total number of signal lines of a bus (bus width) is reduced. According to another aspect of the present invention, an arbitrator block allocates the bus to one of the requesting modules according to an assigned priority and least recently used (LRU) policy.

Abstract: An optical disk having a diameter less than 140 mm and, a thickness of 1.2 mm±0.1 mm, with a plurality of record tracks having data recorded thereon as embossed pits representing information and exhibiting a track pitch in the range between 0.646 ?m and 1.05 ?m; with the tracks being divided into a lead-in area, a program area and a lead-out area. The data includes table of contents (TOC) information recorded in a plurality of sectors in at least one TOC track and user information recorded in a plurality of sectors in user tracks; with the TOC information including addresses of start sectors recorded in the user tracks. The data (both user and TOC information) is encoded in a long distance error correction code having at least eight parity symbols, and is run length limited (RLL) modulated.

Abstract: A method and system for large data transfer between a sender and a receiver. The sender transmits to the receiver a plurality of data packets in sequence. The time elapsed for each of the plurality of data packets after transmission of said each of the plurality of data packets is determined. The receiver transmits a message from the receiver to the sender notifying the sender that an identified one of the plurality of the data packets is missing. The sender retransmits to the receiver the identified one of the plurality of data packets only when the elapsed time determined for the identified one of the plurality of the data packets is greater than a predetermined time interval.