Abstract: A semiconductor device according to the invention includes an epitaxial layer of a first conductivity type, a first well of a second conductivity type to which a first potential is applied, a second well of the second conductivity type to which a second potential that differs from the first potential is applied, a third well of the first conductivity type provided in the epitaxial layer between the first well and the second well, a first impurity region of the first conductivity type provided in the epitaxial layer under the first well, a first MOS transistor provided in the first well, a second MOS transistor provided in the second well, and a third MOS transistor provided in the third well, the first impurity region having a higher impurity concentration than the epitaxial layer.

Abstract: A process is used to form a protective layer to cover a divot between two regions of a semiconductor material. During etching processes, the protective layer protects the divot to be etched away and reduces material loss of a Silicon (Si)-shallow trench isolation (STI) substrate. A selective coverage is provided to protect the height of the Si-STI substrate and an Si-STI interface. A desirable geometry can be obtained for forming a silicon germanium (SiGe)layer with uniform thickness near the divot.

Abstract: A method of bonding components is disclosed. One embodiment of such a method includes applying both heat and pressure to a stack of components that includes an interposer with a reduced degree of warpage. Reducing the distance between the interposer and a first component of the stack of the components until a spacer prevents further reduction of that space. Then, cooling the stack of components while the pressure is maintained such that the degree of warpage of the interposer remains reduced.

Abstract: A method of manufacturing an organic light-emitting display apparatus including preparing a mother substrate that includes a plurality of display areas; forming a plurality of pixel electrodes on each of the display areas of the mother substrate; preparing a donor mask that includes a base substrate having a plurality of display transferring areas corresponding to the plurality of display areas, the base substrate including a groove between the display transferring areas, a light-to-heat conversion layer on the base substrate, and a reflective layer between the base substrate and the light-to-heat conversion layer and being patterned to include through holes in each of the display transferring areas; depositing a transferring layer on the light-to-heat conversion layer of the donor mask; aligning the mother substrate and the donor mask; and transferring portions of the transferring layer that overlie the through holes onto the pixel electrodes on the mother substrate.

Abstract: One illustrative embodiment involves forming a plurality of trenches in a substrate so as to define a fin, forming a first oxidation-blocking layer of insulating material in the trenches so as to cover a portion, but not all, of the sidewalls of the lower portion of the fin, forming a second layer of insulating material above the first oxidation-blocking layer of insulating material, and performing a thermal anneal process to convert part, but not all, of the lower portion of the fin positioned above the first oxidation-blocking layer of insulating material into an oxide fin isolation region positioned under the fin.

Abstract: A photoelectric conversion apparatus includes a TFT 10 provided on one surface of a substrate 1, a second interlayer insulation film 7 provided so as to cover the TFT 10, a shading film 9 provided on the second interlayer insulation film 7 in an area overlapping the TFT 10 when seen from a thickness direction of films that are formed on the substrate 1, a lower electrode 8 provided on the second interlayer insulation film 7, and a semiconductor film 21 having a chalcopyrite structure provided on the lower electrode 8. A group 16 element is included in the shading film 9, the lower electrode 8 and the semiconductor film 21.

Abstract: Disclosed is a method of manufacturing integrated circuit (IC) chips. In the method, wafers are received and the backside roughness levels of these wafers are determined. Based on the backside roughness levels, the wafers are sorted into different groups. Chips having the same design are manufactured on wafers from all of the different groups. However, during manufacturing, process(es) is/are performed differently on wafers from one or more of the different groups to minimize systematic variations in a specific parameter (e.g., wire width) in the resulting chips. Specifically, because systematic variations may occur when the exact same processes are used to form IC chips on wafers with different backside roughness levels, the method disclosed herein selectively adjusts one or more of those processes when performed on wafers from one or more of the different groups to ensure that the specific parameter is approximately equal in the resulting integrated IC chips.

Abstract: A method of fabricating an integrated circuit includes the following steps. A first reticle is used to form a first pattern and a first alignment mark and a second reticle is used to form a second pattern and a second alignment mark in a same layer. A third reticle is aligned to the first alignment mark and the second alignment mark, to obtain an overlay correction value; additionally, a third reticle is aligned to the first alignment mark to obtain a first overlay correction value, a third reticle is aligned to the second alignment mark to obtain a second overlay correction value, and a total overlay correction value is obtained by trading off the first overlay correction value and the second overlay correction value. The third reticle is used to form a third pattern by aligning the third reticle with the total overlay correction value.

Abstract: Disclosed is a technique for fabricating a bio-photovoltaic cell which includes coupling graminoids extracted from natural grasses to a semiconductor electron acceptor, on which plasmonic silver nanoparticles are aligned, by using an organic ligand material. More particularly, disclosed is a technique for fabricating a new renewable energy generation device useable for fabrication of high efficiency bio-photovoltaic cells by improving a photo-electron generation rate of graminoids through a surface plasmon effect of silver nanoparticles and increasing an effective photo-electron amount transferred to the electron acceptor due to optimized bonding between a photo sensitizer and an electron acceptor.