Abstract: A method of producing a solid electrolytic capacitor including the steps of producing a sintered anode on a capacitor body which anode has a dielectrically effective oxide coating, producing the capacitor cathode by immersing the capacitor in a bath containing a pyrolytically decomposable compound of the element needed for production of the cathode, and while still in the immersion bath, applying a given voltage to the capacitor body, then lowering the voltage to a further value, removing the capacitor body and producing the cathode by pyrolytic decomposition. A graphite layer is then applied in a known manner and an additional coating is produced by further immersing the capacitor body in another bath which contains a pyrolytically decomposable compound of the element needed for that additional coating. A voltage is also applied in the additional bath and after a lapse of time the capacitor is removed and finished in a known manner.

Abstract: A self-aligned gate field effect transistor is described which is capable of operating at high frequencies. A method for making the transistor is described which comprises plating metal partially over an oxide layer, then removing the oxide to produce an overlapping metal portion and then plating again to produce a gate contact between the overlapping metal portions.

Abstract: A process for fabricating complementary metal oxide semiconductors including doping to determine threshold voltage of a first conductivity channel device with second conductivity type impurities, counter-doping to determine the threshold voltage of a second conductivity channel device with second conductivity impurities, forming gate oxide, forming metal gate, and forming source and drain regions using the metal gate as a self-aligned mask. Preferably, the doping steps are performed using ion implantation and photoresist mask.

Abstract: An improved method for forming an isolation region of electrical insulator between elements of a semiconductor device, comprising depositing an electrical insulator at a low temperature to cover one major surface of a semiconductor substrate and to fill a groove provided in this surface of the semiconductor substrate, coating the electrical insulator layer with another electrical insulator which is etched at a rate approximately equivalent to that of the former electrical insulator, so as to make the entire top surface of the electrical insulator layer parallel to the major surface of the substrate, and then applying physical etching using ions to remove the electrical insulator layers until the surface of the substrate is exposed, whereby to provide in the groove an isolation region having a satisfactory surface flatness.

Abstract: A solid state pH measuring electrode having the pH measuring electrode structure formed by successive layers on an insulating substrate with an outer pH sensitive glass layer being deposited on a supporting solid electrolyte layer by RF sputtering. The reference electrode is similarly formed by depositing an outer layer of glass onto a supporting solid electrolyte layer by RF sputtering with the temperature expansion of the glass and supporting solid electrolyte structure being selected to produce a differential expansion causing random cracking of the glass layer during temperature cycling of the reference electrode. A combination structure is provided wherein the pH measuring electrode and the reference electrode are formed on opposite sides of the same electrically insulating substrate with a thermal compensating element being included in the integrated package.

Abstract: A solid state pH measuring electrode having the pH measuring electrode structure formed by successive layers on an insulating substrate with an outer pH sensitive glass layer being deposited on a supporting solid electrolyte layer by RF sputtering. The reference electrode is similarly formed by depositing an outer layer of glass onto a supporting solid electrolyte layer by RF sputtering with the temperature expansion of the glass and supporting solid electrolyte structure being selected to produce a differential expansion causing random cracking of the glass layer during temperature cycling of the reference electrode. A combination structure is provided wherein the pH measuring electrode and the reference electrode are formed on opposite sides of the same electrically insulating substrate with a thermal compensating element being included in the integrated package.

Abstract: A method for manufacturing a semiconductor indicating instrument or display device employing a silicon carbide crystal having a first ohmic contact with an n-type region and at least one second ohmic contact with a p-type region. Another region is disposed between the regions of opposite types of conductivity. The silicon carbide crystal also has an additional region with structure defects which are clusters with a concentration of 10.sup.19 cm.sup.-3 to 10.sup.22 cm.sup.-3, that region adjoining the second ohmic contact and having a thickness greater than that of the p-type region by at least 0.05 m.mu.. The method is characterized in that, in order to produce the additional region, the p-type region is bombarded with ions of an inert gas with an ion flow density of 3.1.multidot.10.sup.13 ion/cm.sup.2 .multidot.sec to 1.25.multidot.10.sup.14 ion/cm.sup.2 .multidot.sec, an ion energy of 10 to 400 keV and an irradiation dose of 1.2.multidot.10.sup.16 ion/cm.sup.2 to 6.2.multidot.10.sup.17 ion/cm.sup.2.

Abstract: A semiconductor integrated circuit which is reduced in size by having active and/or passive elements in an epitaxial layer having a [100] crystallographic surface, and having anisotropically etched regions with sloped [111] crystallographic surface walls which isolate adjacent semiconductor elements and/or regions of semiconductor material beneath said elements. Conductors interconnecting said elements are supported on the [100] and [111] crystallographic surfaces and contact said elements and/or said high conductivity regions through apertures in surface passivating protective coatings on said surfaces.

Abstract: A silicon-gate insulated gate field effect transistor device has a thick field oxide in contiguous surrounding relation to its gate electrode and with a surface coplanar with or slightly higher than the surface of the gate electrode, thus facilitating crossovers and contacts to the gate electrode. The method of making this device includes forming a self-aligned silicon gate structure on a silicon wafer, masking the gate structure against the diffusion of oxygen, and thereafter oxidizing the silicon wafer to grow a thick silicon dioxide layer in surrounding relation to the silicon gate structure.

Abstract: A silicon controlled rectifier has a triangular base with a planar mounting surface and holes at the apices of the angles to receive screws for mounting the rectifier to a heat sink surface. An anode ring having a skirt is threaded to a flange on the base and a semiconductor pellet is positioned on the base within the flange. A spring loaded cathode tube is positioned coaxially within the anode ring in engagement with the semiconductor pellet and a spring loaded gate is positioned coaxially within the cathode tube in engagement with the pellet to pressure mount the pellet on the base. A predetermined torque is applied to the anode ring when assembling it to the base to provide an accurate, predictable load on the pellet.

Abstract: A method of making a semiconductor device which has sharp corners on an upper surface and wherein a passivation layer is formed over said surface and windows are formed in the passivation layer for the attaching and formation of electrodes in which a photoresist material is placed over the passivation layer and selectively removed so as to leave areas of photoresist at locations over said passivation layer wherein electrodes are to be formed after which a layer of metal is formed over the surface and the metal and photoresist is removed at those portions where the photoresist layer remained after which passivation the area is etched through the windows in the metal layer and the metal layer is then removed and the electrodes are formed in the windows.

Abstract: The fabrication of a charge-coupled device consists in forming an insulating layer in the form of a periodic series of insulating steps, in depositing a metallic layer on alternate steps so as to form electrodes, in implanting regions doped with a type opposite to the substrate into the surface of the semiconductor by directing an ion beam through the insulating steps of small thickness which are transparent to the beam, and in connecting each electrode to a control line.

Abstract: A silicon controlled rectifier having a triangular base with a planar mounting surface and holes at the apices of the angles to receive screws for mounting the rectifier to a heat sink surface. A cylindrical anode is connected to the base and a semiconductor pellet is positioned on the base within the cylindrical anode. A spring loaded cathode tube is positioned coaxially within the cylindrical anode in engagement with the semiconductor pellet and a spring loaded gate is positioned coaxially within the cathode tube in engagement with the pellet to pressure mount the pellet on the base.

Abstract: A process for manufacturing a solar cell from a reject semiconductor wafer comprising stripping all external layers from the wafer, etching the surfaces of the wafer so as to effectively remove all P/N junctions without pitting the wafer surface, introducing a layer of dopant to form a P/N junction in the front wafer surface, forming a first patterned conductive electrode over the dopant layer, and forming a second conductive electrode on the back surface of the wafer. In the preferred embodiment a sputtering operation is used to form the conductive electrodes.

Abstract: A method comprises forming a Schottky barrier forming a metal layer on one surface of a gallium arsenide substrate using niobium, tantalum and/or vanadium to provide a Schottky barrier, and subjecting the Schottky barrier to heat treatment at 350.degree. to 800.degree. C so as to render it thermally stable.

Abstract: A method of manufacturing an insulated gate field effect transistor comprising providing a semiconductor body portion of one type conductivity, providing on a surface of said body portion an impurity masking layer having two adjacent apertures with the portion of the masking layer between said apertures and part of its thickness being of a masking material other than silicon dioxide and also capable of masking the silicon against oxidation, providing by impurity introduction through said apertures spaced surface regions of opposite type conductivity in said body portion, subjecting at least the surface portions of the body portion overlying the opposite type surface regions and adjacent the oxidation masking material to an oxidation treatment causing thereon the growth of a silicon dioxide that penetrates into the body portion except where masked by the oxidation masking material forming a silicon mesa under said oxidation masking material, applying a gate electrode insulated from and over the surface portion

Abstract: A monolithic semiconductor device including a resistor comprising a first region of one type conductivity, has means for controllably establishing the value of the resistor comprising two additional regions of the opposite type conductivity disposed respectively on opposite sides of the conductive path of the resistor, whereby the width of the resistor is defined by the extent of the additional regions into the first region. Where the monolithic semiconductor device comprises an integrated circuit device including a lateral transistor, the additional regions may be formed simultaneously with the emitter and collector regions of the transistor while utilizing the same doping mask, whereby any variation in the base width of the transistor is made proportional to the variation in the width of the resistor.

Abstract: A silicon solar energy cell having a diffusant junction extending inwardly from one surface, an aluminum-silicon junction of the opposite polarity extending inwardly from the other surface, and a film of aluminum-oxygen-diffusant formed over the aluminum-silicon junction. The structure is formed by diffusing an unprotected wafer, coating the diffusant glass so formed on one side of the wafer with aluminum, and heating the wafer.

Abstract: An improved FET structure and method of making same is disclosed. The gate structure of the FET includes a phospho-silicate glass as the insulator and polysilicon as the gate conductor. A thin layer of silicon nitride is formed over the polysilicon and selectively etched so as to remain only over gate areas and other areas where it is desired to extend the polysilicon as a conductor. The unmasked polysilicon is oxidized to form the thick oxide surface coating. The disclosure also describes the use of oxide rings and epitaxial layers to reduce parasitic effects between adjacent FET devices in an integrated circuit.

Abstract: A process for manufacturing MES-FET transistors with self-aligned Schottky barrier gate electrode, in which a layer of metal is deposited on a semiconductor slice, a resist geometry corresponding to the spacing of the drain and source ohmic contacts is defined, the excess metal is etched away with controlled underetching under said resist, a metal is then evaporated for forming the ohmic contacts, the metal remaining after said etching constituting the self-aligned gate electrode.