Abstract: An integrated convective accelerometer device. The device includes a thermal acceleration sensor having a thermopile and a heater element; control circuitry for providing closed-loop control of the thermopile common-mode voltage; an instrumentation amplifier; clock generation circuitry; voltage reference circuitry; a temperature sensor; and, output amplifiers. The device can be operated in an absolute or ratiometric mode. Further, the device is formed in a silicon substrate using standard semiconductor processes and is packaged in a standard integrated circuit package.

Abstract: A current mirror replica biasing system where the resistor-programmable base current of a current reference transistor is accurately and scalably mirrored and input to the base of an output transistor, the current provided by the output transistor being useful as bias current to a load circuit, including a current reference transistor and an output transistor of like polarity; a pair of bipolar transistors, of like polarity to each other and opposite polarity to the current reference transistor and output transistor, arranged as a current mirror to mirror the base current of the current reference transistor, which base is exclusively interconnected to the input of the current mirror; and a current source to establish a desired reference current in the current reference transistor; wherein variations in the current source circuitry can result in circuit performance of the current mirror replica biasing system that is proportional to absolute temperature, or other desired function.

Abstract: A high gain amplifier includes a differential amplifier stage having a pair of transistors; first and second input circuits for providing input signals to the pair of transistors; transistor means arranged as a differential-to-single-ended converter driven by the differential amplifier stage to provide a single ended output signal; an intermediate gain stage having an input responsive to the single ended output signal; bias means for the differential amplifier, the bias means including circuit means for maintaining the currents through the pair of transistors in constant ratio independently of changes in load at the intermediate gain stage; and an inverting gain output stage driven by the intermediate gain stage and having an output for driving a load substantially from rail to rail. Also disclosed is a frequency compensation capacitor circuit connected between the input of the intermediate gain stage and the output of the inverting gain output stage.

Abstract: A high gain amplifier includes a differential amplifier stage having a pair of transistors; first and second input circuits for providing input signals to the pair of transistors; transistor means arranged as a differential-to-single-ended converter driven by the differential amplifier stage to provide a single ended output signal; an intermediate gain stage having an input responsive to the single ended output signal; bias means for the differential amplifier, the bias means including circuit means for maintaining the currents through the pair of transistors in constant ratio independently of changes in load at the intermediate gain stage; and an inverting gain output stage driven by the intermediate gain stage and having an output for driving a load substantially from rail to rail. Also disclosed is a frequency compensation capacitor circuit connected between the input of the intermediate gain stage and the output of the inverting gain output stage.

Abstract: A high gain amplifier includes an intermediate gain stage; an output gain stage driven by the intermediate gain stage; an input stage, for driving the intermediate gain stage, which is balanced between positive and negative feedback in normal operation; bias means for driving the input stage to maintain balance between positive and negative feedback in normal operation; and a resistance for limiting the output current of the intermediate stage in response to the input stage being overdriven into positive feedback.

Abstract: A circuit is presented which sets the transconductance of a FET using a resistor. The circuit comprises a resistor and first and second FETs series-connected in sequence between a supply voltage and a circuit common point, and third and fourth FETs and a bias current source series-connected in sequence between the supply voltage and the circuit common point. The drain and gate of the fourth FET are connected to the gate of the second FET and the gates of the first and third FETs are cross-coupled to the drains of the third and first FETs, respectively. The bias current source provides a starting current for the circuit. When so arranged, and with the threshold voltages of the first and second FETs matched, the transconductance of the second FET is directly proportional to 1/R1. The circuit can in turn be used to bias other transistors in a reproducible way to fix the transconductance of an amplifier according to the selected resistor value.

Abstract: A dynamic bridge system with common mode range extension includes a dynamic bridge circuit having a pair of input terminals for receiving common mode and normal signals, a pair of intermediate terminals and an output terminal and reference terminal; a differential amplifier has its inputs connected to the intermediate terminals and its output connected to the output terminal; a pair of balanced loads is each connected at one end to an intermediate terminal; and an inverting amplifier responsive to the common mode signal at the inputs of the differential amplifier drives the other ends of the balanced loads in opposition to changes in the common mode signals at the inputs of the differential amplifier.

Abstract: A circuit for sensing a magnetic field has at least one saturable coil (L1). The circuit includes switches (S1, S2) controlled by a comparator (12) to drive the coil (L1) to saturation by alternating polarities of current. In the absence of an external magnetic field the currents are balanced. An applied external magnetic field causes an unbalance in the coil (L1) in reaching saturation. An unbalance current is applied through a sensing resistor (R2) to an integrator (20) to develop an output voltage (Vo) as a measure of the applied magnetic field. The switches (S1, S2) are implemented by transistor switches. Dual (FIG. 1) and single (FIG. 2) supply rail circuits are disclosed. The circuit finds particular application in torque transducers using magnetoelastic elements.

Abstract: A CMOS amplifier includes a FET differential input stage, with the input transistors' sources connected to a common tail current. A first current mirror reflects the drain current from one input FET to the other at a first node. A pair of FETs are connected to conduct respective currents in response to the voltage at the first node. One of the currents drives a load at a second node, which is connected to one of the input stage gates such that the output voltage tracks an input voltage applied to the other input stage gate. The other current is reflected via a second current mirror to provide the common tail current. By properly sizing the FETs to achieve particular current densities, the tail current is automatically varied to adjust the operating point of the differential input stage such that, when the amplifier is in equilibrium, the drain voltages of the input FETs are kept equal over a wide range of output currents.

Abstract: A semiconductor magnetic field sensor including a substrate; a semiconductor moveable element suspended above the substrate, the moveable element being configured to have a current passed therethrough and to deflect perpendicularly with respect to an applied magnetic field; and at least one fixed semiconductor element arranged adjacent to the moveable element, the moveable element being deflected to or away from the fixed element in response to an applied magnetic field.

Abstract: A non-inverting driver circuit for an LDO pass device employs a level-shifting inverter stage followed by a normalizing inverter stage. The level-shifting stage converts the output common-referenced output of the error amplifier to a current, which is provided to the normalizing inverter. The normalizing stage is referred to the LDO input voltage, enabling its output signal to remain largely invariant with respect to changes in input voltage. The driver is preferably configured to have a low output impedance, so that when driving the high gate capacitance of a MOS pass device, the resulting pole is moved to a higher frequency than would be possible with a non-inverting driver having a high output impedance. With the driver being non-inverting and the low frequency pole moved higher, frequency compensating the regulator is simplified.

Abstract: A monolithic capacitance-type microstructure includes a semiconductor substrate, a plurality of posts extending from the surface of the substrate, a bridge suspended from the posts, and an electrically-conductive, substantially stationary element anchored to the substrate. The bridge includes an element that is laterally movable with respect to the surface of the substrate. The substantially stationary element is positioned relative to the laterally movable element such that the laterally movable element and the substantially stationary element form a capacitor. Circuitry is disposed on the substrate and operationally coupled to the movable element and the substantially stationary element for processing a signal based on a relative positioning of the movable element and the substantially stationary element. A method for fabricating the microstructure and the circuitry is disclosed.

Abstract: A novelty device comprised of a transparent body defined by a chamber. First and second horizonal partitions having a plurality of openings depicting text or design traversing said chamber. The first and second partitions in a generally spaced parallel relationship dividing the chamber into a top area, a central area between the partitions and a bottom area. A particulate film material disposed within the chamber.

Abstract: A protection circuit for an excitation current source protects against excessive compliance voltage by using a cascode transistor between the current source and an output terminal, and a transistor coupled to the output terminal and to the control lead of the cascode transistor to cause the cascode transistor to turn off if the voltage exceeds a threshold level.

Abstract: Apparatus for detecting a tooth of a body. The tooth has an edge terminating in a notch. The tooth and notch are disposed along an edge of the body. The apparatus includes a pair of Hall effect cells disposed adjacent to, and laterally disposed along, the edge of the body. A magnet is positioned to provide a magnetic field through the edge of the body and Hall effect cells. The magnitude of field passing through the Hall effect cells is related to the relative position between the tooth and Hall effect cells. The Hall effect cells produce an output voltage related to magnitude of magnetic field passing through the cell. A differencing circuit is fed by the pair of Hall effect cell produced voltages for producing a difference signal having a peak when the edge of the tooth is positioned between the pair of Hall effect cells. A peak detector detects the peak produced by the difference signal.

Abstract: A switched-transconductance circuit for use in a multiplexer circuit includes integrated T-switches to provide isolation between each of the differential voltage inputs of a transconductance stage and: (1) a respective differential current output of the transconductance stage, and (2) the opposite polarity voltage input of the transconductance stage. Each of a pair of first switches, which are enabled only when the transconductance circuit is disabled, is connected between a differential current output of the transconductance stage and a circuit ground. Each of a pair of second switches, e.g., cascode transistors, which are biased to be turned on only when the transconductance circuit is enabled, is coupled between the output of the transconductance stage and an output of the transconductance circuit. A third switch is connected between a common-emitter node of a differential pair of input transistors included in the transconductance stage and a circuit ground.

Abstract: A start-up and bias circuit provides a known, fixed bias point suitable for generating fixed bias currents for use in other circuits, which remains fixed regardless of variations in a start-up signal. A first transistor conducts a current in response to the start-up signal, which is mirrored to a second transistor driven from a node that increases linearly with the conducted current. When the conducted current reaches a predetermined threshold, the second transistor sinks all of the mirrored current and the operating point of the first transistor stabilizes. A third transistor is connected to oppose increases in the start-up signal beyond that required to maintain the predetermined threshold current. When stabilized, the virtually constant current in the first transistor provides a fixed bias point; a number of other transistors can be connected to the bias point to mirror the constant current and thereby produce individual fixed bias currents for use in other circuits.

Abstract: A monolithic capacitance-type microstructure includes a semiconductor substrate, a plurality of posts extending from the surface of the substrate, a bridge suspended from the posts, and an electrically-conductive, substantially stationary element anchored to the substrate. The bridge includes an element that is laterally movable with respect to the surface of the substrate. The substantially stationary element is positioned relative to the laterally movable element such that the laterally movable element and the substantially stationary element form a capacitor. Circuitry may be disposed on the substrate and operationally coupled to the movable element and the substantially stationary element for processing a signal based on a relative positioning of the movable element and the substantially stationary element. A method for fabricating the microstructure and the circuitry is disclosed.

Abstract: A high transconductance voltage reference cell produces a large change in output current for a very small change in input voltage near a settable equilibrium point, which can be made equal to two bandgap voltages, or to non-integer multiples of the bandgap voltage without the use of a resistive divider. A first and second pair of bipolar transistors, at least one of which have unequal emitter areas, are arranged in a crossed-quad configuration, with a first resistor interposed between one of the first pair and second pair transistors and a second resistor interposed between one of the second pairs' emitters and a common point. For input voltages below the equilibrium point, most of the current through the cell flows down one side of the quad. The voltage drop across the first resistor increases with input voltage, and causes the cell current to be abruptly switched from one side of the quad to the other at the equilibrium point.

Abstract: A low voltage CTAT current source includes a bipolar transistor connected across two series-connected resistors. A voltage developed across the resistors turns on the transistor, making the current through the resistors CTAT. A second transistor supplies the resistor current; its base (if bipolar) is connected to the node between the resistors, which are selected to limit the transistor's base-collector forward bias and collector-emitter voltage to a preselected fraction of the first transistor's V.sub.be, allowing the CTAT current source to operate with supply voltages of less than two junction voltage drops. A PTAT current can be combined with the CTAT current to create a temperature-compensated current. A low voltage current mirror has the respective bases of a pair of cascoded transistors connected across a resistor which is also connected between the bottom transistor's collector and a programming current.