Patents by Inventor Abhijit Basu Mallick
Abhijit Basu Mallick has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11638374Abstract: Apparatuses and methods to provide a patterned substrate are described. A plurality of patterned and spaced first lines and carbon material lines and formed on the substrate surface by selectively depositing and etching films extending in a first direction and films extending in a second direction that crosses the first direction to pattern the underlying structures.Type: GrantFiled: April 14, 2022Date of Patent: April 25, 2023Assignee: Applied Materials, Inc.Inventors: Tejinder Singh, Takehito Koshizawa, Abhijit Basu Mallick, Pramit Manna, Nancy Fung, Eswaranand Venkatasubramanian, Ho-yung David Hwang, Samuel E. Gottheim
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Patent number: 11626278Abstract: Exemplary methods of semiconductor processing may include providing a boron-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include providing a carbon-containing precursor to the processing region of the semiconductor processing chamber. The carbon-containing precursor may be characterized by a carbon-carbon double bond or a carbon-carbon triple bond. The methods may include thermally reacting the boron-containing precursor and the carbon-containing precursor at a temperature below about 650° C. The methods may include forming a boron-and-carbon-containing layer on the substrate.Type: GrantFiled: March 24, 2021Date of Patent: April 11, 2023Assignee: Applied Materials, Inc.Inventors: Bo Qi, Zeqing Shen, Abhijit Basu Mallick
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Publication number: 20230105408Abstract: Exemplary semiconductor processing methods may include providing a boron-containing precursor and a nitrogen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include forming a plasma of the boron-containing precursor and the nitrogen-containing precursor in the processing region. A temperature of the substrate may be maintained at less than or about 500° C. The methods may include forming a layer of material on the substrate. The layer of material may include hexagonal boron nitride. The methods include subsequent forming the layer of material on the substrate for a first period of time, halting delivery of the boron-containing precursor. The methods may include maintaining a flow of the nitrogen-containing precursor for a second period of time, and increasing a plasma power while maintaining the flow of the nitrogen-containing precursor.Type: ApplicationFiled: September 13, 2022Publication date: April 6, 2023Applicant: Applied Materials, Inc.Inventors: Zeqing Shen, Susmit Singha Roy, Abhijit Basu Mallick
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Patent number: 11621160Abstract: A microelectronic device on a semiconductor substrate comprises: a gate electrode; and a spacer adjacent to the gate electrode, the spacer comprising: a the low-k dielectric film comprising one or more species of vanadium oxide, which is optionally doped, and an optional silicon nitride or oxide film. Methods comprise depositing a low-k dielectric film optionally sandwiched by a silicon nitride or oxide film to form a spacer adjacent to a gate electrode of a microelectronic device on a semiconductor substrate, wherein the low-k dielectric film comprises a vanadium-containing film.Type: GrantFiled: August 2, 2021Date of Patent: April 4, 2023Assignee: APPLIED MATERIALS, INC.Inventors: Eswaranand Venkatasubramanian, Srinivas Gandikota, Kelvin Chan, Atashi Basu, Abhijit Basu Mallick
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Patent number: 11621226Abstract: A graphene barrier layer is disclosed. Some embodiments relate to a graphene barrier layer capable of preventing diffusion from a fill layer into a substrate surface and/or vice versa. Some embodiments relate to a graphene barrier layer that prevents diffusion of fluorine from a tungsten layer into the underlying substrate. Additional embodiments relate to electronic devices which contain a graphene barrier layer.Type: GrantFiled: February 9, 2021Date of Patent: April 4, 2023Assignee: APPLIED MATERIALS, INC.Inventors: Yong Wu, Srinivas Gandikota, Abhijit Basu Mallick, Srinivas D. Nemani
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Patent number: 11615966Abstract: Exemplary processing methods may include forming a plasma of a silicon-containing precursor. The methods may include depositing a flowable film on a semiconductor substrate with plasma effluents of the silicon-containing precursor. The semiconductor substrate may define a feature within the semiconductor substrate. The methods may include forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber. A bias power may be applied to the substrate support from a bias power source. The methods may include etching the flowable film from a sidewall of the feature within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor. The methods may include densifying remaining flowable film within the feature defined within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor.Type: GrantFiled: July 19, 2020Date of Patent: March 28, 2023Assignee: Applied Materials, Inc.Inventors: Shishi Jiang, Praket Prakash Jha, Abhijit Basu Mallick
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Publication number: 20230090426Abstract: Exemplary semiconductor processing methods may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include forming a plasma of the silicon-containing precursor in the processing region and forming a first layer of material on the substrate. The first layer of material may include silicon oxide. The methods may include providing a germanium-containing precursor to the processing region of the semiconductor processing chamber and forming a plasma of the germanium-containing precursor in the processing region. Forming the plasma of the germanium-containing precursor may be performed at a plasma power of greater than or about 500 W. The methods may include forming a second layer of material on the substrate. The second layer of material may include germanium oxide.Type: ApplicationFiled: September 19, 2022Publication date: March 23, 2023Applicant: Applied Materials, Inc.Inventors: Sieun Chae, Susmit Singha Roy, Abhijit Basu Mallick
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Publication number: 20230090280Abstract: Exemplary semiconductor processing methods may include providing a carbon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The substrate may include a low dielectric constant material defining one or more features, a liner extending across the low dielectric constant material and within the one or more features, and a metal-containing layer deposited on the liner and extending within the one or more features. The methods may include forming a layer of material on at least a portion of the liner and the metal-containing layer. The layer of material may include graphene. The methods may include removing substantially all of the portion of the layer of material on the liner.Type: ApplicationFiled: September 23, 2021Publication date: March 23, 2023Applicant: Applied Materials, Inc.Inventors: Supriya Ghosh, Susmit Singha Roy, Abhijit Basu Mallick
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Patent number: 11594415Abstract: Methods of forming a tungsten film comprising forming a boron seed layer on an oxide surface, an optional tungsten initiation layer on the boron seed layer and a tungsten containing film on the boron seed layer or tungsten initiation layer are described. Film stack comprising a boron seed layer on an oxide surface with an optional tungsten initiation layer and a tungsten containing film are also described.Type: GrantFiled: November 11, 2019Date of Patent: February 28, 2023Assignee: Applied Materials, Inc.Inventors: Susmit Singha Roy, Pramit Manna, Rui Cheng, Abhijit Basu Mallick
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Patent number: 11594416Abstract: Methods to manufacture integrated circuits are described. Nanocrystalline diamond is used as a hard mask in place of amorphous carbon. Provided is a method of processing a substrate in which nanocrystalline diamond is used as a hard mask, wherein processing methods result in a smooth surface. The method involves two processing parts. Two separate nanocrystalline diamond recipes are combined—the first and second recipes are cycled to achieve a nanocrystalline diamond hard mask having high hardness, high modulus, and a smooth surface. In other embodiments, the first recipe is followed by an inert gas plasma smoothening process and then the first recipe is cycled to achieve a high hardness, a high modulus, and a smooth surface.Type: GrantFiled: August 31, 2020Date of Patent: February 28, 2023Assignee: Applied Materials, Inc.Inventors: Vicknesh Sahmuganathan, Jiteng Gu, Eswaranand Venkatasubramanian, Kian Ping Loh, Abhijit Basu Mallick, John Sudijono, Zhongxin Chen
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Publication number: 20230059788Abstract: Exemplary methods of semiconductor processing may include etching one or more features partially through a dielectric material to expose material from one or more layer pairs formed on a substrate. The methods may include halting the etching prior to penetrating fully through the dielectric material, and prior to exposing material from all layer pairs formed on the substrate. The methods may include forming a layer of carbon-containing material on the exposed material from each of the one or more layer pairs having exposed material. The methods may include etching the one or more features fully through the dielectric material to expose material for each remaining layer pair formed on the substrate.Type: ApplicationFiled: August 20, 2021Publication date: February 23, 2023Applicant: Applied Materials, Inc.Inventors: Bhaskar Jyoti Bhuyan, Zeqing Shen, Susmit Singha Roy, Abhijit Basu Mallick
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Publication number: 20230058831Abstract: Exemplary methods of semiconductor processing may include etching one or more features partially through a stack of layers formed on a substrate. The methods may include halting the etching prior to penetrating fully through the stack of layers formed on the substrate. The methods may include forming a layer of carbon-containing material along the stack of layers on the substrate. The layer of carbon-containing material may include a metal. The methods may include etching the one or more features fully through the stack of layers on the substrate.Type: ApplicationFiled: August 20, 2021Publication date: February 23, 2023Applicant: Applied Materials, Inc.Inventors: Bhaskar Jyoti Bhuyan, Zeqing Shen, Susmit Singha Roy, Abhijit Basu Mallick
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Publication number: 20230056280Abstract: Exemplary methods of semiconductor processing may include delivering a carbon-containing precursor and a hydrogen-containing precursor to a processing region of a semiconductor processing chamber. The methods may include generating a plasma of the carbon-containing precursor and the hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include forming a layer of graphene on a substrate positioned within the processing region of the semiconductor processing chamber. The substrate may be maintained at a temperature below or about 600° C. The methods may include halting flow of the carbon-containing precursor while maintaining the plasma with the hydrogen-containing precursor.Type: ApplicationFiled: October 27, 2022Publication date: February 23, 2023Applicant: Applied Materials, Inc.Inventors: Jialiang Wang, Susmit Singha Roy, Abhijit Basu Mallick, Nitin K. Ingle
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Publication number: 20230057258Abstract: Exemplary methods of semiconductor processing may include forming a layer of carbon-containing material on a substrate disposed within a processing region of a semiconductor processing chamber. The substrate may include an exposed region of a first dielectric material and an exposed region of a metal-containing material. The layer of carbon-containing material may be selectively formed over the exposed region of the metal-containing material. Forming the layer of carbon-containing material may include one or more cycles of providing a first molecular species that selectively couples with the metal-containing material. Forming the layer of carbon-containing material may include providing a second molecular species that selectively couples with the first molecular species. The methods may include selectively depositing a second dielectric material on the exposed region of the first dielectric material.Type: ApplicationFiled: August 20, 2021Publication date: February 23, 2023Applicant: Applied Materials, Inc.Inventors: Bhaskar Jyoti Bhuyan, Zeqing Shen, Susmit Singha Roy, Abhijit Basu Mallick
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Patent number: 11578409Abstract: PECVD methods for depositing a film at a low deposition rate comprising intermittent activation of the plasma are disclosed. The flowable film can be deposited using at least a polysilane precursor and a plasma gas. The deposition rate of the disclosed processes may be less than 500 ?/min.Type: GrantFiled: June 8, 2020Date of Patent: February 14, 2023Assignee: APPLIED MATERIALS, INC.Inventors: Shishi Jiang, Pramit Manna, Abhijit Basu Mallick
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Publication number: 20230021761Abstract: Embodiments herein provide methods of depositing an amorphous carbon layer using a plasma enhanced chemical vapor deposition (PECVD) process and hard masks formed therefrom. In one embodiment, a method of processing a substrate includes positioning a substrate on a substrate support, the substrate support disposed in a processing volume of a processing chamber, flowing a processing gas comprising a hydrocarbon gas and a diluent gas into the processing volume, maintaining the processing volume at a processing pressure less than about 100 mTorr, igniting and maintaining a deposition plasma of the processing gas by applying a first power to one of one or more power electrodes of the processing chamber, maintaining the substrate support at a processing temperature less than about 350° C., exposing a surface of the substrate to the deposition plasma, and depositing an amorphous carbon layer on the surface of the substrate.Type: ApplicationFiled: October 6, 2022Publication date: January 26, 2023Inventors: Eswaranand VENKATASUBRAMANIAN, Yang YANG, Pramit MANNA, Kartik RAMASWAMY, Takehito KOSHIZAWA, Abhijit Basu MALLICK
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Patent number: 11545354Abstract: Exemplary processing methods may include flowing a first deposition precursor into a substrate processing region to form a first portion of an initial compound layer. The first deposition precursor may include an aldehyde reactive group. The methods may include removing a first deposition effluent including the first deposition precursor from the substrate processing region. The methods may include flowing a second deposition precursor into the substrate processing region. The second deposition precursor may include an amine reactive group, and the amine reactive group may react with the aldehyde reactive group to form a second portion of the initial compound layer. The methods may include removing a second deposition effluent including the second deposition precursor from the substrate processing region. The methods may include annealing the initial compound layer to form an annealed carbon-containing material on the surface of the substrate.Type: GrantFiled: July 22, 2020Date of Patent: January 3, 2023Assignees: Applied Materials, Inc., National University of SingaporeInventors: Bhaskar Bhuyan, Zeqing Shen, Bo Qi, Abhijit Basu Mallick, Xinke Wang, Mark Saly
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Publication number: 20220411918Abstract: Transition metal dichalcogenide films and methods for depositing transition metal dichalcogenide films on a substrate are described. Methods for converting transition metal oxide films to transition metal dichalcogenide films are also described. The substrate is exposed to a precursor and a chalcogenide reactant to form the transition metal dichalcogenide film. The exposures can be sequential or simultaneous.Type: ApplicationFiled: June 28, 2021Publication date: December 29, 2022Applicant: Applied Materials, Inc.Inventors: Chandan Das, Susmit Singha Roy, Bhaskar Jyoti Bhuyan, John Sudijono, Abhijit Basu Mallick, Mark Saly
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Publication number: 20220384188Abstract: Exemplary deposition methods may include delivering a ruthenium-containing precursor and a hydrogen-containing precursor to a processing region of a semiconductor processing chamber. At least one of the ruthenium-containing precursor or the hydrogen-containing precursor may include carbon. The methods may include forming a plasma of all precursors within the processing region of a semiconductor processing chamber. The methods may include depositing a ruthenium-and-carbon material on a substrate disposed within the processing region of the semiconductor processing chamber.Type: ApplicationFiled: May 25, 2021Publication date: December 1, 2022Applicant: Applied Materials, Inc.Inventors: Eswaranand Venkatasubramanian, Bhaskar Jyoti Bhuyan, Mark J. Saly, Abhijit Basu Mallick
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Patent number: 11515170Abstract: Methods of etching film stacks to form gaps of uniform width are described. A film stack is etched through a hardmask. A conformal liner is deposited in the gap. The bottom of the liner is removed. The film stack is selectively etched relative to the liner. The liner is removed. The method may be repeated to a predetermined depth.Type: GrantFiled: December 30, 2020Date of Patent: November 29, 2022Assignee: APPLIED MATERIALS, INC.Inventors: Shishi Jiang, Pramit Manna, Bo Qi, Abhijit Basu Mallick, Rui Cheng, Tomohiko Kitajima, Harry S. Whitesell, Huiyuan Wang