Patents by Inventor Akio Hara

Akio Hara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11488913
    Abstract: A semiconductor device includes a substrate having a circuit region and a peripheral region disposed around and enclosing the circuit region in a plan view, a first interconnect layer formed on the substrate, a second interconnect layer formed on the first interconnect layer, a third interconnect layer formed on the second interconnect layer, and a guard ring formed in the peripheral region, wherein the guard ring includes a first interconnect formed in the first interconnect layer, and disposed around and enclosing the circuit region in a plan view, a second interconnect formed in the third interconnect layer, and disposed around and enclosing the circuit region in a plan view, and a first via connected to the first interconnect and to the second interconnect, and disposed in a groove shape along a perimeter edge of the substrate in a plan view.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: November 1, 2022
    Assignee: Socionext Inc.
    Inventors: Akio Hara, Toyoji Sawada, Masaki Okuno, Hirosato Ochimizu
  • Publication number: 20210028129
    Abstract: A semiconductor device includes a substrate having a circuit region and a peripheral region disposed around and enclosing the circuit region in a plan view, a first interconnect layer formed on the substrate, a second interconnect layer formed on the first interconnect layer, a third interconnect layer formed on the second interconnect layer, and a guard ring formed in the peripheral region, wherein the guard ring includes a first interconnect formed in the first interconnect layer, and disposed around and enclosing the circuit region in a plan view, a second interconnect formed in the third interconnect layer, and disposed around and enclosing the circuit region in a plan view, and a first via connected to the first interconnect and to the second interconnect, and disposed in a groove shape along a perimeter edge of the substrate in a plan view.
    Type: Application
    Filed: September 29, 2020
    Publication date: January 28, 2021
    Inventors: Akio HARA, Toyoji SAWADA, Masaki OKUNO, Hirosato OCHIMIZU
  • Publication number: 20130038069
    Abstract: A disk-shaped coaxial inversion generator in which, on the basis of the driving force of a driving source utilizing a natural energy, a housing main body and a coil body housed therein are coaxially inverted in noncontact relationship by magnetic force, so that the relative velocity between a flux linkage magnet within the housing main body and a coil portion within the coil body is greater than the rotating velocity of the housing main body per se, thereby realizing a large generated power output. In the provided disk-shaped coaxial inversion generator, mechanical contact areas can be reduced, so that the mechanical loss, such as wear, can be reduced; a low-noise structure attributed to the reduction of mechanical contact areas can be realized; and the maintenance can be facilitated.
    Type: Application
    Filed: September 3, 2010
    Publication date: February 14, 2013
    Inventor: Akio Hara
  • Publication number: 20110304150
    Abstract: A fixing structure for a generator shaft of a wind driven generator of outer rotor coreless type prevents deformation of the generator shaft even in strong wind and has less factors causing failures. In the fixing structure for a wind driven generator (1) of outer rotor coreless type, a screw thread (13) is formed on an end of a generator shaft (13) projecting from a generator body (10) of the wind driven generator (1), the generator shaft (13) projecting from the generator body (10) is fitted in a shaft support body (11) so as to be rotatably supported thereby, and a nut (62) is engaged to the screw thread (13a) of the generator shaft (13) to fasten the generator shaft (13) to fasten the generator shaft (13) to the shaft support body (11).
    Type: Application
    Filed: March 6, 2009
    Publication date: December 15, 2011
    Inventor: Akio Hara
  • Patent number: 8052325
    Abstract: An X-ray fluoroscope table and an X-ray fluoroscope system using this fluoroscope table with simple structure and easily ensuring an area where a person stands near the top board. An X-ray fluoroscope table (1) comprises a stand unit (10), a support arm unit (20), a support frame (30), a top board (40), an X-ray generator (60), a column unit (50), and an X-ray detector (FPD 70). The end of the column unit (50) on the support frame side (30) and the end on the X-ray generator (60) side are displaced from each other in the length direction of the support frame (30). With this constitution, the area where an operator (OP3) stands can be ensured near the column unit (50). An X-ray fluoroscope system is constituted of this fluoroscope table (1), a high-voltage generator for supplying electric power to the fluoroscope table (1), and a remote control console for integrally controlling them.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: November 8, 2011
    Assignee: Hitachi Medical Corporation
    Inventors: Atsushi Hibino, Tetsuji Sairaiji, Akio Hara
  • Publication number: 20110266903
    Abstract: Provided is a space-saving coaxial inversion coreless generator of a simple structure wherein a high output can be obtained by utilizing the rotational force of a wind turbine, for example.
    Type: Application
    Filed: March 6, 2009
    Publication date: November 3, 2011
    Inventor: Akio Hara
  • Publication number: 20110171033
    Abstract: A power-generating wind turbine has a plurality of streamline-wing-shaped blades provided every predetermined angle around a rotation shaft, and the blades have lift coefficients of 1.0 or larger. Apertures are provided within a range of 55 to 95% from a front rim for a length of a chord on a rear face being the rotation shaft side to the chord. Thus, the turbine can be activated with a gentle breeze by drag on the apertures. Since the apertures are provided at a position of 55 to 95% for the chord length distant from the front rim of the rear face of the blade, in a high wind speed region where the turbine rotates by the lift of the blades, less disturbance of the wind flow is observed on the rear faces to be resistance, and thus high rotation torque can be obtained.
    Type: Application
    Filed: July 17, 2008
    Publication date: July 14, 2011
    Inventor: Akio Hara
  • Publication number: 20100296626
    Abstract: An X-ray fluoroscope table and an X-ray fluoroscope system using this fluoroscope table with simple structure and easily ensuring an area where a person stands near the top board. An X-ray fluoroscope table (1) comprises a stand unit (10), a support arm unit (20), a support frame (30), a top board (40), an X-ray generator (60), a column unit (50), and an X-ray detector (FPD 70). The end of the column unit (50) on the support frame side (30) and the end on the X-ray generator (60) side are displaced from each other in the length direction of the support frame (30). With this constitution, the area where an operator (OP3) stands can be ensured near the column unit (50). An X-ray fluoroscope system is constituted of this fluoroscope table (1), a high-voltage generator for supplying electric power to the fluoroscope table (1), and a remote control console for integrally controlling them.
    Type: Application
    Filed: November 27, 2007
    Publication date: November 25, 2010
    Inventors: Atsushi Hibino, Tetsuji Sairaiji, Akio Hara
  • Publication number: 20100133659
    Abstract: A semiconductor device including a plurality of circuit regions formed in a semiconductor substrate and a scribe region formed around the circuit regions for separating the respective circuit regions, the scribe region having a plurality of laminated interlayer films including a plurality of metal films and an optically-transparent insulation film formed between and on the plurality of metal films, wherein a first metal film included in a first upper interlayer film of the plurality of interlayer films is positionally offset in a vertical direction to a second metal film included in a second lower interlayer film under the first interlayer film.
    Type: Application
    Filed: October 14, 2009
    Publication date: June 3, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Akio Hara, Toyoji Sawada, Tsuyoshi Koyashiki, Hironori Fukaya
  • Publication number: 20080086578
    Abstract: An integrated circuit device having a send/receive macro for serially transferring addresses and data to or from an external device via a serial transfer bus, the integrated circuit device includes: a CPU for performing predetermined processing. The send/receive macro includes a send/receive buffer accessed by the CPU, for storing a plurality of units of data to be transmitted or received over the serial transfer bus; an acknowledge detection unit for detecting a data acknowledge signal transmitted from a receiving device in response to transmission of predetermined units of data; and a data send unit for transmitting data stored in the send/receive buffer, in response to detection of the data acknowledge signal by the acknowledge detection unit, without generating any interrupt to the CPU.
    Type: Application
    Filed: November 20, 2007
    Publication date: April 10, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Toshikazu Yoshida, Masaaki Tani, Kenji Furuya, Akio Hara, Tomoki Kurata
  • Patent number: 7073045
    Abstract: Each prefetch buffer has a tag register for storing a branch address and a data register for storing instruction data. Each of the prefetch buffers is assigned to either a first prefetch buffer rewritable during a normal operation period and a second prefetch buffer to be disabled for rewrite during the normal operation period. The second prefetch buffer can thus be prevented from being rewritten even if a central processor outputs branch addresses frequently. This realizes an improvement in the instruction fetch efficiency of the central processor and an improvement in the entire system performance. The fetch efficiency can be improved particularly in such systems that branch addresses occur frequently and some of them occur repeatedly.
    Type: Grant
    Filed: March 11, 2004
    Date of Patent: July 4, 2006
    Assignee: Fujitsu Limited
    Inventors: Akio Hara, Masaaki Tani, Kenji Furuya
  • Patent number: 7028237
    Abstract: An internal bus testing device for a semiconductor integrated circuit in which an internal bus control circuit and a plurality of modules are linked by a plurality of internal buses. The internal bus testing device includes an area selector which causes the internal bus control circuit to select an address area corresponding to one of the plurality of internal buses. An area address setting unit sets the internal bus control circuit in an internal bus test mode in response to an internal bus test start signal, the area address setting unit storing a state setting signal and a predetermined address value indicating the address area. A control unit supplies, at a start of an internal bus test, the address value from the area address setting unit to the area selector by transmitting the state setting signal from the area address setting unit to the area selector.
    Type: Grant
    Filed: March 12, 2003
    Date of Patent: April 11, 2006
    Assignee: Fujitsu Limited
    Inventors: Masashi Masuda, Akio Hara, Kohji Kitagawa
  • Publication number: 20050091427
    Abstract: An integrated circuit device having a send/receive macro for serially transferring addresses and data to or from an external device via a serial transfer bus, the integrated circuit device includes: a CPU for performing predetermined processing. The send/receive macro includes a send/receive buffer accessed by the CPU, for storing a plurality of units of data to be transmitted or received over the serial transfer bus; an acknowledge detection unit for detecting a data acknowledge signal transmitted from a receiving device in response to transmission of predetermined units of data; and a data send unit for transmitting data stored in the send/receive buffer, in response to detection of the data acknowledge signal by the acknowledge detection unit, without generating any interrupt to the CPU.
    Type: Application
    Filed: April 1, 2004
    Publication date: April 28, 2005
    Applicant: Fujitsu Limited
    Inventors: Toshikazu Yoshida, Masaaki Tani, Kenji Furuya, Akio Hara, Tomoki Kurata
  • Publication number: 20040268085
    Abstract: Each prefetch buffer has a tag register for storing a branch address and a data register for storing instruction data. Each of the prefetch buffers is assigned to either a first prefetch buffer rewritable during a normal operation period and a second prefetch buffer to be disabled for rewrite during the normal operation period. The second prefetch buffer can thus be prevented from being rewritten even if a central processor outputs branch addresses frequently. This realizes an improvement in the instruction fetch efficiency of the central processor and an improvement in the entire system performance. The fetch efficiency can be improved particularly in such systems that branch addresses occur frequently and some of them occur repeatedly.
    Type: Application
    Filed: March 11, 2004
    Publication date: December 30, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Akio Hara, Masaaki Tani, Kenji Furuya
  • Publication number: 20040078672
    Abstract: An internal bus testing device for a semiconductor integrated circuit in which an internal bus control circuit and a plurality of modules are linked by a plurality of internal buses. The internal bus testing device includes an area selector which causes the internal bus control circuit to select an address area corresponding to one of the plurality of internal buses. An area address setting unit sets the internal bus control circuit in an internal bus test mode in response to an internal bus test start signal, the area address setting unit storing a state setting signal and a predetermined address value indicating the address area. A control unit supplies, at a start of an internal bus test, the address value from the area address setting unit to the area selector by transmitting the state setting signal from the area address setting unit to the area selector.
    Type: Application
    Filed: March 12, 2003
    Publication date: April 22, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Masashi Masuda, Akio Hara, Kohji Kitagawa
  • Patent number: 6653871
    Abstract: This invention relates to switching-over to a higher speed clock from a lower speed clock. The switching-over of the clock is performed before, after, or simultaneously to a transition to a sleep mode is carried out. After the switching-over of the clock is performed, if oscillation of the high speed clock and an internal voltage are stabilized, it is returned to a normal mode from the sleep mode.
    Type: Grant
    Filed: February 13, 2002
    Date of Patent: November 25, 2003
    Assignee: Fujitsu Limited
    Inventors: Masashi Masuda, Hiroyoshi Yamashita, Akio Hara, Kohji Kitagawa
  • Publication number: 20030006807
    Abstract: This invention relates to switching-over to a higher speed clock from a lower speed clock. The switching-over of the clock is performed before, after, or simultaneously to a transition to a sleep mode is carried out. After the switching-over of the clock is performed, if oscillation of the high speed clock and an internal voltage are stabilized, it is returned to a normal mode from the sleep mode.
    Type: Application
    Filed: February 13, 2002
    Publication date: January 9, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Masashi Masuda, Hiroyoshi Yamashita, Akio Hara, Kohji Kitagawa
  • Patent number: 6312324
    Abstract: A superabrasive tool such as a superabrasive grindstone (101; 102), a superabrasive dresser (103; 104; 105) or a superabrasive lap surface plate (106) includes a base (20) of steel and a superabrasive layer (10) formed on the base (20). The superabrasive layer (10) includes superabrasive grains (11) consisting of diamond grains, cubic boron nitride grains or the like and a holding layer consisting of a nickel plating layer (16) and a bond layer (17), or a brazing filler metal layer (18), holding the superabrasive grains (11) and fixing the same onto the base (20). Grooves (12) or holes (14) are formed on flat surfaces (19) of the superabrasive grains (11) exposed from the holding layer (16, 17; 18). The holding layer (16, 17; 18) holding and fixing the superabrasive grains (11) so that the surfaces of the grains are partially exposed is formed on the base (20).
    Type: Grant
    Filed: May 27, 1998
    Date of Patent: November 6, 2001
    Assignee: Osaka Diamond Industrial Co.
    Inventors: Kosuke Mitsui, Toshio Fukunishi, Kazunori Kadomura, Yukio Shimizu, Yoshio Kouta, Masaaki Yamanaka, Akio Hara
  • Patent number: 6027247
    Abstract: A X-ray photographing apparatus is suitable for use for a doctor to take X-ray photographing while performing medical treatment, and is capable of positioning a patient at a height at which operations are made ease in accordance with contents of medical treatment.
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: February 22, 2000
    Assignee: Hitachi Medical Corporation
    Inventors: Toshio Tachi, Akio Hara, Seiji Kamimura, Mitsuru Ohnuma, Isamu Takekoshi, Michiaki Motoshima, Hayato Saito
  • Patent number: D666969
    Type: Grant
    Filed: April 19, 2011
    Date of Patent: September 11, 2012
    Assignee: Winpro Co., Ltd.
    Inventor: Akio Hara