Patents by Inventor Akio Hirata

Akio Hirata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11949413
    Abstract: A semiconductor device according to an aspect of the present disclosure includes: a plurality of line layers; a first line; and a second line that is not connected to the first line and is redundantly provided to transfer a signal having a level same as a level of a signal transferred through the first line. The first line and the second line are included in different layers out of the plurality of line layers, and a distance between the first line and the second line is longer than an interlayer distance between line layers next to each other out of the plurality of line layers.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: April 2, 2024
    Assignee: NUVOTON TECHNOLOGY CORPORATION JAPAN
    Inventors: Kazuyuki Nakanishi, Akio Hirata
  • Publication number: 20240069341
    Abstract: An object of the present invention is to provide a head-up display apparatus further reduced in size, the head-up display apparatus having: an image display apparatus including a light source and a display element; and a virtual image optical system in which light emitted from the image display apparatus is reflected by a windshield or a combiner of the vehicle so that a virtual image is displayed in front of the vehicle, wherein the virtual image optical system has a concave mirror and a distortion correcting lens, and the distortion correcting lens is disposed between the image display apparatus and the concave mirror, the concave mirror is disposed in a housing including an outer case along a shape of an effective light path area of the image light from the image display apparatus, and the image display apparatus is attached to part of an outer periphery of the housing.
    Type: Application
    Filed: November 7, 2023
    Publication date: February 29, 2024
    Inventors: Akio MISAWA, Nozomu SHIMODA, Kazuomi KANEKO, Koji HIRATA, Toshinori SUGIYAMA
  • Publication number: 20220209773
    Abstract: A semiconductor device according to an aspect of the present disclosure includes: a plurality of line layers; a first line; and a second line that is not connected to the first line and is redundantly provided to transfer a signal having a level same as a level of a signal transferred through the first line. The first line and the second line are included in different layers out of the plurality of line layers, and a distance between the first line and the second line is longer than an interlayer distance between line layers next to each other out of the plurality of line layers.
    Type: Application
    Filed: March 18, 2022
    Publication date: June 30, 2022
    Inventors: Kazuyuki NAKANISHI, Akio HIRATA
  • Publication number: 20220200595
    Abstract: A semiconductor device includes: a first line; a second line that is not connected to the first line and is provided to transfer a signal having a level same as a level of a signal transferred through the first line; and another line different from the first line and the second line. In a line layer, a distance between the first line and the second line is longer than a distance between the first line and the other line, and is longer than a distance between the second line and the other line.
    Type: Application
    Filed: March 9, 2022
    Publication date: June 23, 2022
    Inventors: Kazuyuki NAKANISHI, Akio HIRATA
  • Publication number: 20200315486
    Abstract: An electroencephalogram measurement system includes an acquisition unit, an impedance measurement unit, and an output unit. The acquisition unit acquires electroencephalogram information representing an electroencephalogram obtained by an electrode unit that is placed on a region of interest forming part of a subject's head. The impedance measurement unit measures an impedance value between the electrode unit and the subject's body in an acquisition mode in which the acquisition unit acquires the electroencephalogram information. The output unit outputs the impedance value measured.
    Type: Application
    Filed: October 19, 2018
    Publication date: October 8, 2020
    Inventors: Akio HIRATA, Akinori MATSUMOTO, Koji MORIKAWA
  • Patent number: 10652823
    Abstract: Systems and methods providing a wakeup receiver for latency-critical applications are described herein. An example system includes a wakeup receiver communicatively coupled to a communication channel. The wakeup receiver is configured to monitor an input signal of the communication channel and down-convert the input signal to a DC signal. The system also includes an analog to digital converter (ADC) configured to digitize the DC signal and provide an ADC output. The system further includes a digital baseband (DBB) module configured to determine a received signal strength indication (RSSI) from the signal. The DBB is also configured to, for each packet, determine a respective packet length and compare the RSSI and respective packet length with a two-dimensional template. The DBB is additionally configured to, based on the comparison, determine an interrupt condition and, based on determining the interrupt condition, generate a wakeup signal.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: May 12, 2020
    Assignee: IMEC VZW
    Inventors: Ming Ding, Peng Zhang, Yan Zhang, Akio Hirata, Akifumi Nagao
  • Publication number: 20180359706
    Abstract: Systems and methods providing a wakeup receiver for latency-critical applications are described herein. An example system includes a wakeup receiver communicatively coupled to a communication channel. The wakeup receiver is configured to monitor an input signal of the communication channel and down-convert the input signal to a DC signal. The system also includes an analog to digital converter (ADC) configured to digitize the DC signal and provide an ADC output. The system further includes a digital baseband (DBB) module configured to determine a received signal strength indication (RSSI) from the signal. The DBB is also configured to, for each packet, determine a respective packet length and compare the RSSI and respective packet length with a two-dimensional template. The DBB is additionally configured to, based on the comparison, determine an interrupt condition and, based on determining the interrupt condition, generate a wakeup signal.
    Type: Application
    Filed: May 30, 2018
    Publication date: December 13, 2018
    Applicants: Panasonic Intellectual Property Management Co., Ltd., Stichting IMEC Nederland
    Inventors: Ming Ding, Peng Zhang, Yan Zhang, Akio Hirata, Akifumi Nagao
  • Publication number: 20160206662
    Abstract: A regeneration promoter for regenerating tissue with the use of somatic stem cells is provided. Also provided are a cell fusion promoter comprising ATP or its metabolite which is safely usable in vivo, a method of producing fused cells in the presence of ATP or its metabolite and a related pharmaceutical composition for regenerating or improving the function of a tissue or an organ in a subject suffering from dysfunction or hypofunction due to injury or denaturation.
    Type: Application
    Filed: December 3, 2015
    Publication date: July 21, 2016
    Inventors: Masafumi Kitakaze, Tetsuo Minamino, Akio Hirata
  • Patent number: 9121551
    Abstract: In order to provide a method for collecting a droplet attached on an external surface of a needle into a capillary tube, the present invention is a method for collecting a droplet attached on an external surface of a needle into a capillary tube, the method comprising steps of: (a) preparing a substrate comprising a capillary tube; a flexible thin film; a liquid-repellent film; and a hole; (b) moving the needle in the Z-direction to move the droplet from the external surface of the needle to the surface of the liquid-repellent film; (c) allowing the droplet to arrive at an inlet of the capillary tube by moving the needle more in the Z-direction, so as to suck the droplet into the capillary tube by a capillary phenomenon.
    Type: Grant
    Filed: January 10, 2013
    Date of Patent: September 1, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yoshitsugu Uriu, Akio Hirata
  • Publication number: 20140044683
    Abstract: The present invention provides a regeneration promoter for regenerating tissue with the use of somatic stem cells. The invention also provides a cell fusion promoter comprising ATP or its metabolite which is safely usable in vivo, a method of producing fused cells in the presence of ATP or its metabolite and a related pharmaceutical composition for regenerating or improving the function of a tissue or an organ in a subject suffering from dysfunction or hypofunction due to injury or denaturation.
    Type: Application
    Filed: September 10, 2013
    Publication date: February 13, 2014
    Applicants: Kowa Company, Ltd.
    Inventors: Masafumi Kitakaze, Tetsuo Minamino, Akio Hirata
  • Publication number: 20130228224
    Abstract: In order to provide a method for collecting a droplet attached on an external surface of a needle into a capillary tube, the present invention is a method for collecting a droplet attached on an external surface of a needle into a capillary tube, the method comprising steps of (a) preparing a substrate comprising a capillary tube; a flexible thin film; a liquid-repellent film; and a hole; (b) moving the needle in the Z-direction to move the droplet from the external surface of the needle to the surface of the liquid-repellent film; (c) allowing the droplet to arrive at an inlet of the capillary tube by moving the needle more in the Z-direction, so as to suck the droplet into the capillary tube by a capillary phenomenon.
    Type: Application
    Filed: January 10, 2013
    Publication date: September 5, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Yoshitsugu URIU, Akio HIRATA
  • Publication number: 20110110903
    Abstract: It is intended to provide a regeneration promoter for regenerating a tissue with the use of somatic stem cells. It is also intended to provide a cell fusion promoter safely usable in vivo. Namely, it is intended to provide a cell fusion promoter comprising ATP or its metabolite. A cell fusion promoter comprising ATP or its metabolite and a method of producing fused cells in the presence of ATP or its metabolite. A medicinal composition for regenerating or improving the function of a tissue or an organ, which suffers from dysfunction or hypofunction due to injury or denaturation, by using stem cells. This composition comprises ATP or its metabolite and a pharmaceutically acceptable carrier.
    Type: Application
    Filed: January 13, 2011
    Publication date: May 12, 2011
    Applicants: Kowa Company, Ltd., Masafumi Kitakaze, Tetsuo Minamino, Akio Hirata
    Inventors: Masafumi Kitakaze, Tetsuo Minamino, Akio Hirata
  • Patent number: 7897397
    Abstract: The present invention provides a regeneration promoter for regenerating tissue with the use of somatic stem cells. The invention also provides a cell fusion promoter comprising ATP or its metabolite which is safely usable in vivo, a method of producing fused cells in the presence of ATP or its metabolite and a related pharmaceutical composition for regenerating or improving the function of a tissue or an organ in a subject suffering from dysfunction or hypofunction due to injury or denaturation.
    Type: Grant
    Filed: July 12, 2005
    Date of Patent: March 1, 2011
    Assignees: Kowa Company, Ltd.
    Inventors: Masafumi Kitakaze, Tetsuo Minamino, Akio Hirata
  • Publication number: 20100156450
    Abstract: A semiconductor integrated circuit device 100A includes: an integrated circuit body 106A having a plurality of MOSFETs on a semiconductor substrate; a plurality of elements 102A to be measured placed on the same substrate as the plurality of MOSFETs; a monitor circuit 105A for selecting an element to be measured whose measured parameter value is in a predetermined rank among the plurality of elements 102A to be measured as an element 101A to be measured for monitoring; and an operation parameter adjustment circuit 107 for adjusting an operation parameter 108 supplied to the integrated circuit body 106A based on the measured parameter 104A of the element to be measured for monitoring.
    Type: Application
    Filed: February 23, 2010
    Publication date: June 24, 2010
    Applicant: Panasonic Corporation
    Inventors: Hiroshi INADA, Akio Hirata
  • Patent number: 7710191
    Abstract: A semiconductor integrated circuit device 100A includes: an integrated circuit body 106A having a plurality of MOSFETs on a semiconductor substrate; a plurality of elements 102A to be measured placed on the same substrate as the plurality of MOSFETs; a monitor circuit 105A for selecting an element to be measured whose measured parameter value is in a predetermined rank among the plurality of elements 102A to be measured as an element 101A to be measured for monitoring; and an operation parameter adjustment circuit 107 for adjusting an operation parameter 108 supplied to the integrated circuit body 106A based on the measured parameter 104A of the element to be measured for monitoring.
    Type: Grant
    Filed: October 10, 2007
    Date of Patent: May 4, 2010
    Assignee: Panasonic Corporation
    Inventors: Hiroshi Inada, Akio Hirata
  • Publication number: 20080287391
    Abstract: It is intended to provide a regeneration promoter for regenerating a tissue with the use of somatic stem cells. It is also intended to provide a cell fusion promoter safely usable in vivo. Namely, it is intended to provide a cell fusion promoter comprising ATP or its metabolite. A cell fusion promoter comprising ATP or its metabolite and a method of producing fused cells in the presence of ATP or its metabolite. A medicinal composition for regenerating or improving the function of a tissue or an organ, which suffers from dysfunction or hypofunction due to injury or denaturation, by using stem cells. This composition comprises ATP or its metabolite and a pharmaceutically acceptable carrier.
    Type: Application
    Filed: July 12, 2005
    Publication date: November 20, 2008
    Applicants: KOWA COMPANY, LTD.
    Inventors: Masafumi Kitakaze, Tetsuo Minamino, Akio Hirata
  • Publication number: 20080116953
    Abstract: 1.
    Type: Application
    Filed: November 20, 2007
    Publication date: May 22, 2008
    Inventors: Akio Hirata, Hiroyuki Shinbo
  • Publication number: 20080088356
    Abstract: A semiconductor integrated circuit device 100A includes: an integrated circuit body 106A having a plurality of MOSFETs on a semiconductor substrate; a plurality of elements 102A to be measured placed on the same substrate as the plurality of MOSFETs; a monitor circuit 105A for selecting an element to be measured whose measured parameter value is in a predetermined rank among the plurality of elements 102A to be measured as an element 101A to be measured for monitoring; and an operation parameter adjustment circuit 107 for adjusting an operation parameter 108 supplied to the integrated circuit body 106A based on the measured parameter 104A of the element to be measured for monitoring.
    Type: Application
    Filed: October 10, 2007
    Publication date: April 17, 2008
    Inventors: Hiroshi Inada, Akio Hirata
  • Patent number: 7345519
    Abstract: A scan flip-flop circuit including an input section employing a dynamic circuit and an output section employing a static circuit, capable of latching in data within a period of a pulse width that is shorter than the clock cycle, wherein only three N-type transistors are connected in series in the input section employing a dynamic circuit. A data signal is input directly to one of the three N-type transistors. On the other hand, a test input signal is input to an AND/OR inverter circuit. The AND/OR inverter circuit receives, as a control signal, the potential of the node obtained as the clock signal passes through two inverter circuits. Therefore, there is required only a short hold time for the test input signal.
    Type: Grant
    Filed: July 20, 2006
    Date of Patent: March 18, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Akio Hirata
  • Patent number: 7336116
    Abstract: The clock supply circuit of the present invention comprises a plurality of clock supply paths and a clock gate circuit. The clock supply paths branch a clock signal and supply each of the branched clock signals to a plurality of sequential circuits via a buffer. The clock gate circuit is inserted at least to one of the clock supply paths, which lets through the clock signals when a control signal is in a first logic state and, when the control signal is in a second logic state, outputs an inversion signal of a logic level that is outputted in a previous occasion where the control signal in the second logic state is applied.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: February 26, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akio Hirata, Takahiro Ichinomiya, Takashi Ando