Abstract: In one embodiment, an integrated circuit includes an array of active structures, an array of dummy structures and multiple well-tap structures. The array of dummy structures surrounds the array of active structures. The well-tap structures may be interposed between the array of active structures and the array of dummy structures. In one embodiment, each of the well-tap structures may include a well, a diffusion region and a gate-like structure. The well may be formed in a substrate and is of a first doping type. The diffusion region may be formed in the well and is also of the first doping type. The gate-like structure may be formed above the substrate and adjacent to the diffusion region.

Abstract: An integrated circuit (IC) die may include a substrate layer and an inductor with an associated capacitance formed on one of multiple metal layers above the substrate layer. Power shielding strips may be formed between the inductor and the substrate layer. Portions of the power shielding strips may be selectively activated to adjust the capacitance of the inductor. As an example, switches may be coupled to the power shielding strips to selectively couple a portion of the power shielding strips to a ground voltage to increase the capacitance of the inductor. As another example, a fuse element may be used to selectively activate desired portions of the power shielding strips.