Abstract: Systems and methods for generation of time-dependent control signals for video signals are provided. A system is provided that includes a set of microsequencers, a programmable combinational logic (PCL) module, shared memory, an arbiter for sharing of memory by the microsequencers, stacks containing registers for microsequencer control, and a control interface. The system can efficiently provide control signals for video signals, implement the MACROVISION copy protection process, and provide other value added features. The method includes accessing programs from shared memory, such that a set of microsequencers can generate flags. These flags are then processed to generate one or more control signals used to support the outputting of video signals including those requiring MACROVISION copy protection.

Abstract: A television on a chip (TVOC) system that provides a cost effective approach for providing television functionality on a single integrated circuit chip is disclosed. A TVOC includes the functionality necessary to receive and display television signals in a variety of input and output formats. A TVOC can be used in set-top boxes for cable and satellite television, or directly within a television. All functionality provided can be provided on a single integrated circuit. TVOC includes a data transport module, an IF demodulator, a digital audio engine, an analog audio engine, a digital video engine, and an analog video engine. The TVOC also includes three sets of interfaces including output interfaces, control interfaces and ancillary interfaces. Further features and embodiments provide enhanced functionality and increased efficiencies.

Abstract: A method and system for sorting a number of items in a computer system is disclosed. The sort is based on a plurality of values of a key. Each item has a value of the plurality of values. The method and system include providing a plurality of stages, providing at least one switch coupled between the plurality of stages, and providing a final switch coupled with a last stage. Each of the plurality of stages has a pair of first-in-first-out buffers (FIFOs) that store twice as many of the items as the pair of FIFOs in a previous stage. Each switch is for merging and sorting a first portion of the number of items from the pair of FIFOs in the previous stage based on the key and for providing the first portion of the number plurality of items to a first FIFO of the pair of FIFOs of the stage in order.

Abstract: A method and system for utilizing processor(s) and bypass processor(s) of a computer graphics system are disclosed. The processor(s) and bypass processor(s) render primitives, which are ordered based on their left corners. The method and system include providing a merge circuit, a distributor, a feedback circuit and a controller. The merge circuit determines left and right edges for each primitive. The distributor is coupled with feedback circuit and outputs a first portion of the primitives. The distributor provides a second portion of the primitives to the processor(s) and a third portion of the primitives to the bypass processor(s) if the first portion includes more primitives than there are processor(s). The second portion includes no more primitives than there are processor(s). The feedback circuit, coupled to the merge circuit, re-inputs a fourth portion of the primitives to the bypass processor(s) until the first portion has been rendered for a line.

Abstract: A system and method for efficiently detecting and decoding valid teletext message sequences is provided. A system is provided that includes a correlator, a sine wave generator, two time window generators, a phase detector, a framing code search engine, and a match filter. The method includes determining the phase of the run-in burst of a teletext message sequence, identifying the framing code location, deciding whether the teletext sequence is valid, and decoding the teletext data for display.

Abstract: A system and method for synchronizing sub-carriers in a signal processing system. Various aspects of the present invention may comprise method steps and structure that receive a sampled signal. Various aspects may produce a synchronization signal based on the sampled signal. Various aspects may generate and store a cropped version of the received sampled signal. Various aspects may read a cropped sampled signal from memory that corresponds to the received sampled signal. Various aspects may generate a restored sampled signal by adding samples to the cropped sampled signal read from memory. Various aspects may, based on the synchronization signal, output the restored sampled signal coarsely synchronized to the received sampled signal. Various aspects may determine a phase difference between the output restored sampled signal and the output received sub-carrier. Various aspects may adjust the phase of the restored sampled signal in response to the determined phase difference.

Abstract: A method and system for sorting a number of items in a computer system is described. The sort is based on values of a key. Each item has a value. The method and system include providing stages, providing switch(es) coupled between the stages, and providing a final switch coupled with a last stage. Each stage has a pair of first-in-first-out buffers (FIFOs) that store twice as many of the items as the FIFOs in a previous stage. The switch merges and sorts a first portion of the number of items from the pair of FIFOs in the previous stage based on the key and provides the first portion of the number of items to a first FIFO of the stage in order. The switch performs an analogous function for a second FIFO in the stage. The last switch merges and sorts a third portion of the number of items to provide the number of items in order.

Abstract: A method and system for processing textures for a graphical image on a display is disclosed. The graphical image includes a plurality of polygons. Each of the plurality of polygons includes at least one fragment. The fragment includes at least one texture and a w-value for the fragment. Each polygon has a plurality of vertices, a display area, and a texture space area. Each of the vertices has a vertex w-value. The at least one texture is associated with at least one MIP map. The MIP map includes a plurality of MIP map levels. The method and system include determining a selection value for each fragment of a polygon of the plurality of polygons. The selection value includes ½ multiplied by the base two logarithm of the texture area divided by the display area and divided by the product of the vertex w-values for each of the plurality of vertices. The selection value also includes 3/2 multiplied by the base two logarithm of the w-value for each of the at least one fragment.

Abstract: A method for generating a video character in an on-screen display system. The method uses a HALT signal provided to the microprocessor which allows the microprocessor to finish executing its current instruction, but prohibits the microprocessor from beginning a next instruction. After a sufficient amount of time has passed to ensure that the microprocessor has completed its current instruction, an OSD interrupt signal is sent to the microprocessor instructing the microprocessor to begin OSD operations. Alternatively, the method uses a bus multiplexer which duplicates character data and sends the expanded data to a bus in order to enlarge characters displayed on the screen.

Abstract: A new technique for generating OSD characters is disclosed having a system architecture which utilizes a minimum of hardware and which is primarily implemented through software. The technique of the present invention incorporates the use of a microprocessor which is utilized to store and transfer video data to and from a plurality of logic circuits which make up the OSD system. One aspect of the present invention is directed to a clock switching device which drives both the CPU and other logic circuits of OSD system. The switching device is responsive to at least one control signal for providing an output clock signal which is switchable between two clock signals. Another aspect of the present invention is directed to a technique for altering the font size of the characters displayed on a kinescope. Specifically, the present invention is able to expand the width of the various characters displayed on the screen without altering the frequency of a DOT clock signal, as is done in conventional OSD systems.

Abstract: A learning TV is disclosed which enables the TV to learn and be remotely controlled by remote control signals generated from any remote control device produced by any manufacturer. The user is able to assign to each received remote control signal a particular function such as POWER ON/OFF, performed by the learning TV. To facilitate the user in programming the television during the learning mode, directions are provided to the user on the television screen instructing the user of the various steps required to properly program the television to learn the remote control codes and how to assign these codes to a particular executable routine of the learning TV.