Patents by Inventor Alexis Farcy

Alexis Farcy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030119219
    Abstract: The fabrication of an integrated circuit includes a first phase of producing an electronic chip and a second phase of producing at least one auxiliary component placed above the chip and of producing a protective cover which covers the auxiliary component. The first phase of producing the chip is effected from a first semiconductor substrate and comprises the formation of a cavity lying in a chosen region of the chip and emerging at the upper surface of the chip. The second production phase includes the production of the auxiliary component from a second semiconductor substrate, separate from the first, and then the placement in the cavity of the auxiliary component supported by the second substrate and the mutual adhesion of the second substrate to the upper surface of the chip lying outside the cavity. The second substrate then also forms the protective cover.
    Type: Application
    Filed: December 3, 2002
    Publication date: June 26, 2003
    Applicant: STMICROELECTRONICS S.A.
    Inventors: Alexis Farcy, Philippe Coronel, Pascal Ancey, Joaquin Torres
  • Publication number: 20030092202
    Abstract: An inductance formed in an integrated circuit chip, formed of a plurality of parallel conductive lines, of optimized width, each conductive line being formed in the thickness of at least one insulating layer, these lines being interconnected by at least one perpendicular conductive segment.
    Type: Application
    Filed: April 18, 2002
    Publication date: May 15, 2003
    Inventors: Alexis Farcy, Vincent Arnal, Joaquim Torres