Patents by Inventor Alfred L. Crouch
Alfred L. Crouch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240143743Abstract: A method and system for analysis of a facility may include providing an emulation host system, first generating a golden circuit model on the emulation host system, first inserting a first hardware trojan model, first emulating operation of the golden circuit model, and second emulating operation of the first hardware trojan model. A facility may include a trojan instrument facility having a trojan detection instrument comparing logic circuit output against a threshold for detecting hardware trojan activity, and outputting alert data, and in relation to opening one of a plurality of scannable access points, a scannable register is inserted into an active scan chain with an associated instrument interface.Type: ApplicationFiled: May 5, 2023Publication date: May 2, 2024Applicant: Amida Technology Solutions, Inc.Inventors: Alfred L. Crouch, Peter Lawrence Levin
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Patent number: 11693052Abstract: A network of storage units has a data path, which is at least a portion of the network. The network also has a dynamic time-varying or cycle-varying code generation unit and a code comparator unit that together make up an unlock signal generation unit; and a gateway storage unit. If the gateway storage unit does not store an unlock signal or the unlock signal generation unit does not generate and transmit an unlock signal, the gateway storage unit does not insert a data path segment in the data path. If the unlock signal generation unit is operated such that it generates an unlock signal, and it transmits that unlock signal to a gateway storage unit, and the gateway storage unit stores the unlock signal value, then the gateway storage unit inserts a data path segment into the data path.Type: GrantFiled: April 17, 2022Date of Patent: July 4, 2023Assignee: Silicon Aid Solutions, Inc.Inventors: James M. Johnson, Alfred L. Crouch
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Patent number: 11681795Abstract: A method and system for analysis of a facility may include providing an emulation host system, first generating a golden circuit model on the emulation host system, first inserting a first hardware trojan model, first emulating operation of the golden circuit model, and second emulating operation of the first hardware trojan model. A facility may include a trojan instrument facility having a trojan detection instrument comparing logic circuit output against a threshold for detecting hardware trojan activity, and outputting alert data, and in relation to opening one of a plurality of scannable access points, a scannable register is inserted into an active scan chain with an associated instrument interface.Type: GrantFiled: September 28, 2018Date of Patent: June 20, 2023Assignee: Amida Technology Solutions, Inc.Inventors: Alfred L. Crouch, Eve Naomi Hunter, Peter Lawrence Levin
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Publication number: 20220244311Abstract: A network of storage units has a data path, which is at least a portion of the network. The network also has a dynamic time-varying or cycle-varying code generation unit and a code comparator unit that together make up an unlock signal generation unit; and a gateway storage unit. If the gateway storage unit does not store an unlock signal or the unlock signal generation unit does not generate and transmit an unlock signal, the gateway storage unit does not insert a data path segment in the data path. If the unlock signal generation unit is operated such that it generates an unlock signal, and it transmits that unlock signal to a gateway storage unit, and the gateway storage unit stores the unlock signal value, then the gateway storage unit inserts a data path segment into the data path.Type: ApplicationFiled: April 17, 2022Publication date: August 4, 2022Applicant: SiliconAid Solutions, Inc.Inventors: James M. Johnson, Alfred L. Crouch
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Patent number: 11333706Abstract: A network of storage units has a data path, which is at least a portion of the network. The network also has a dynamic time-varying or cycle-varying code generation unit and a code comparator unit that together make up an unlock signal generation unit; and a gateway storage unit. If the gateway storage unit does not store an unlock signal or the unlock signal generation unit does not generate and transmit an unlock signal, the gateway storage unit does not insert a data path segment in the data path. If the unlock signal generation unit is operated such that it generates an unlock signal, and it transmits that unlock signal to a gateway storage unit, and the gateway storage unit stores the unlock signal value, then the gateway storage unit inserts a data path segment into the data path.Type: GrantFiled: November 19, 2018Date of Patent: May 17, 2022Assignee: Silicon Aid Solutions, Inc.Inventors: James M. Johnson, Alfred L. Crouch
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Patent number: 10690718Abstract: A network of storage units has a data path, which is at least a portion of the network. The network also has a dynamic time-varying or cycle-varying code generation unit and a code comparator unit that together make up an unlock signal generation unit; and a gateway storage unit. If the gateway storage unit does not store an unlock signal or the unlock signal generation unit does not generate and transmit an unlock signal, the gateway storage unit does not insert a data path segment in the data path. If the unlock signal generation unit is operated such that it generates an unlock signal, and it transmits that unlock signal to a gateway storage unit, and the gateway storage unit stores the unlock signal value, then the gateway storage unit inserts a data path segment into the data path.Type: GrantFiled: November 9, 2016Date of Patent: June 23, 2020Assignee: SiliconAid Solutions, Inc.Inventors: James M. Johnson, Alfred L. Crouch
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Publication number: 20200104485Abstract: A method and system for analysis of a facility may include providing an emulation host system, first generating a golden circuit model on the emulation host system, first inserting a first hardware trojan model, first emulating operation of the golden circuit model, and second emulating operation of the first hardware trojan model. A facility may include a trojan instrument facility having a trojan detection instrument comparing logic circuit output against a threshold for detecting hardware trojan activity, and outputting alert data, and in relation to opening one of a plurality of scannable access points, a scannable register is inserted into an active scan chain with an associated instrument interface.Type: ApplicationFiled: September 28, 2018Publication date: April 2, 2020Inventors: Alfred L. Crouch, Eve Naomi Hunter, Peter Lawrence Levin
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Publication number: 20190086472Abstract: A network of storage units has a data path, which is at least a portion of the network. The network also has a dynamic time-varying or cycle-varying code generation unit and a code comparator unit that together make up an unlock signal generation unit; and a gateway storage unit. If the gateway storage unit does not store an unlock signal or the unlock signal generation unit does not generate and transmit an unlock signal, the gateway storage unit does not insert a data path segment in the data path. If the unlock signal generation unit is operated such that it generates an unlock signal, and it transmits that unlock signal to a gateway storage unit, and the gateway storage unit stores the unlock signal value, then the gateway storage unit inserts a data path segment into the data path.Type: ApplicationFiled: November 19, 2018Publication date: March 21, 2019Applicant: SiliconAid Solutions, Inc.Inventors: James M. Johnson, Alfred L. Crouch
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Patent number: 9811690Abstract: Various integrated circuits protect hidden content e.g., embedded instruments, keys, data, etc.) using scan cell circuit(s). For example, a first scan cell circuit is connected to the hidden content, and a second scan cell circuit is connected to the first scan cell circuit forming all or part of a serial data path. The first scan cell circuit provides access to the hidden content whenever the first scan cell circuit is in a first specified state and prevents access whenever the first scan cell circuit is in a different state. The first scan cell circuit does not interrupt the serial data path when the first scan cell circuit is in the different state. The second scan cell circuit changes an operational characteristic of the first scan cell circuit whenever the second scan cell circuit is in a second specified state. In some cases, the second scan cell circuit can be eliminated.Type: GrantFiled: March 23, 2015Date of Patent: November 7, 2017Assignee: Southern Methodist UniversityInventors: Jennifer L. Dworak, Alfred L. Crouch, Adam Zygmontowicz, John C. Potter
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Publication number: 20170131355Abstract: A network of storage units has a data path, which is at least a portion of the network. The network also has a dynamic time-varying or cycle-varying code generation unit and a code comparator unit that together make up an unlock signal generation unit; and a gateway storage unit. If the gateway storage unit does not store an unlock signal or the unlock signal generation unit does not generate and transmit an unlock signal, the gateway storage unit does not insert a data path segment in the data path. If the unlock signal generation unit is operated such that it generates an unlock signal, and it transmits that unlock signal to a gateway storage unit, and the gateway storage unit stores the unlock signal value, then the gateway storage unit inserts a data path segment into the data path.Type: ApplicationFiled: November 9, 2016Publication date: May 11, 2017Applicant: SiliconAid Solutions, Inc.Inventors: James M. Johnson, Alfred L. Crouch
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Patent number: 9305186Abstract: A network of storage units has a data path which is at least a portion of the network. The network also has a key storage unit and a gateway storage unit. If the key storage unit stores a key value, the key storage unit transmits a key signal to the gateway storage unit. If the gateway storage unit does not store a gateway value or the key signal is not transmitted to the gateway storage unit, the gateway storage unit does not insert a data path segment in the data path. If the gateway storage unit stores a gateway value and the key signal is transmitted to the gateway storage unit, the gateway storage unit inserts the data path segment.Type: GrantFiled: October 7, 2014Date of Patent: April 5, 2016Assignee: ASSET INTERTECH, INC.Inventors: Alfred L. Crouch, John C. Potter
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Publication number: 20150349968Abstract: Various integrated circuits protect hidden content e.g., embedded instruments, keys, data, etc.) using scan cell circuit(s). For example, a first scan cell circuit is connected to the hidden content, and a second scan cell circuit is connected to the first scan cell circuit forming all or part of a serial data path. The first scan cell circuit provides access to the hidden content whenever the first scan cell circuit is in a first specified state and prevents access whenever the first scan cell circuit is in a different state. The first scan cell circuit does not interrupt the serial data path when the first scan cell circuit is in the different state. The second scan cell circuit changes an operational characteristic of the first scan cell circuit whenever the second scan cell circuit is in a second specified state. In some cases, the second scan cell circuit can be eliminated.Type: ApplicationFiled: March 23, 2015Publication date: December 3, 2015Inventors: Jennifer L. Dworak, Alfred L. Crouch, Adam Zygmontowicz, John C. Potter
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Publication number: 20150026822Abstract: A network of storage units has a data path which is at least a portion of the network. The network also has a key storage unit and a gateway storage unit. If the key storage unit stores a key value, the key storage unit transmits a key signal to the gateway storage unit. If the gateway storage unit does not store a gateway value or the key signal is not transmitted to the gateway storage unit, the gateway storage unit does not insert a data path segment in the data path. If the gateway storage unit stores a gateway value and the key signal is transmitted to the gateway storage unit, the gateway storage unit inserts the data path segment.Type: ApplicationFiled: October 7, 2014Publication date: January 22, 2015Inventors: Alfred L. Crouch, John C. Potter
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Patent number: 8881301Abstract: A network of storage units has a data path which is at least a portion of the network. The network also has a key storage unit and a gateway storage unit. If the key storage unit stores a key value, the key storage unit transmits a key signal to the gateway storage unit. If the gateway storage unit does not store a gateway value or the key signal is not transmitted to the gateway storage unit, the gateway storage unit does not insert a data path segment in the data path. If the gateway storage unit stores a gateway value and the key signal is transmitted to the gateway storage unit, the gateway storage unit inserts the data path segment.Type: GrantFiled: October 5, 2010Date of Patent: November 4, 2014Assignee: Asset Intertech, Inc.Inventors: Alfred L. Crouch, John C. Potter
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Patent number: 8615691Abstract: A process for improving design-limited yield by collecting test fail data, converting to electrical faults, and localizing to physical area on semiconductor die. The steps of identifying an area on a wafer containing a fault to enable the analysis of specific defects, accumulating data suitable for yield monitoring analysis based on pattern test failures logged on scan cells in scan chains on automatic test equipment, and translating scan cell and scan chain failure reports to geometric locations of electrical structures on wafers.Type: GrantFiled: March 6, 2007Date of Patent: December 24, 2013Assignee: Advantest (Singapore) Pte LtdInventors: Richard C Dokken, Gerald S. Chan, John C Potter, Alfred L Crouch
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Patent number: 8060851Abstract: A method for operating a secure semiconductor IP access server to support failure analysis. A client presents a test failure and failure type to an automated server which traverses an electronic product design, definition, and test database to report specifically those components and interconnect likely to cause the failure with geometrical information which may be displayed on the client. Other aspects of semiconductor IP are protected by the server by limiting the trace mechanism and renaming components.Type: GrantFiled: September 5, 2007Date of Patent: November 15, 2011Assignee: Verigy (Singapore) Pte. Ltd.Inventors: Richard C. Dokken, Gerald S. Chan, Jacob J Orbon, Alfred L Crouch
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Patent number: 8010856Abstract: In a method for determining a number of possible hold time faults in a scan chain of a DUT, an environmental variable of the scan chain is set to a value believed to cause a hold time fault in the scan chain, and then a pattern is shifted through the scan chain. The pattern has a background pattern of at least n contiguous bits of a first logic state, followed by at least one bit of a second logic state, where n is a length of the scan chain. The number of possible hold time faults in the scan chain can be determined as a difference between i) a clock cycle when the at least one bit is expected to cause a transition at an output of the scan chain, and ii) a clock cycle when the at least one bit actually causes a transition at the output of the scan chain. If a value of the environmental variable at which the scan chain operates correctly can be determined, the location of one or more hold time faults can also be determined.Type: GrantFiled: March 31, 2008Date of Patent: August 30, 2011Assignee: Verigy (Singapore) Pte. Ltd.Inventors: Stephen A. Cannon, Richard C. Dokken, Alfred L. Crouch, Gary A. Winblad
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Publication number: 20110083195Abstract: A network of storage units has a data path which is at least a portion of the network. The network also has a key storage unit and a gateway storage unit. If the key storage unit stores a key value, the key storage unit transmits a key signal to the gateway storage unit. If the gateway storage unit does not store a gateway value or the key signal is not transmitted to the gateway storage unit, the gateway storage unit does not insert a data path segment in the data path. If the gateway storage unit stores a gateway value and the key signal is transmitted to the gateway storage unit, the gateway storage unit inserts the data path segment.Type: ApplicationFiled: October 5, 2010Publication date: April 7, 2011Inventors: Alfred L. Crouch, John C. Potter
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Patent number: 7853846Abstract: A method for determining that failures in semiconductor test are due to a defect potentially causing a hold time violation in a scan cell in a scan chain, counting the number of potential defects, and, if possible, localizing, and ameliorating hold time defects in a scan chain.Type: GrantFiled: October 31, 2007Date of Patent: December 14, 2010Assignee: Verigy (Singapore) Pte. Ltd.Inventors: Stephen A. Cannon, Richard C. Dokken, Alfred L. Crouch, Gary A. Winblad
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Publication number: 20100031092Abstract: A method for operating a secure semiconductor IP access server to support failure analysis. A client presents a test failure and failure type to an automated server which traverses an electronic product design, definition, and test database to report specifically those components and interconnect likely to cause the failure with geometrical information which may be displayed on the client. Other aspects of semiconductor IP are protected by the server by limiting the trace mechanism and renaming components.Type: ApplicationFiled: September 5, 2007Publication date: February 4, 2010Applicant: INOVYS CORPORATIONInventors: RICHARD C. DOKKEN, GERALD S. CHAN, JACOB J. ORBON, ALFRED L. CROUCH