Patents by Inventor Allan M. Hartstein

Allan M. Hartstein has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4644264
    Abstract: Covering metal test pads of a passivated integrated circuit process intermediate wafer or completed integrated circuit chip-to-test, with a thin conductive overlayer, and then accessing the test pads through the passivation layer and conductive overlayer, by a pulsed laser to provide voltage-modulated photon-assisted tunneling through the insulation layer, to the conductive overlayer as an electron current, and detecting the resulting electron current, provides a nondestructive test of integrated circuits. The passivation, normally present to protect the integrated circuit, also lowers the threshold for photoelectron emission. The conductive overlayer acts as a photoelectron collector for the detector. A chip-to-test which is properly designed for photon assisted tunneling testing has test sites accessible to laser photons even though passivated.
    Type: Grant
    Filed: March 29, 1985
    Date of Patent: February 17, 1987
    Assignee: International Business Machines Corporation
    Inventors: Johannes G. Beha, Russell W. Dreyfus, Allan M. Hartstein, Gary W. Rubloff
  • Patent number: 4587709
    Abstract: A process for defining small dimensions by forming a vertical step in an etchable material; edge depositing a masking material by angularly evaporating a metal; and etching away all of the first material not covered by the masking material; and device obtained by depositing source, drain, and gate defining material.
    Type: Grant
    Filed: June 6, 1983
    Date of Patent: May 13, 1986
    Assignee: International Business Machines Corporation
    Inventors: Alan B. Fowler, Allan M. Hartstein
  • Patent number: 4294898
    Abstract: A solid state rechargeable battery containing an alkali metal-containing electrode, a solid electrolyte, and an intercalation graphite-containing layer.
    Type: Grant
    Filed: May 5, 1980
    Date of Patent: October 13, 1981
    Assignee: International Business Machines Corporation
    Inventor: Allan M. Hartstein
  • Patent number: 4229732
    Abstract: A display device, addressing circuitry, and semiconductor control logic are all portions of an integrated structure formed by thin film technology on a single silicon wafer. The display comprises a thin film micromechanical electrostatic form of light reflective display formed by depositing thin films upon a silicon wafer and selectively etching to form metal-amorphous oxide micromechanical leaves deflected by applying potential thereto to provide electrostatic deflection. MOSFET devices are also formed upon the silicon wafer in juxtaposition with a plurality of micromechanical display elements. Addressing circuitry is connected to the MOSFET devices.
    Type: Grant
    Filed: December 11, 1978
    Date of Patent: October 21, 1980
    Assignee: International Business Machines Corporation
    Inventors: Allan M. Hartstein, Kurt E. Petersen