Abstract: In one non-limiting embodiment, a method is disclosed for performing a storage device operation on a die is provide having steps of choosing a storage device operation to perform, estimating which die is related to the storage device operation chosen to be performed and performing the storage device operation at the die based on the estimating.

Abstract: In one non-limiting embodiment, a method is disclosed for performing a storage device operation on a die is provide having steps of choosing a storage device operation to perform, estimating which die is related to the storage device operation chosen to be performed and performing the storage device operation at the die based on the estimating.

Abstract: A controller addresses portions of non-volatile memory via a memory interface using physical addresses and addresses portions of host data via the host interface using logical addresses. The controller maintains logical to physical mappings and physical to logical mappings for the logical addresses and the physical addresses. The controller is configured to move data from a source logical address to a destination logical address by updating logical to physical mappings and physical address to logical mappings without instructing the non-volatile memory to move the data between physical locations. In one embodiment, this process is used to implement a command to move or defragment data.

Abstract: A controller receives an indication that a memory management table loaded to a random-access storage device is in a corrupted state. The controller retrieves one or more error recovery parameters of a memory unit stored in metadata of a physical block of a plurality of physical blocks of the non-volatile storage device. The controller examines the one or more error recovery parameters to determine whether the one or more error recovery parameters indicate the memory unit is fresh or stale. The controller updates the memory management table with logical-to-physical translation information of the metadata for the memory unit that is determined to be fresh. The controller writes the updated memory management table to the non-volatile storage device.

Abstract: Systems, methods and/or devices are used to pair metablocks in a non-volatile storage device. In one aspect, a method of data organization of a memory device includes, writing data to and reading data from respective metablocks in a set of metablocks. The method further includes while performing said writing and reading: (1) accessing one or more management data structures in controller memory, identifying two or more metablock pairs; (2) accessing and updating metablock status information indicating which metablocks of the set of metablocks are closed, free and open; and (3) accessing and updating a valid count, corresponding to a number of sub-block memory units having valid data for each of a plurality of metablocks in the set of metablocks.

Abstract: A storage system and method are provided for flush optimization. In one embodiment, a storage system is provided comprising a cache, a non-volatile memory, and a controller. The controller is configured to: store, in the cache, data received from a host and to be written in the non-volatile memory; receive a command from the host to move the data stored in the cache into the non-volatile memory; without having executed the command, send a confirmation to the host that the command was executed; and execute the command after sending the continuation to the host.

Abstract: A device includes a memory and a controller coupled to the memory. The controller is configured to maintain a first address translation table associated with the memory and a second address translation table associated with the memory. The controller is further configured to receive a command to erase the memory. The controller is further configured to switch an indicator of an active address translation table from the first address translation table to the second address translation table in response to receiving the command.

Abstract: A storage system and method for thin provisioning are provided. In one embodiment, a storage system is provided comprising a memory and a controller. The controller is configured to provide a logical exported capacity of the memory to a host, wherein the logical exported capacity is greater than an actual storage capacity of the memory; receive a command from the host to write data to a logical address; determine whether there is available actual storage capacity in the memory to write the data; and write the data to a physical address in memory that corresponds to the logical address only if it is determined that there is available actual storage capacity in the memory to write the data. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

Abstract: In an illustrative example, a device includes a memory and a controller that is coupled to the memory and that is configured to communicate with the memory using at least a first channel and a second channel. The controller includes a bit error rate (BER) estimator configured to estimate a first BER corresponding to the first channel and a second BER corresponding to the second channel. The controller also includes a throughput balancer configured to determine whether to adjust at least one of a first clock rate of the first channel or a second clock rate of the second channel based on the first BER and the second BER.

Abstract: A memory device is embedded in (or connected to) a host device. The memory device includes a first boot partition and a second boot partition. The first boot partition stores first boot data. The second boot partition stores second boot data. The memory device includes a pointer that points to either the first boot partition or the second boot partition. The memory device transfers the first boot data from the first boot partition in response to receiving a boot signal from the host and the pointer pointing to the first boot partition. The host attempts to boot using the first boot data. If the host does not boot successfully from the first boot data then the host is booted from second boot data transferred from the memory device without the host requesting that the pointer switch to pointing at the second boot data.

Abstract: In an illustrative example, a device includes a memory and a controller that is coupled to the memory and that is configured to communicate with the memory using at least a first channel and a second channel. The controller includes a bit error rate (BER) estimator configured to estimate a first BER corresponding to the first channel and a second BER corresponding to the second channel. The controller also includes a throughput balancer configured to determine whether to adjust at least one of a first clock rate of the first channel or a second clock rate of the second channel based on the first BER and the second BER.

Abstract: A storage system uses consumption of transfer RAM as a trigger to enter and exit burst mode. In one embodiment, the storage system stores, in volatile memory, data to be written in non-volatile memory; monitors an allocation level of the volatile memory to determine a first amount of time that the allocation level is at a first level and a second amount of time that the allocation level is at second level; enters burst mode when a ratio of the first amount of time and the second amount of time is above a first threshold; and exits burst mode when the ratio of the first amount of time and the second amount of time is below a second threshold. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

Abstract: A memory system and method are provided for increasing read parallelism of translation pages. In one embodiment, a memory system is provided comprising a plurality of memory dies, where each memory die is configured with storage space for a portion of a logical-to-physical address map that is distributed among the plurality of memory dies. The memory system also comprises a controller in communication with the plurality of memory dies and configured to receive a plurality of requests to read a plurality of logical block addresses, determine which memory dies store portions of the logical-to-physical address map that contain the logical block addresses, and determine an order in which to read the portions of the logical-to-physical address map so that at least some of the portions that are stored in different memory dies are read in parallel. Other embodiments are provided.

Abstract: A device includes a schedule engine including a mode selection input. The schedule engine has an operating mode based on the mode selection input. The operating mode includes an opportunistic scheduling mode based on the mode selection input having a first value and a pipelined scheduling mode based on the mode selection input having a second value. The device further includes a buffer coupled to the schedule engine.

Abstract: A memory system and method are provided for performing garbage collection on blocks based on their obsolescence patterns. In one embodiment, a controller of a memory system classifies each of the plurality of blocks based on its obsolescence pattern and performs garbage collection only on blocks classified with similar obsolescence patterns. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

Abstract: A data storage device includes a write cache, a non-volatile memory and a controller coupled to the write cache and to the non-volatile memory. The controller is configured to, responsive to receiving a plurality of flush commands, write all data from the write cache to the non-volatile memory while executing fewer than all of the plurality of flush commands.

Abstract: Systems and methods for detecting a file of a predetermined size or greater are disclosed. Files may be downloaded to a storage device via a data stream. The storage device may analyze one or more aspects of the data stream, such as throughput and consistency, in order to determine whether the file is of a predetermined size or greater. In response to determining that the data stream includes a file of at least a predetermined size, the storage device may take one or more actions. One action is to store part or all of the file in a hybrid block, which is a block in non-volatile memory that is accessed (e.g., programmed and/or erased) in a different way than its designation. For example, a block originally designated for multi-level cell (MLC) storage may be programmed for single-level cell (SLC) storage, which is quicker than for MLC. In this way, the storage device may be able to store the downloaded file, with a certain throughput and consistency, without loss of data.

Abstract: A device includes a schedule engine including a mode selection input. The schedule engine has an operating mode based on the mode selection input. The operating mode includes an opportunistic scheduling mode based on the mode selection input having a first value and a pipelined scheduling mode based on the mode selection input having a second value. The device further includes a buffer coupled to the schedule engine.

Abstract: An apparatus includes a memory storing a group of pages of data. An interface of the apparatus is configured to send, to a data storage device (DSD) from a first command queue, a first instruction of instructions to store the group of pages to the DSD using a logical address corresponding to the group of pages. The interface is further configured to send, to the DSD from a second command queue, a second instruction of the instructions to write the group of pages to the DSD using the logical address. Sending a first copy of the group of pages in association with the first instruction and sending a second copy of the group of pages in association with the second instruction enables a multi-stage programming operation to be performed at the DSD without storing the group of pages at the DSD between stages of the multi-stage programming operation.

Abstract: A storage system uses consumption of transfer RAM as a trigger to enter and exit burst mode. In one embodiment, the storage system stores, in volatile memory, data to be written in non-volatile memory; monitors an allocation level of the volatile memory to determine a first amount of time that the allocation level is at a first level and a second amount of time that the allocation level is at second level; enters burst mode when a ratio of the first amount of time and the second amount of time is above a first threshold; and exits burst mode when the ratio of the first amount of time and the second amount of time is below a second threshold. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.