Patents by Inventor An-I Yeh

An-I Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7721166
    Abstract: A method for managing defect blocks in a non-volatile memory essentially comprises the steps of detecting defect blocks in the non-volatile memory, storing addresses of the defect blocks in a table block of the non-volatile memory, and setting the non-volatile memory to be read-only if the quantity of defect blocks in the non-volatile memory exceeds a threshold and no free blocks remain in the non-volatile memory. In a preferred embodiment, the free pages in the defect block continue to be programmed before setting the non-volatile memory to be read-only.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: May 18, 2010
    Assignee: Skymedi Corporation
    Inventors: Szu I Yeh, Hsin Jen Huang, Chien Cheng Lin, Chia Hao Lee, Chih Nan Yen, Fuja Shone
  • Publication number: 20090249140
    Abstract: A method for managing defect blocks in a non-volatile memory essentially comprises the steps of detecting defect blocks in the non-volatile memory, storing addresses of the defect blocks in a table block of the non-volatile memory, and setting the non-volatile memory to be read-only if the quantity of defect blocks in the non-volatile memory exceeds a threshold and no free blocks remain in the non-volatile memory. In a preferred embodiment, the free pages in the defect block continue to be programmed before setting the non-volatile memory to be read-only.
    Type: Application
    Filed: March 27, 2008
    Publication date: October 1, 2009
    Applicant: SKYMEDI CORPORATION
    Inventors: Szu I. Yeh, Hsin Jen Huang, Chien Cheng Lin, Chia Hao Lee, Chih Nan Yen, Fuja Shone
  • Publication number: 20090182230
    Abstract: The invention is disclosed to design a real-time pulse/echo system to perform 1-D real-time temperature measurement and integrate in the high-intensity focused ultrasound system. In the invention, a modified echo-time shifting algorithm is developed to calculate the corresponding phase shift from echo signal, which correlates with the instantaneous temperature change during heating process.
    Type: Application
    Filed: June 9, 2008
    Publication date: July 16, 2009
    Applicant: Chang Gung University
    Inventors: Hao-Li Liu, I-Yeh Lu, Sheng-Min Huang
  • Publication number: 20090061451
    Abstract: Provided herein are biosensors that comprise a biological signal source linked to a substrate by a peptide nucleic acid spacer and methods of use of the biosensor. In one embodiment, the biosensor is used to detect prostate-specific antigen.
    Type: Application
    Filed: September 4, 2008
    Publication date: March 5, 2009
    Inventors: Catalina Achim, Haibin Shi, Joanne I. Yeh
  • Publication number: 20080162772
    Abstract: A USB flash memory device is provided which automatically plays pre-recorded audio when the device is inserted into a USB port of a personal computer. The housing of the memory device may be imprinted with promotional information. The pre-recorded audio may include a promotional message, a message relating to a sweepstakes or other contest or any other information. The memory device includes a sound chip which includes its own memory that stores the pre-recorded message. The sound chip of the memory device may be pre-recorded in mass, or optionally an end-user may record its own personal message. Power to the memory device is supplied by the personal computer.
    Type: Application
    Filed: January 3, 2007
    Publication date: July 3, 2008
    Inventors: Chun I. Yeh, Jeffrey M. Morris
  • Patent number: 7375020
    Abstract: The present invention provides a method of forming a plurality of bumps over a wafer. The wafer has a plurality of contact pads and a passivation layer thereon and the passivation layer exposes the contact pads. An adhesion layer is formed over the active surface of the wafer and covers both the contact pads and the passivation layer. A metallic layer is formed over the adhesion layer. The patterned adhesion layer and patterned metallic layer remain on top of the contact pads. A photoresist layer having a plurality of openings that expose the metallic layer is formed on the active surface of the wafer. A flux material is deposited into the openings and then a solder block is disposed into each of the openings. A reflow process is performed to bond the solder block with the metallic layer. Finally, the flux material and the photoresist layer are removed.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: May 20, 2008
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Tsung-Hua Wu, Min-Lung Huang, Shih-Chang Lee, Jen-Kuang Fang, Yung-I Yeh
  • Patent number: 7355362
    Abstract: A power supply with performance display is disclosed. The computer power supply mainly has a power converter, a control module, and a display. The control module receives and processes the operating signals from the power converter, and then sends those processed signals to a display in a numerical value form. The power supply can be applied in a computer, an adapter, or other electronic products, which is convenient for users to know the operating status of the power converter.
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: April 8, 2008
    Assignee: Acbel Polytech Inc.
    Inventors: Ching-Yuan Pai, Jung-Tai Yeh, Hsin-I Yeh
  • Patent number: 7346405
    Abstract: An interface for connecting one of a plurality of industrial machines having different data format and storage configurations to a communications medium for remote monitoring and control, includes a programmable apparatus having a memory for storing data in predetermined locations and in a predetermined format, and for storing configuration information relating to the at least one of the machines; a configurable electrical interface responsive to the configuration information for receiving machine data from the machine and sending data to the machine; a data translator responsive to the configuration information, receiving data from the interface and transforming the data to the predetermined format; a processor responsive to the configuration information for reading data from and writing data to the predetermined locations in the memory; and a communications port connected to the communications medium.
    Type: Grant
    Filed: December 4, 2001
    Date of Patent: March 18, 2008
    Assignee: Connected Energy Corp.
    Inventors: Thomas I. Yeh, Kevin R. Hann, Timothy J. Spires, Mark D. Goodlein, Sam Wang
  • Patent number: 7164959
    Abstract: A method of classifying demand for an allocation term. The inventive method first inputs demand data, order data, and supply data. The method then classifies the demand data into prioritized demand data according to the order data and the supply data. The method finally combines and outputs the first, second, and third priority demand data, and updates the supply data according to the first, second, and third demand data.
    Type: Grant
    Filed: August 22, 2003
    Date of Patent: January 16, 2007
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Jung Huang, Fa-Liang Wang, Chung-I Liu, Ching-I Yeh
  • Publication number: 20060217905
    Abstract: A power supply with performance display is disclosed. The computer power supply mainly has a power converter, a control module, and a display. The control module receives and processes the operating signals from the power converter, and then sends those processed signals to a display in a numerical value form. The power supply can be applied in a computer, an adapter, or other electronic products, which is convenient for users to know the operating status of the power converter.
    Type: Application
    Filed: May 25, 2005
    Publication date: September 28, 2006
    Inventors: Ching-Yuan Pai, Jung-Tai Yeh, Hsin-I Yeh
  • Patent number: 7061084
    Abstract: A lead-bond type chip package includes a multilayer substrate for supporting and electrical interconnecting a semiconductor chip. The multilayer substrate has a slot defined therein. The multilayer substrate comprises an interlayer circuit board having prepregs disposed thereon, a plurality of leads on the prepreg on the upper surface of the interlayer circuit board, and a plurality of solder pads for making external electrical connection on the prepreg on the lower surface of the interlayer circuit board. The leads of the multilayer substrate are bonded to corresponding bonding pads formed on the semiconductor chip. A package body is formed on the multilayer substrate around the semiconductor chip and in the slot of the multilayer substrate. The multilayer substrate is capable of providing a power or ground plane formed therein for enhancing the electrical performance of the package, and providing a high wiring density for packaging a chip with high I/O connections.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: June 13, 2006
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Kun-Ching Chen, Yung I Yeh
  • Patent number: 6960822
    Abstract: A substrate includes a dielectric structure, an interconnection structure and a solder mask. The interconnection structure interlaces inside the dielectric structure. The solder mask covers the dielectric structure. The material of the solder mask can be the same as that of the dielectric structure contacting the solder mask. The material of the solder mask can be epoxy resin or bismaleimide-triazine.
    Type: Grant
    Filed: August 7, 2003
    Date of Patent: November 1, 2005
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Yi-Chuan Ding, Yung-I Yeh
  • Patent number: 6916732
    Abstract: A method of forming a plurality of bumps over a wafer. The wafer has an active surface having a passivation layer and a plurality of contact pads thereon. The passivation layer exposes the contact pads on the active surface. An adhesion layer is formed over the active surface of the wafer and covers both the contact pads and the passivation layer. A metallic layer is formed over the adhesion layer. The adhesion layer and the metallic layer are patterned so that the adhesion layer and the metallic layer remain on top of the contact pads. A photoresist layer is formed on the active surface of the wafer. The photoresist layer has a plurality of openings that expose the metallic layer. Flux material is deposited into the openings and then a solder block is disposed into each of the openings. A reflow process is carried out so that the solder block bonds with the metallic layer. Finally, the flux material and the photoresist layer are removed.
    Type: Grant
    Filed: July 11, 2003
    Date of Patent: July 12, 2005
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Tsung-Hua Wu, Min-Lung Huang, Shih-Chang Lee, Jen-Kuang Fang, Yung-I Yeh
  • Patent number: 6893475
    Abstract: A distillate fuel composition boiling in the range of about 190° C. to 400° C. with a T10 point greater than 205° C., and having a sulfur level of less than about 100 wppm, a total aromatics content of about 15 to 35 wt. %, a polynuclear aromatics content of less than about 3 wt. %, wherein the ratio of total aromatics to polynuclear aromatics is greater than about 11.
    Type: Grant
    Filed: April 20, 2000
    Date of Patent: May 17, 2005
    Assignee: ExxonMobil Research and Engineering Company
    Inventors: Edward S. Ellis, Lynne Gillespie, Michele S. Touvelle, William E. Lewis, Gordon F. Stuntz, Lisa I. Yeh
  • Publication number: 20050085061
    Abstract: The present invention provides a method of forming a plurality of bumps over a wafer. The wafer has a plurality of contact pads and a passivation layer thereon and the passivation layer exposes the contact pads. An adhesion layer is formed over the active surface of the wafer and covers both the contact pads and the passivation layer. A metallic layer is formed over the adhesion layer. The patterned adhesion layer and patterned metallic layer remain on top of the contact pads. A photoresist layer having a plurality of openings that expose the metallic layer is formed on the active surface of the wafer. A flux material is deposited into the openings and then a solder block is disposed into each of the openings. A reflow process is performed to bond the solder block with the metallic layer. Finally, the flux material and the photoresist layer are removed.
    Type: Application
    Filed: November 19, 2004
    Publication date: April 21, 2005
    Inventors: Tsung-Hua Wu, Min-Lung Huang, Shih-Chang Lee, Jen-Kuang Fang, Yung-I Yeh
  • Publication number: 20050052352
    Abstract: A method of classifying demand for an allocation term. The inventive method first inputs demand data, order data, and supply data. The method then classifies the demand data into prioritized demand data according to the order data and the supply data. The method finally combines and outputs the first, second, and third priority demand data, and updates the supply data according to the first, second, and third demand data.
    Type: Application
    Filed: August 22, 2003
    Publication date: March 10, 2005
    Inventors: Chi-Jung Huang, Fa-Liang Wang, Chung-I Liu, Ching-I Yeh
  • Publication number: 20050044012
    Abstract: A method of matching customer demand with production capacity of a plurality of factory facilities. The inventive method includes inputting demand data and supply data, performing a first matching operation, collecting rematched demand data and rematched supply data, classifying the rematched demand data, and performing a second matching operation.
    Type: Application
    Filed: August 22, 2003
    Publication date: February 24, 2005
    Inventors: Chi-Jung Huang, Fa-Liang Wang, Chung-I Liu, Ching-I Yeh
  • Publication number: 20040185651
    Abstract: A method of forming a plurality of bumps over a wafer. The wafer has an active surface having a passivation layer and a plurality of contact pads thereon. The passivation layer exposes the contact pads on the active surface. An adhesion layer is formed over the active surface of the wafer and covers both the contact pads and the passivation layer. A metallic layer is formed over the adhesion layer. The adhesion layer and the metallic layer are patterned so that the adhesion layer and the metallic layer remain on top of the contact pads. A photoresist layer is formed on the active surface of the wafer. The photoresist layer has a plurality of openings that expose the metallic layer. Flux material is deposited into the openings and then a solder block is disposed into each of the openings. A reflow process is carried out so that the solder block bonds with the metallic layer. Finally, the flux material and the photoresist layer are removed.
    Type: Application
    Filed: July 11, 2003
    Publication date: September 23, 2004
    Inventors: Tsung-Hua Wu, Min-Lung Huang, Shih-Chang Lee, Jen-Kuang Fang, Yung-I Yeh
  • Patent number: 6795746
    Abstract: The internet bonding diagram system comprises a processing unit to process the information send by a user via a network. A blank lead frame/substrate database is coupled to the processing unit to store lead frame information. A job database is coupled to the processing unit to store information forwarded by a potential client, wherein the job database includes buyer satisfaction data provided by said user. A bonding diagram generator is coupled to the processing unit to generate a layout of bonding diagram in accordance with the information provided by the user. A forwarding module is responsive to the bonding diagram generator to forward the layout of bonding diagram to the user.
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: September 21, 2004
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun-Min Chuang, I-Liang Lin, Chun-Kuang Lin, Yung-I Yeh
  • Publication number: 20040150099
    Abstract: A cavity down multi-chips module package mainly comprises a substrate, a heat spreader, a plurality of chips and a carrier. The heat spreader is attached on the substrate via an adhesive so as to define a cavity through the opening passing through the substrate, and the carrier for redistributing electrical signals is disposed in the opening so as to be mounted on the heat spreader through another adhesive. Moreover, a plurality of chips are attached on the carrier and electrically connected to the carrier through first electrically conductive wires. Besides, the carrier is electrically connected to the substrate through second electrically conductive wires. Accordingly, the electrical signals can be transmitted from the chips to the substrate through the carrier, the first wires, and the second wires so as to shorten the electrical paths and to upgrade the electrical performance of the package.
    Type: Application
    Filed: December 30, 2003
    Publication date: August 5, 2004
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yi-Chuan Ding, Yung-I Yeh