Abstract: In a specific embodiment, a system for providing video is disclosed, the system having a system bus, which in one embodiment is an Advanced Graphics Port (AGP) bus. The system bus is connected to a data bridge, which is connected to a second and third AGP bus. Each of the AGP busses are connected to graphics processors. The bridge routes data requests from one graphics processor to the second graphics processor without accessing the system AGP bus based upon a memory mapping information stored in a routing table or a register set. In another aspect of the present invention, the bridge responds to initialization requests using attributes that may vary depending on the specific mode of operation. Another aspect of the present invention allows for conversion between various AGP protocol portions.

Abstract: In a specific embodiment, a system for providing video includes a system bus, which in one embodiment is an Advanced Graphics Port (AGP) busy. The system bus is connected to a data bridge, which is connected to a second and third AGP bus. Each of the AGP busses are connected to graphics processors. The bridge routes data requests from one graphics processor to the second graphics processor without accessing the system AGP bus based upon a memory mapping information stored in a routing table or a register set. In another aspect of the present invention, the bridge responds to initialization requests using attributes that may vary depending on the specific mode of operation. Another aspect of the present invention allows for conversion between various AGP protocol portions.

Abstract: In a specific embodiment, a system for providing video is disclosed, the system having a system bus, which in one embodiment is an Advanced Graphics Port (AGP) bus. The system bus is connected to a data bridge, which is connected to a second and third AGP bus. Each of the AGP busses are connected to graphics processors. The bridge routes data requests from one graphics processor to the second graphics processor without accessing the system AGP bus based upon a memory mapping information stored in a routing table or a register set. In another aspect of the present invention, the bridge responds to initialization requests using attributes that may vary depending on the specific mode of operation. Another aspect of the present invention allows for conversion between various AGP protocol portions.

Abstract: A method and apparatus for utilizing a data cache in a system with both 2D and 3D graphics applications. In a specific embodiment of the present invention, a mode signal is received by the video system indicating whether a 2D or 3D application is to be used. Depending on the mode signal, either as a unified cache capable of being accessed by two separate data access streams, or two independent caches, each accessed by one data access stream.

Abstract: In a specific embodiment, a system for providing video is disclosed, the system having a system bus, which in one embodiment is an Advanced Graphics Port (AGP) bus. The system bus is connected to a data bridge, which is connected to a second and third AGP bus. Each of the AGP busses are connected to graphics processors. The bridge routes data requests from one graphics processor to the second graphics processor without accessing the system AGP bus based upon a memory mapping information stored in a routing table or a register set. In another aspect of the present invention, the bridge responds to initialization requests using attributes that may vary depending on the specific mode of operation. Another aspect of the present invention allows for conversion between various AGP protocol portions.

Abstract: A method and apparatus dealing with optimizing the arbitration between clients requesting data. In particular, a set of rules determining which client request will provide an optimized subsequent memory access is implemented. The highest rule recognizes a client in urgent need of data, generally because it has not been services by the arbiter. The next highest-ranking rules would recognize data accesses of the same operation, such as read or write, and to the same page of memory, or requests to a different bank of memory. The next highest ranking rules would be for data accesses on the same page currently being accessed, but for a different operation, and for a different operation and to a different bank. Finally, any other client requests to a different page on the same bank/ would have the lowest priority. Such a request optimizes bandwidth of the memory bus.

Abstract: A method and apparatus for storing sequential data words associated with a block of data in a non-linear manner within the data block is taught such that any row or column associated with the data block may be accessed using a burst access. A row, or column of data accessed by a burst frees up instruction bandwidth of a video controller. In particular, it is assured that each row and column of data associated with the data block has at least one sequential pair of data words associated with it. By assuring at least one sequential pair of data words, it is possible to issue a burst request for a minimum of two words of data with each row access, or column access of the video controller.

Abstract: A method and apparatus for multipass pixel processing is presented. A command stream that includes a plurality of drawing commands is received where multipass drawing commands included in the stream include a number of sets of state information and one or more graphics primitives. For a multipass pixel processing operation, the graphics pipeline that performs the pixel processing is first configured using a first set of state information included in the sets of state information for the multipass operation. Once the graphics pipeline has been configured, at least a portion of the processing to be performed for the drawing command is performed using the graphics pipeline as configured by this first set of state information. The resultant data produced through this processing is stored as intermediate data. This may be referred to as the first pass in the multipass operation. The graphics pipeline is then reconfigured using a subsequent set of state information corresponding to the multipass drawing command.

Abstract: A method and apparatus for graphics processing that utilizes multiple graphics processors in parallel is presented. A primary graphics processor is operably coupled to a primary memory that includes a primary color buffer and a primary Z buffer. The primary processor processes a first portion of the image data for a frame, where processing the first portion stores color data in the primary color buffer and Z data in the primary Z buffer. A secondary processor is operably coupled to a secondary memory that includes a secondary color buffer and a secondary Z buffer. The secondary processor processes a second portion of the image data for the frame. The processing of the second portion of the image data results in color data being stored in the secondary color buffer and Z data being stored in the secondary Z buffer. The display signal that results in the image data for the frame being displayed is generated by a display driver included in the primary processor.

Abstract: A method and apparatus for blending textures and other operands in a video graphics system using a single blend unit is accomplished through the following steps. A first set of control information is received. A first portion of the first set of control information is sued to select a first blend operand, which is preferably a texture in a graphics processing system. A second blend operand is selected based on a second portion of the first set of control information. The first and second blend operands are combined using an operation selected by a third portion of the first set of control information. The combination of the first and second blend operands produces a first combination result. A second set of control information is received, and a first portion of the second set of control information selects a third blend operand. The first combination result is then selected as a fourth blend operand using a second portion of the second set of control information.

Abstract: A method and apparatus for utilizing a data cache in a system with both 2D and 3D graphics applications. In a specific embodiment of the present invention, a mode signal is received by the video system indicating whether a 2D or 3D application is to be used. Depending on the mode signal, either as a unified cache capable of being accessed by two separate data access streams, or two independent caches, each accessed by one data access stream.

Abstract: A method and apparatus for rendering shadows on a three-dimensional scene is accomplished by generating a light source texture map of the given three-dimensional scene. The light source texture map is generated based on a viewing perspective being proximal to a light source projection. Once the light source texture map has been generated, an object element of the three-dimensional scene is rendered based on the light source texture map and image information. The image information includes vertex components corresponding to object elements of the three-dimensional scene.

Abstract: A method and apparatus for mapping a linear address to a tiled address that reduces latency between retrieval of pages of data is accomplished when a video graphics processor receives a linear address from the central processing unit and determines whether the linear address is referencing a tiled surface, which is one of up to four portions of the memory. If so, the video graphics processor obtains parameters of the tiled surface. Having obtained the parameters, the video graphics processor determines a normalized linear address based on at least one of the parameters and the linear address. Having done this, the video graphics processor determines a band pointer of the tiled surface based on at least one of the parameters, the normalized linear address and a modular function. In essence, the band pointer points to a normalized initial address of a band of a tiled surface, which includes a plurality of bands.