Abstract: A chip has formed thereon integrated circuit elements, which include a main circuit and an associated non volatile memory structure. A test result associated with prior testing of a function of the main circuit is stored in the non volatile memory structure. Additional apparatus and methods are disclosed.

Abstract: A thyristor memory device may comprise a capacitor electrode formed over a base region of the thyristor using a replacement gate process. During formation of the thyristor, a base-emitter boundary may be aligned relative to a shoulder of the capacitor electrode. In a particular embodiment, the replacement gate process may comprise defining a trench in a layer of dielectric over semiconductor material. Conductive material for the electrode may be formed over the dielectric and in the trench. It may further be patterned to form a shoulder for the electrode that extends over regions of the dielectric over a base region for the thyristor. The extent of the shoulder may be used to pattern the dielectric and/or to assist alignment of implants for the base and emitter regions of the thyristor.

Abstract: In an example gated-thyristor circuit, formation of thyristor body regions involves an angled implant of a thyristor body region, such as a base region, to mitigate capacitive coupling of a gated voltage pulse from the thyristor gate to a body region that is not underlying the thyristor gate. According to a more particular example embodiment, such a thyristor switches between a current-passing mode and a current blocking mode in response to at least one voltage pulse coupling to an underlying thyristor base region. Using a first ion type to provide one polarity, an immediately-adjacent thyristor base region is angle implanted through an emitter body region that is located to other side of the adjacent thyristor base region. The emitter body region is then implanted using ions of another ion type to provide the opposite polarity. This angle implantation permits definition of the adjacent thyristor base region sufficiently distant from (e.g.

Abstract: A thyristor memory device may comprise a capacitor electrode formed over a base region of the thyristor using a replacement gate process. During formation of the thyristor, a base-emitter boundary may be aligned relative to a shoulder of the capacitor electrode. In a particular embodiment, the replacement gate process may comprise defining a trench in a layer of dielectric over semiconductor material. Conductive material for the electrode may be formed over the dielectric and in the trench. It may further be patterned to form a shoulder for the electrode that extends over regions of the dielectric over a base region for the thyristor. The extent of the shoulder may be used to pattern the dielectric and/or to assist alignment of implants for the base and emitter regions of the thyristor.

Abstract: In a method of processing a semiconductor device, a silicide-blocking layer may be formed over a semiconductor material. After defining the silicide-blocking layer, impurities may be implanted into portions of the semiconductor material as defined by the silicide-blocking layer. After the implant, silicide may be formed in a surface region of the semiconductor material as permitted by the silicide-blocking layer. Regions of the impurity implant may comprise boundaries that are related to the outline of the silicide formed thereover. In a further embodiment, the implant may define a base region to a thyristor device. The implant may be performed with an angle of incidence to extend portions of the base region beneath a peripheral edge of the blocking mask. Next, an anode-emitter region may be formed using an implant of a substantially orthogonal angle of incidence and self-aligned to the mask.