Abstract: A cyclic redundancy check value is computed by iterating a loop in which the contents of an operand having a first CRC value and a data value are shifted 1 bit to the end at which the CRC value is located. A generator value is exclusive-RED into corresponding respective bits of the operand only if the bit shifted out of the operand by the shift was set. This is repeated until a data byte has been displaced entirely and a modified cyclic redundancy check value occupies the most significant bytes, but now incorporates the original data byte in modified form.

Abstract: A method and a circuit configuration for operation of a bus system. A bus includes a bus control unit which controls only an arbitration and when time is exceeded during a data transmission. An actual data transmission is determined in a respective active master unit and an addressed slave unit. A characteristic of a bus cycle, such as a data length, access to a data area or a control area and a waiting cycle, is transmitted in encoded form through a multiplicity of control lines.