Patents by Inventor Anthony Dip

Anthony Dip has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050056219
    Abstract: A method is provided for forming a metal-containing film on a substrate by a sequential gas exposure process in a batch type processing system. A metal-containing film can be formed on a substrate by providing a substrate in a process chamber of a batch type processing system, heating the substrate, sequentially flowing a pulse of a metal-containing precursor gas and a pulse of a reactant gas in the process chamber, and repeating the flowing processes until a metal-containing film with desired film properties is formed on the substrate. The method can form a metal-oxide film, for example HfO2 and ZrO2, a metal-oxynitride film, for example HfxOzNw, and HfxOzNw, a metal-silicate film, for example HfxSiyOz and ZrxSiyOz, and a nitrogen-containing metal-silicate film, for example HfxSiyOzNw and ZrxSiyOzNw. A processing tool containing a batch type processing system for forming a metal-containing film by a sequential gas exposure process is provided.
    Type: Application
    Filed: September 16, 2003
    Publication date: March 17, 2005
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Anthony Dip, Michael Toeller, Kimberly Reid
  • Publication number: 20050048742
    Abstract: This invention provides a method for modifying the surface properties of a Si or Si alloy substrate by performing repeated etch-grow cycles of thermal oxide to yield a more defect free substrate with a more uniform nucleating surface which provides an improved interface for dielectric formation. Additionally, this method of processing does not expose the substrate to ambient atmosphere and preserves the improved surface until subsequent processing steps are performed.
    Type: Application
    Filed: August 26, 2003
    Publication date: March 3, 2005
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Anthony Dip, Pradip Roy, Raymond Joe
  • Publication number: 20050026453
    Abstract: Ultra-thin oxide layers are formed utilizing low pressure processing to achieve self-limiting oxidation of substrates and provide ultra-thin oxide. The substrates to be processed can contain an initial dielectric layer such as an oxide layer, an oxynitride layer, a nitride layer, a high-k layer, or alternatively can lack an initial dielectric layer. The processing can be carried out using a batch type process chamber or, alternatively, using a single-wafer process chamber. One embodiment of the invention provides self-limiting oxidation of Si-substrates that results in SiO2 layers with a thickness of about 15 A, where the thickness of the SiO2 layers varies less than about 1 A over the substrates.
    Type: Application
    Filed: July 31, 2003
    Publication date: February 3, 2005
    Applicants: Tokyo Electron Limited, International Business Machines Corporation
    Inventors: David O'Meara, Cory Wajda, Anthony Dip, Michael Toeller, Toshihara Furukawa, Kristen Scheer, Alessandro Callegari, Fred Buehrer, Sufi Zafar, Evgeni Gousev, Anthony Chou, Paul Higgins
  • Publication number: 20050026459
    Abstract: Ultra-thin oxynitride layers are formed utilizing low-pressure processing to achieve self-limiting oxidation of substrates and provide ultra-thin oxynitride. The substrates to be processed can contain an initial dielectric layer such as an oxide layer, an oxynitride layer, or a nitride layer, or alternatively can lack an initial dielectric layer. The processing can be carried out using a batch type process chamber or a single-wafer process chamber.
    Type: Application
    Filed: July 31, 2003
    Publication date: February 3, 2005
    Applicants: Tokyo Electron Limited, International Business Machines Corporation
    Inventors: David O'Meara, Cory Wajda, Anthony Dip, Michael Toeller, Toshihara Furukawa, Kristen Scheer, Alessandro Callegari, Fred Buehrer, Sufi Zafar, Evgeni Gousev, Anthony Chou, Paul Higgins
  • Patent number: 6799940
    Abstract: A removable semiconductor wafer susceptor used for supporting a substrate during batch processing. The susceptor includes a flat circular central plane with a predetermined outer diameter. The susceptor is sized to fit within an inner diameter formed from wafer support ledges of a wafer transport container. The susceptor includes edges that are chamfered and rounded to lessen stress concentration at the edges. The susceptor is transported through processing by a sieving action of transport automation.
    Type: Grant
    Filed: December 5, 2002
    Date of Patent: October 5, 2004
    Assignee: Tokyo Electron Limited
    Inventors: Raymond Joe, Anthony Dip
  • Publication number: 20040115585
    Abstract: A antireflective film 50 is formed on a thermocouple 42 arranged in a processing vessel 1 of a heat treatment apparatus in order to improve the transient response characteristics of the thermocouple 42. In a typical embodiment, the thermocouple 42 is made by connecting a platinum wire 43A and a platinum-rhodium alloy wire 43B, and the antireflective film 50 is composed by stacking a silicon nitride layer 50C, silicon layer 50B and a silicon nitride layer 50A in that order.
    Type: Application
    Filed: September 29, 2003
    Publication date: June 17, 2004
    Inventors: Toshiyuki Makiya, Takanori Saito, Karuki Eickmann, Sanjeev Kaushai, Anthony Dip, David L. O'meara
  • Publication number: 20040109748
    Abstract: A removable semiconductor wafer susceptor used for supporting a substrate during batch processing. The susceptor includes a flat circular central plane with a predetermined outer diameter. The susceptor is sized to fit within an inner diameter formed from wafer support ledges of a wafer transport container. The susceptor includes edges that are chamfered and rounded to lessen stress concentration at the edges. The susceptor is transported through processing by a sieving action of transport automation.
    Type: Application
    Filed: December 5, 2002
    Publication date: June 10, 2004
    Inventors: Raymond Joe, Anthony Dip
  • Publication number: 20040040510
    Abstract: A semiconductor wafer susceptor for batch substrate processing. The susceptor includes a central region in a primary plane and a plurality of flat annular extensions extending below the central region in a secondary plane. The primary and secondary planes are parallel to each other. An edge of the substrate overhangs the central region allowing no contact of the susceptor with the substrate edge.
    Type: Application
    Filed: September 4, 2002
    Publication date: March 4, 2004
    Inventors: Anthony Dip, Takanori Saito, Raymond Joe
  • Patent number: 5618351
    Abstract: Thermal treatment boat comprising a cylinder having a central axis and a plurality of band slots having opposed upper and lower surfaces in planes perpendicular to said central axis and spaced at predetermined locations along said central axis. At least one slot in each set extends around at least 180.degree. and less than of the full circumference of said cylinder. Pairs of adjacent band slots define an annular band therebetween. The height of each slot being from about 3.8 to 12.7 mm. Each of the bands having a height, Height.sub.Band, in mm, according to the equation: ##EQU1## wherein Height.sub.Band is always .ltoreq. wafer thickness; ColumnHeight is the total height of the cylinder, mm; BandSlotHeight is the height of the slot, mm; and NumberBands is the total number of bands in the treatment boat. The cylinder can include a wafer loading effector slot therethrough in a plane of the central axis extending along the length of the cylinder.
    Type: Grant
    Filed: November 28, 1995
    Date of Patent: April 8, 1997
    Assignee: Silicon Valley Group, Inc.
    Inventors: Terry A. Koble, Jr., Anthony Dip, Erik H. Engdahl, Ian R. Oliver, Christopher T. Ratliff