Abstract: A mapping circuit (300) for selecting cells of a multi core hybrid I/Q digital to analog converter includes a first sub-mapping circuit (310a) configured to define a first group of cores for each data symbol to be transmitted and to select cells of the first group of cores for an I-code of the data symbol to be transmitted. The mapping circuit (310b) further includes a second sub-mapping circuit configured to define a second group of cores for each data symbol and to select cells of the second group of cores for a Q-code of the data symbol.

Abstract: A mapping circuit (300) for selecting cells of a multi core hybrid I/Q digital to analog converter includes a first sub-mapping circuit (310a) configured to define a first group of cores for each data symbol to be transmitted and to select cells of the first group of cores for an I-code of the data symbol to be transmitted. The mapping circuit (310b) further includes a second sub-mapping circuit configured to define a second group of cores for each data symbol and to select cells of the second group of cores for a Q-code of the data symbol.

Abstract: In various aspects, a communication device and method for transmitting data are described herein. A communication device may include a modulator that maps send data to a set of quadrature amplitude modulation symbols. The communication device may also include a determiner that determines a rotation of the set of quadrature amplitude modulation symbols based on a difference between an absolute value of a real component and an absolute value of an imaginary component of the quadrature amplitude modulation symbol of the set of quadrature amplitude modulation symbols having a maximum absolute value being reduced by the rotation. The communication device may further include a symbol processor that applies the rotation to each quadrature amplitude modulation symbol of the set of quadrature amplitude modulation symbols. The communication device may further include a transmission circuit that transmits the set of rotated quadrature amplitude modulation symbols via a radio communication channel.

Abstract: Apparatus and methods for a digital-to-time converter (DTC) are provided. In an example, a DTC can include a phase interpolator and a ring oscillator. The phase interpolator can be configured to receive digital representations of two or more distinct phase signals, and to interpolate the digital representations of the two or more distinct phase signals to provide an interpolated output phase signal. The ring oscillator can be configured to receive the interpolated phase signal, to lock on to a frequency and a phase of the interpolated output phase signal, and to provide a filtered phase signal.

Abstract: A method for operating a radio frequency digital to analog conversion circuitry with a number of cells if a first input sample and a subsequent second input sample have different signs, comprises generating a first analog signal corresponding to the first input sample using a first subset of the number of cells of the digital to analog conversion circuitry with a local oscillator signal having a first polarity. The method further comprises applying a second local oscillator signal with an inverted polarity to a second subset of cells of the digital to analog conversion circuitry when a number of cells from the first subset of cells are used and selecting a number of cells from the second subset of cells to generate a second analog signal corresponding to the second input sample.

Abstract: A method for operating a radio frequency digital to analog conversion circuitry with a number of cells if a first input sample and a subsequent second input sample have different signs, comprises generating a first analog signal corresponding to the first input sample using a first subset of the number of cells of the digital to analog conversion circuitry with a local oscillator signal having a first polarity. The method further comprises applying a second local oscillator signal with an inverted polarity to a second subset of cells of the digital to analog conversion circuitry when a number of cells from the first subset of cells are used and selecting a number of cells from the second subset of cells to generate a second analog signal corresponding to the second input sample.

Abstract: A digital to analog converter circuit includes a plurality of digital to analog converter cells. The digital to analog converter circuit further includes a control circuit configured to control an operation of a digital to analog converter cell of the plurality of digital to analog converter cells based on a first phase component of a digital signal comprising information to be transmitted during a first time interval and based on a second phase component of the digital signal comprising information to be transmitted during a second time interval.

Abstract: Apparatus and methods for a digital-to-time converter (DTC) are provided. In an example, a DTC can include a phase interpolator and a ring oscillator. The phase interpolator can be configured to receive digital representations of two or more distinct phase signals, and to interpolate the digital representations of the two or more distinct phase signals to provide an interpolated output phase signal. The ring oscillator can be configured to receive the interpolated phase signal, to lock on to a frequency and a phase of the interpolated output phase signal, and to provide a filtered phase signal.

Abstract: A digital to analog converter circuit includes a plurality of digital to analog converter cells. The digital to analog converter circuit further includes a control circuit configured to control an operation of a digital to analog converter cell of the plurality of digital to analog converter cells based on a first phase component of a digital signal comprising information to be transmitted during a first time interval and based on a second phase component of the digital signal comprising information to be transmitted during a second time interval.