Patents by Inventor Apostolos Voutsas
Apostolos Voutsas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20050164424Abstract: A method has been provided for forming a polycrystalline silicon (p-Si) film with a small amount of hydrogen. Such a film has been found to have excellent sheet resistance, and it is useful in the fabrication of liquid crystal display (LCD) panels made from thin film transistors (TFTs). The low hydrogen content polycrystalline silicon films are made from introducing a small amount of hydrogen gas, with Ar, during the sputter deposition of an amorphous silicon film. The hydrogen content in the film is regulated by controlling the deposition temperatures and the volume of hydrogen in the gas feed during the sputter deposition. The polycrystalline silicon film results from annealing the low hydrogen content amorphous silicon film thus formed.Type: ApplicationFiled: November 10, 2003Publication date: July 28, 2005Inventor: Apostolos Voutsas
-
Patent number: 6921434Abstract: A method is provided for maintaining a planar surface as crystal grains are laterally grown in the fabrication of crystallized silicon films. The method comprises: forming a film of amorphous silicon with a surface and a plurality of areas; irradiating each adjacent areas of the silicon film with a first sequence of laser pulses; and, in response to the first sequence of laser pulses, controlling the planarization of the silicon film surface between adjacent areas of the silicon film as the crystal grains are laterally grown. By controlling the number of laser pulses in the sequence, the temporal separation between pulses, and the relative intensity of the pulses, the lateral growth length characteristics of the crystal grains can be traded against the silicon film flatness. A silicon film formed by a pulsed laser sequence crystallization process is also provided.Type: GrantFiled: October 3, 2003Date of Patent: July 26, 2005Assignee: Sharp Laboratories of America, Inc.Inventor: Apostolos Voutsas
-
Patent number: 6903370Abstract: A substrate and a method for fabricating variable quality substrate materials are provided. The method comprises: selecting a first mask having a first mask pattern; projecting a laser beam through the first mask to anneal a first area of semiconductor substrate; creating a first condition in the first area of the semiconductor film; selecting a second mask having a second mask pattern; projecting the laser beam through the second mask to anneal a second area of the semiconductor film; and, creating a second condition in the second area of the semiconductor film, different than the first condition. More specifically, when the substrate material is silicon, the first and second conditions concern the creation of crystalline material with a quantitative measure of lattice mismatch between adjacent crystal domains. For example, the lattice mismatch between adjacent crystal domains can be measured as a number of high-angle grain boundaries per area.Type: GrantFiled: November 10, 2003Date of Patent: June 7, 2005Assignee: Sharp Laboratories of America, Inc.Inventors: Apostolos Voutsas, Yasuhiro Mitiani, Mark A. Crowder
-
Publication number: 20050116237Abstract: A flexible metal foil substrate organic light emitting diode (OLED) display and a method for forming the same are provided. The method comprises: supplying a metal foil substrate such as titanium (Ti), Inconel alloy, or Kovar, having a thickness in the range of 10 to 500 microns; planarizing the metal foil substrate surface; depositing an electrical isolation layer having a thickness in the range of 0.5 to 2 microns overlying the planarized metal foil substrate surface; depositing amorphous silicon having a thickness in the range of 25 to 150 nanometers (nm) overlying the electrical insulation layer; from the amorphous silicon, forming polycrystalline silicon overlying the electrical insulation layer; forming thin-film transistors (TFTs) in the polycrystalline silicon; and, forming an electronic circuit using the TFTs, such as an OLED display.Type: ApplicationFiled: January 5, 2005Publication date: June 2, 2005Inventor: Apostolos Voutsas
-
Patent number: 6900083Abstract: The present invention concerns a method of forming multi-layers such as base-coat and active layers for TFTs. In accordance with the preferred embodiment of the present invention, a first layer is formed on a transparent substrate using a physical vapor deposition. And a second layer is sequentially formed using a physical vapor deposition on the first layer without breaking vacuum. The present invention simplifies the TFT fabrication while decreasing the water or hydrogen content within multilayers including a base-coat (BC) layer.Type: GrantFiled: August 31, 2001Date of Patent: May 31, 2005Assignee: Sharp Laboratories of America, Inc.Inventors: Apostolos Voutsas, Yukihiko Nakata
-
Publication number: 20050103255Abstract: A process of lateral crystallization is provided for increasing the lateral growth length (LGL). A localized region of the substrate is heated for a short period of time. While the localized region of the substrate is still heated, a silicon film overlying the substrate is irradiated to anneal the silicon film to crystallize a portion of the silicon film in thermal contact with the heated substrate region. A CO2 laser may be used as a heat source to heat the substrate, while a UV laser or a visible spectrum laser is used to irradiate and crystallize the film.Type: ApplicationFiled: November 13, 2003Publication date: May 19, 2005Inventors: Apostolos Voutsas, Robert Sposili, Mark Crowder
-
Patent number: 6878640Abstract: A method for fabricating silicon tiles and silicon tile targets has been provided, such as may be used in the sputter deposition of thin film transistor (TFT) silicon films. The method describes processes of cutting the tiles, beveling the tiles edges, etching the tiles to minimize residual damage caused by cutting the tiles, polishing the tiles to a specified flatness, and attaching the tiles to a backing plate. All these processes are performed with the aim of minimizing contamination and particle formations when the target is used for sputter deposition.Type: GrantFiled: December 30, 2003Date of Patent: April 12, 2005Assignee: Sharp Laboratories of America, Inc.Inventors: Apostolos Voutsas, John Hartzell
-
Publication number: 20050037551Abstract: A high-quality isotropic polycrystalline silicon (poly-Si) and a method for fabricating high quality isotropic poly-Si film are provided. The method includes forming a film of amorphous silicon (a-Si) and using a MISPC process to form poly-Si film in a first area of the a-Si film. The method then anneals a second area, included in the first area, using a Laser-Induced Lateral Growth (LILaC) process. In some aspects, a 2N-shot laser irradiation process is used as the LILaC process. In some aspects, a directional solidification process is used as the LILaC process. In response to using the MISPC film as a precursor film, the method forms low angle grain boundaries in poly-Si in the second area.Type: ApplicationFiled: August 13, 2003Publication date: February 17, 2005Inventors: Masao Moriguchi, Apostolos Voutsas, Mark Crowder
-
Publication number: 20050009352Abstract: A laser annealing mask is provided with cross-hatched sub-resolution aperture patterns. The mask comprises a first section with aperture patterns for transmitting approximately 100% of incident light, and at least one section with cross-hatched sub-resolution aperture patterns for diffracting incident light. In one aspect, a second mask section with cross-hatched sub-resolution aperture patterns has an area adjacent a vertical edge and a third mask section with cross-hatched sub-resolution aperture patterns adjacent the opposite vertical edge, with the first mask section being located between the second and third mask sections. The section with cross-hatched sub-resolution aperture patterns transmits approximately 40% to 70%, and preferably 50% to 60% of incident light energy density. In some aspects, the section with cross-hatched sub-resolution aperture patterns includes a plurality of different cross-hatched aperture patterns.Type: ApplicationFiled: August 5, 2004Publication date: January 13, 2005Inventors: Mark Crowder, Yasuhiro Mitani, Apostolos Voutsas
-
Patent number: 6830965Abstract: A metal induced crystallization process is provided which employs an amorphous silicon film precursor deposited by physical vapor deposition, wherein the precursor film does not readily undergo crystallization by partial solid phase crystallization. Using this physical vapor deposition amorphous silicon precursor film, the amorphous silicon film is transformed to polysilicon by metal induced crystallization wherein the crystalline growth occurs fastest at regions that have been augmented with a metal catalyst and proceeds extremely slowly, practically zero, at regions which bear no metal catalyst. Accordingly, by use of the physical vapor deposition amorphous silicon precursor film in the process of the present invention, the metal induced crystallization process may take place at higher annealing temperatures and shorter annealing times without solid phase crystallization taking place.Type: GrantFiled: October 25, 2000Date of Patent: December 14, 2004Assignee: Sharp Laboratories of America, Inc.Inventors: Apostolos Voutsas, Yukihiko Nakata, Takeshi Hosoda
-
Patent number: 6818484Abstract: A method is provided to produce thin film transistors (TFTs) on polycrystalline films having a single predominant crystal orientation. A layer of amorphous silicon is deposited over a substrate to a thickness suitable for producing a desired crystal orientation. Lateral-seeded excimer laser annealing (LS-ELA) is used to crystallize the amorphous silicon to form a film with a preferred crystal orientation. A gate is formed overlying the polycrystalline film. The polycrystalline film is doped to produce source and drain regions.Type: GrantFiled: October 24, 2002Date of Patent: November 16, 2004Assignee: Sharp Laboratories of America, Inc.Inventor: Apostolos Voutsas
-
Patent number: 6809801Abstract: A 1:1 laser projection system and method are provided for laser irradiating a semiconductor film. The method comprises: exposing a mask to a beam of laser light; projecting laser light passed through the mask by a factor of one; exposing the area of a semiconductor film to the projected laser light having a first energy density; exposing an area of semiconductor film to a lamp light having a second energy density; and, summing the first and second energy densities to heat the area of film. When the semiconductor film is silicon, the film heating typically entails melting, and then, crystallizing the film. In some aspects of the method, the lamp is an excimer lamp having a wavelength of less than 550 nanometers (nm), and the laser is an excimer laser having a wavelength of less than 550 nm. In some aspects, the lamp is mounted to expose the bottom surface of the film including an area underlying the area being laser irradiated.Type: GrantFiled: March 11, 2002Date of Patent: October 26, 2004Assignee: Sharp Laboratories of America, Inc.Inventors: Apostolos Voutsas, John W. Hartzell
-
Patent number: 6789499Abstract: A method of physical vapor deposition includes selecting a target material; mixing at least two gases to form a sputtering gas mixture, wherein a first sputtering gas is helium and a second sputtering gas is taken from the gases consisting of neon, argon krypton, xenon and radon; forming a plasma in the sputtering gas mixture atmosphere to sputter atoms from the target material to the substrate thereby forming a layer of target material on the substrate; and annealing the substrate and the deposited layer thereon. An improved physical vapor deposition vacuum chamber includes a target held in a target holder, a substrate held in a substrate holder, a plasma arc generator, and heating rods. A sputtering gas feed system is provided for introducing a mixture of sputtering gases into the chamber; as is a vacuum mechanism comprising at least one turbomolecular pump for evacuating the chamber to a pressure of less than 16 mTorr during deposition.Type: GrantFiled: August 6, 2002Date of Patent: September 14, 2004Assignee: Sharp Laboratories of America, Inc.Inventors: Apostolos Voutsas, Yukihiko Nakata
-
Publication number: 20040140206Abstract: A method for fabricating silicon tiles and silicon tile targets has been provided, such as may be used in the sputter deposition of thin film transistor (TFT) silicon films. The method describes processes of cutting the tiles, beveling the tiles edges, etching the tiles to minimize residual damage caused by cutting the tiles, polishing the tiles to a specified flatness, and attaching the tiles to a backing plate. All these processes are performed with the aim of minimizing contamination and particle formations when the target is used for sputter deposition.Type: ApplicationFiled: December 30, 2003Publication date: July 22, 2004Applicant: Sharp Laboratories of America, Inc.Inventors: Apostolos Voutsas, John Hartzell
-
Publication number: 20040101998Abstract: A substrate and a method for fabricating variable quality substrate materials are provided. The method comprises: selecting a first mask having a first mask pattern; projecting a laser beam through the first mask to anneal a first area of semiconductor substrate; creating a first condition in the first area of the semiconductor film; selecting a second mask having a second mask pattern; projecting the laser beam through the second mask to anneal a second area of the semiconductor film; and, creating a second condition in the second area of the semiconductor film, different than the first condition. More specifically, when the substrate material is silicon, the first and second conditions concern the creation of crystalline material with a quantitative measure of lattice mismatch between adjacent crystal domains. For example, the lattice mismatch between adjacent crystal domains can be measured as a number of high-angle grain boundaries per area.Type: ApplicationFiled: November 10, 2003Publication date: May 27, 2004Applicant: Sharp Laboratories of America, Inc.Inventors: Apostolos Voutsas, Yasuhiro Mitiani, Mark A. Crowder
-
Patent number: 6733931Abstract: A system and method are provided for laser irradiating a semiconductor substrate using a multi-pattern mask. The method comprises: exposing a semiconductor substrate to laser light projected through a multi-pattern mask; advancing the mask and substrate in a first direction to sequentially expose adjacent areas of the substrate to each of the mask patterns in a first predetermined order; and, advancing the mask and substrate in a second direction, opposite the first direction, to sequentially expose adjacent areas of the substrate to each of the mask patterns in the first order. In one aspect, the method further comprises: forming a multi-pattern mask having a first plurality patterns aligned in the first order with respect to the first direction and a second plurality of patterns, corresponding to the first plurality of patterns, aligned in the first order with respect to the second direction.Type: GrantFiled: March 13, 2002Date of Patent: May 11, 2004Assignee: Sharp Laboratories of America, Inc.Inventors: Apostolos Voutsas, Mark A. Crowder, Yasuhiro Mitiani
-
Publication number: 20040067624Abstract: A method is provided for maintaining a planar surface as crystal grains are laterally grown in the fabrication of crystallized silicon films. The method comprises: forming a film of amorphous silicon with a surface and a plurality of areas; irradiating each adjacent areas of the silicon film with a first sequence of laser pulses; and, in response to the first sequence of laser pulses, controlling the planarization of the silicon film surface between adjacent areas of the silicon film as the crystal grains are laterally grown. By controlling the number of laser pulses in the sequence, the temporal separation between pulses, and the relative intensity of the pulses, the lateral growth length characteristics of the crystal grains can be-traded against the silicon film flatness. A silicon film formed by a pulsed laser sequence crystallization process is also provided.Type: ApplicationFiled: October 3, 2003Publication date: April 8, 2004Applicant: Sharp Labratories of America, Inc.Inventor: Apostolos Voutsas
-
Patent number: 6717178Abstract: A thin film transistor includes an active silicon layer deposited by physical vapor deposition (PVD), wherein a silicon precursor is doped with impurities prior to use as a target in the PVD chamber, wherein the precursor has a resistivity in the range of about 0.5 &OHgr;-cm<&rgr;s<60 &OHgr;-cm; and wherein the target includes plural, rectangular tiles wherein all individual tiles are larger than 8.5 inches square.Type: GrantFiled: August 13, 2002Date of Patent: April 6, 2004Assignee: Sharp Laboratories of America, Inc.Inventors: Yukihiko Nakata, Apostolos Voutsas, John Hartzell
-
Patent number: 6686978Abstract: A method is provided to produce liquid crystal displays (LCDs) on polycrystalline films having a single predominant crystal orientation. A layer of amorphous silicon is deposited over a substrate to a thickness suitable for producing a desired crystal orientation. Lateral-seeded excimer laser annealing (LS-ELA) is used to crystallize a region of the amorphous silicon to form a polycrystalline film with a preferred crystal orientation. In an embodiment of the method, the polycrystalline film is polished. A pixel region is formed over a portion of the substrate using either amorphous silicon or polycrystalline silicon. A circuit region is formed over the polycrystalline film.Type: GrantFiled: February 28, 2001Date of Patent: February 3, 2004Assignee: Sharp Laboratories of America, Inc.Inventor: Apostolos Voutsas
-
Patent number: 6673220Abstract: A method for fabricating silicon tiles and silicon tile targets has been provided, such as may be used in the sputter deposition of thin film transistor (TFT) silicon films. The method describes processes of cutting the tiles, beveling the tiles edges, etching the tiles to minimize residual damage caused by cutting the tiles, polishing the tiles to a specified flatness, and attaching the tiles to a backing plate. All these processes are performed with the aim of minimizing contamination and particle formations when the target is used for sputter deposition.Type: GrantFiled: May 21, 2001Date of Patent: January 6, 2004Assignee: Sharp Laboratories of America, Inc.Inventors: Apostolos Voutsas, John Hartzell