Patents by Inventor Aristotele Hadjichristos

Aristotele Hadjichristos has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140055212
    Abstract: A high power tunable capacitor is disclosed. In an exemplary embodiment, an apparatus includes a capacitor coupled to an input signal, a body contacted switch coupled to the capacitor, the body contacted switch coupled to a body bias signal, and a floating body switch coupled between the body contacted switch and a ground, the floating body switch configured to decouple the body bias signal from the ground.
    Type: Application
    Filed: August 23, 2012
    Publication date: February 27, 2014
    Applicant: QUALCOMM INCORPORATED
    Inventors: Minsik Ahn, Kyu Hwan An, Chang-Ho Lee, Aristotele Hadjichristos
  • Publication number: 20140043206
    Abstract: A multi-throw antenna switch with off-state capacitance reduction is disclosed. In an exemplary embodiment, an apparatus is provided that includes a plurality of first stage switches connected to an antenna, and a plurality of second stage switches connected to the plurality of first stage switches, each first stage switch connected in series to one or more second stage switches to form a plurality of switchable signal paths connected to the antenna.
    Type: Application
    Filed: August 9, 2012
    Publication date: February 13, 2014
    Applicant: QUALCOMM Incorporated
    Inventors: Minsik Ahn, Chang-Ho Lee, Aristotele Hadjichristos
  • Publication number: 20140043102
    Abstract: Techniques for generating bias voltages for a multi-cascode amplifier. In an aspect, a multi-cascode bias network is provided, each transistor in the bias network being a replica of a corresponding transistor in the multi-cascode amplifier, enabling accurate biasing of the transistors in the multi-cascode amplifier. In another aspect, a voltage supply for the multi-cascode amplifier is provided separately from a voltage supply for the replica bias network, to advantageously decouple variations in the amplifier voltage supply from the bias network voltage supply. In yet another aspect, the bias voltages of transistors in the multi-cascode amplifier may be configured by adjusting the impedance of resistive voltage dividers coupled to the transistor gate biases. As the gain of the amplifier depends on the bias voltages of the cascode amplifiers, the gain of the amplifier may be adjusted in this manner without introducing a variable gain element directly in the amplifier signal path.
    Type: Application
    Filed: August 8, 2012
    Publication date: February 13, 2014
    Applicant: QUALCOMM INCORPORATED
    Inventors: Wenjun Su, Chiewcharn Narathong, Guangming Yin, Aristotele Hadjichristos
  • Patent number: 8639205
    Abstract: An exemplary embodiment disclosed comprises a mixer having a plurality of input leads; a first degenerative impedance element coupled to a first input lead of the mixer; a second degenerative impedance element coupled to a second input lead of the mixer; and a local oscillator (LO) system comprising a plurality of duty cycle modes to generate a LO signal for the mixer, the local oscillator system operates in a first duty cycle based on a first gain state of the mixer, and in a second duty cycle based on a second gain state of the mixer.
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: January 28, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Junxiong Deng, Aristotele Hadjichristos, Aleksandar Tasic, Frederic Bossu
  • Patent number: 8633777
    Abstract: An integrated circuit is described. The integrated circuit includes an inductor that has a large empty area in the center of the inductor. The integrated circuit also includes additional circuitry. The additional circuitry is located within the large empty area in the center of the inductor. The additional circuitry may include a capacitor bank, transistors, electrostatic discharge (ESD) protection circuitry and other miscellaneous passive or active circuits.
    Type: Grant
    Filed: December 1, 2009
    Date of Patent: January 21, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Zhang Jin, Aristotele Hadjichristos, Ockgoo Lee, Hongyan Yan, Guy Klemens, Maulin P. Bhagat, Thomas Myers, Norman L. Frederick, Junxiong Deng, Aleksandar Tasic, Bhushan S. Asuri, Mohammad Farazian
  • Patent number: 8536950
    Abstract: Exemplary techniques for performing impedance matching are described. In an exemplary embodiment, the apparatus may include an amplifier (e.g., a power amplifier) coupled to first and second matching circuits. The first matching circuit may include multiple stages coupled to a first node and may provide input impedance matching for the amplifier. The second matching circuit may include multiple stages coupled to a second node and may provide output impedance matching for the amplifier. At least one switch may be coupled between the first and second nodes and may bypass or select the amplifier. The first and second nodes may have a common impedance. The apparatus may further include a second amplifier coupled in parallel with the amplifier and further to the matching circuits. The second matching circuit may include a first input stage coupled to the amplifier, a second input stage coupled to the second amplifier, and a second stage coupled to the two input stages via switches.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: September 17, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Babak Nejati, Yu Zhao, Nathan M Pletcher, Aristotele Hadjichristos, Puay Hoe See
  • Patent number: 8472890
    Abstract: A communication device includes a transmitter and a receiver. The receiver mixes a local oscillator (LO) signal with the received signal to downconvert the received signal to an intermediate frequency (IF). The LO path that feeds the LO signal to the downconverting mixer is controlled based on the transmit power of the transmitter. For high transmit power, the drive of the LO path is increased, thereby increasing the signal-to-noise ratio of the LO signal input into the mixer. For low transmit power levels, the drive to the LO path is decreased, reducing power consumption in the communication device. In this way, receiver path noise due to mixing of the LO phase noise with the self-generated transmitter signal is selectively controlled while incurring lower power consumption penalty. The communication device may be an access terminal configured for communication with a cellular radio network.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: June 25, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Wei Zhuo, Aristotele Hadjichristos, Tzu-wang Pan
  • Patent number: 8461921
    Abstract: An amplifier module with multiple operating modes is described. In an exemplary design, an apparatus includes a plurality of amplifiers. The apparatus may also include a plurality of switches, each switch coupled to an output of an associated amplifier in the plurality of amplifiers and configured to provide an amplified signal in a first mode and bypass the associated amplifier and provide an associated bypass signal in a second mode. Further, the apparatus may include an output circuit including a plurality of matching circuits, each matching circuit coupled to an associated amplifier in the plurality of amplifiers and an associated switch in the plurality of switches.
    Type: Grant
    Filed: September 6, 2011
    Date of Patent: June 11, 2013
    Assignee: QUALCOMM, Incorporated
    Inventors: Nathan M Pletcher, Aristotele Hadjichristos, Babak Nejati
  • Patent number: 8385854
    Abstract: A device including a gain control element coupled prior to or within a radio frequency (RF) power amplifier (PA) with an adaptive parametric PA protection circuit is described. In an exemplary embodiment, the device includes a gain control element coupled prior to a radio frequency power amplifier with a power stage with corresponding transistor breakdown threshold values, having an adaptive parametric PA protection circuit configured to receive at least one power stage drain-source voltage parameter value, at least one power stage drain-gate voltage parameter value, and at least one power stage drain-source current parameter value, and including an adaptive parametric PA protection circuit having a first section for processing the parameter values and a second section for generating a gain correction signal to adjust the gain control element with optimal power added efficiency (PAE) for the power stage within the corresponding transistor breakdown threshold values.
    Type: Grant
    Filed: May 21, 2009
    Date of Patent: February 26, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Aristotele Hadjichristos, Gurkanwal S. Sahota
  • Publication number: 20130043946
    Abstract: Multiple low noise amplifiers (LNAs) with combined outputs are disclosed. In an exemplary design, an apparatus includes a front-end module and an integrated circuit (IC). The front-end module includes a plurality of LNAs having outputs that are combined. The IC includes receive circuits coupled to the plurality of LNAs via a single interconnection. In an exemplary design, each of the plurality of LNAs may be enabled or disabled via a respective control signal for that LNA. The front-end module may also include receive filters coupled to the plurality of LNAs and a switchplexer coupled to the receive filters. The front-end module may further include at least one power amplifier, and the IC may further include transmit circuits coupled to the at least one power amplifier.
    Type: Application
    Filed: February 6, 2012
    Publication date: February 21, 2013
    Applicant: QUALCOMM INCORPORATED
    Inventors: Aristotele Hadjichristos, Gurkanwal Singh Sahota
  • Publication number: 20130003783
    Abstract: A global navigation satellite system receiver with filter bypass mode for improved sensitivity is disclosed. In an aspect, an apparatus is provided that includes a non-bypass signal path coupled to a receiver, the non-bypass signal path comprising a filter. The apparatus also includes a bypass signal path coupled to the receiver, the bypass signal path configure to bypass the filter, and a switch to couple an antenna to the non-bypass signal path during time intervals when signals transmitted by an unrelated local transmitter are transmitted with a signal power that exceeds a selected threshold, and to couple the antenna to the bypass signal path during other time intervals.
    Type: Application
    Filed: June 29, 2011
    Publication date: January 3, 2013
    Applicant: QUALCOMM Incorporation
    Inventors: Prasad Srinivasa Siva Gudem, Liang Zhao, I-Hsiang Lin, Zhijie Xiong, Bhushan Shanti Asuri, Aristotele Hadjichristos
  • Patent number: 8310277
    Abstract: A high linear fast peak detector having a variable bias current and/or a variable bias voltage is described. In an exemplary design, the peak detector includes a transistor, a variable current source, a capacitor, and a feedback circuit. The transistor receives the input signal and provides a source current. The variable current source receives the input signal, provides high bias current when the input signal is low, and provides low bias current when the input signal is high. The capacitor is charged by the source current when the input signal is high and is discharged by the high bias current when the input signal is low. The feedback circuit receives a detected signal from the capacitor and provides higher bias voltage for the transistor when the input signal is high, which results in higher source current from the transistor.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: November 13, 2012
    Assignee: QUALCOMM, Incorporated
    Inventors: Wenjun Su, Aristotele Hadjichristos, Marco Cassia, Chiewcharn Narathong
  • Patent number: 8160514
    Abstract: Exemplary embodiments of the disclosure are directed to down-converting an RF signal of a transmitter to baseband, filtering the down-converted signal, and generating a composite signal based on the filtered down-converted signal and a transmission based-band signal.
    Type: Grant
    Filed: July 25, 2008
    Date of Patent: April 17, 2012
    Assignee: QUALCOMM, Incorporated
    Inventors: Vladimir Aparin, Aristotele Hadjichristos, Marco Cassia
  • Patent number: 8150339
    Abstract: Switchable voltage level supplies for circuitry in a multi-mode communications chipset are disclosed. In an embodiment, a first voltage level is supplied to TX circuitry operating in a first mode having a first set of linearity and/or noise requirements. A second voltage level lower than the first voltage level is supplied to TX circuitry operating in a second mode having a second set of linearity and/or noise requirements looser than the first set of requirements. The first mode may be operation according to the GSM standard, and the second mode may be operation according to the W-CDMA standard.
    Type: Grant
    Filed: November 5, 2007
    Date of Patent: April 3, 2012
    Assignee: QUALCOMM, Incorporated
    Inventors: Marco Cassia, Aristotele Hadjichristos
  • Publication number: 20120075216
    Abstract: This disclosure provides systems, methods and apparatus for combining devices deposited on a first substrate, with integrated circuits formed on a second substrate such as a semiconducting substrate or a glass substrate. The first substrate may be a glass substrate. The first substrate may include conductive vias. A power combiner circuit may be deposited on a first side of the first substrate. The power combiner circuit may include passive devices deposited on at least the first side of the first substrate. The integrated circuit may include a power amplifier circuit disposed on and configured for electrical connection with the power combiner circuit, to form a power amplification system. The conductive vias may include thermal vias configured for conducting heat from the power amplification system and/or interconnect vias configured for electrical connection between the power amplification system and a conductor on a second side of the first substrate.
    Type: Application
    Filed: September 16, 2011
    Publication date: March 29, 2012
    Applicant: QUALCOMM MEMS TECHNOLOGIES, INC.
    Inventors: Justin Phelps Black, Ravindra V. Shenoy, Evgeni Petrovich Gousev, Aristotele Hadjichristos, Thomas Andrew Myers, Jonghae Kim, Mario Francisco Velez, Je-Hsiung Jeffrey Lan, Chi Shun Lo
  • Patent number: 8107910
    Abstract: In an exemplary embodiment, a circuit is disclosed comprising a plurality of inputs, each input to receive a radio frequency waveform from a plurality of differential input waveforms having different phases; and an inverter circuit to invert a waveform from the plurality of differential inputs waveforms to a substantially same phase as a non-inverted input waveform. The circuit further comprises a combiner node to combine the inverted and the non-inverted input waveforms into an output waveform.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: January 31, 2012
    Assignee: QUALCOMM, Incorporated
    Inventor: Aristotele Hadjichristos
  • Patent number: 8102205
    Abstract: An amplifier module with multiple operating modes is described. In an exemplary design, the amplifier module includes an amplifier (e.g., a power amplifier), a switch, and an output circuit. The amplifier receives and amplifies an input signal and provides an amplified signal in a first mode. The switch is coupled to the output of the amplifier and bypasses the amplifier and provides a bypass signal in a second mode. The output circuit is coupled to the amplifier and the switch. The output circuit performs output impedance matching for the amplifier in the first mode. The output circuit also (i) receives the amplified signal and provides an output signal in the first mode and (ii) receives the bypass signal and provides the output signal in the second mode. The amplifier is enabled in the first mode and disabled in the second mode.
    Type: Grant
    Filed: April 9, 2010
    Date of Patent: January 24, 2012
    Assignee: QUALCOMM, Incorporated
    Inventors: Nathan M Pletcher, Aristotele Hadjichristos, Babak Nejati
  • Publication number: 20110316637
    Abstract: An amplifier module with multiple operating modes is described. In an exemplary design, an apparatus includes a plurality of amplifiers. The apparatus may also include a plurality of switches, each switch coupled to an output of an associated amplifier in the plurality of amplifiers and configured to provide an amplified signal in a first mode and bypass the associated amplifier and provide an associated bypass signal in a second mode. Further, the apparatus may include an output circuit including a plurality of matching circuits, each matching circuit coupled to an associated amplifier in the plurality of amplifiers and an associated switch in the plurality of switches.
    Type: Application
    Filed: September 6, 2011
    Publication date: December 29, 2011
    Applicant: QUALCOMM INCORPORATED
    Inventors: Nathan M. Pletcher, Aristotele Hadjichristos, Babak Nejati
  • Publication number: 20110316636
    Abstract: A tunable inter-stage matching circuit that can improve performance is described. In an exemplary design, an apparatus comprises a driver amplifier and a power amplifier. The apparatus may further include an inter-stage matching circuit tunable in discrete steps for matching impedances between the driver amplifier and the power amplifier. The tunable inter-stage matching circuit may include a bank of capacitors, each capacitor of the bank coupled in series with a switch for coupling the capacitor to a ground voltage.
    Type: Application
    Filed: September 6, 2011
    Publication date: December 29, 2011
    Applicant: QUALCOMM INCORPORATED
    Inventors: Yu Zhao, Babak Nejati, Nathan M. Pletcher, Aristotele Hadjichristos
  • Patent number: 8072272
    Abstract: A tunable inter-stage matching circuit that can improve performance is described. In an exemplary design, an apparatus includes a first active circuit (e.g., a driver amplifier), a second active circuit (e.g., a power amplifier), and a tunable inter-stage matching circuit coupled between the first and second active circuits. The tunable inter-stage matching circuit includes a tunable capacitor that can be varied in discrete steps to adjust impedance matching between the first and second active circuits. In an exemplary design, the tunable capacitor includes (i) a plurality of capacitors coupled in parallel and (ii) a plurality of switches coupled to the plurality of capacitors, one switch for each capacitor. Each switch may be turned on to select an associated capacitor or turned off to unselect the associated capacitor. The tunable capacitor may further include a fixed capacitor coupled in parallel with the plurality of capacitors.
    Type: Grant
    Filed: March 1, 2010
    Date of Patent: December 6, 2011
    Assignee: QUALCOMM, Incorporated
    Inventors: Yu Zhao, Babak Nejati, Nathan M Pletcher, Aristotele Hadjichristos