Abstract: Semiconductor devices are described that include a via that extends only partially through the substrate. Through-substrate vias (TSV) furnish electrical interconnectivity to electronic components formed in the substrates. In implementations, the semiconductor devices are fabricated by first bonding a semiconductor wafer to a carrier wafer with an adhesive material. The semiconductor wafer includes an etch stop disposed within the wafer (e.g., between a first surface a second surface of the wafer). One or more vias are formed through the wafer. The vias extend from the second surface to the etch stop.

Abstract: A light sensor is described that includes a glass substrate having a diffuser formed therein and at least one color filter integrated on-chip (i.e., integrated on the die of the light sensor). In one or more implementations, the light sensor comprises a semiconductor device (e.g., a die) that includes a semiconductor substrate. At least one photodetector (e.g., photodiode, phototransistor, etc.) is formed in the substrate proximate to the surface of the substrate. The color filter is configured to filter light received by the light sensor to pass light in a limited spectrum of wavelengths (e.g., light having wavelengths between a first wavelength and a second wavelength) to the photodetector. A glass substrate is positioned over the substrate and includes a diffuser. The diffuser is configured to diffuse light incident on the diffuser and to pass the diffused light to the at least one color filter for further filtering.

Abstract: Semiconductor devices are described that have a through-substrate via formed therein. In one or more implementations, the semiconductor devices include a semiconductor wafer and an integrated circuit die bonded together with an adhesive material. The semiconductor wafer and the integrated circuit die include one or more integrated circuits formed therein. The integrated circuits are connected to one or more conductive layers deployed over the surfaces of the semiconductor wafer and an integrated circuit die. A via is formed through the semiconductor wafer and the patterned adhesive material so that an electrical interconnection can be formed between the integrated circuits formed in the semiconductor wafer and the integrated circuits formed in the integrated circuit die. The via includes a conductive material that furnishes the electrical interconnection between the semiconductor wafer and the integrated circuit die.

Abstract: Aspects of the disclosure pertain to a packaging structure configured for providing heterogeneous packaging of electronic components and a process for making same. The packaging structure includes a carrier substrate having a plurality of cavities formed therein. The packaging structure further includes a first die and a second die. The first die is at least substantially contained within a first cavity included in the plurality of cavities. The second die is at least substantially contained within a second cavity included in the plurality of cavities. The first die is fabricated via a first fabrication technology, and the second die is fabricated via a second fabrication technology, the second fabrication technology being different than the first fabrication technology. The packaging structure also includes electrical interconnect circuitry connected to (e.g., for electrically connecting) the first die, the second die and/or the carrier substrate.

Abstract: Optical devices are described that integrate multiple heterogeneous components in a single, compact package. In one or more implementations, the optical devices include a carrier substrate having a surface that includes two or more cavities formed therein. One or more optical component devices are disposed within the respective cavities in a predetermined arrangement. A cover is disposed on the surface of the carrier substrate so that the cover at least substantially encloses the optical component devices within their respective cavities. The cover, which may be glass, is configured to transmit light within the predetermined spectrum of wavelengths.

Abstract: Techniques are described to furnish an IR suppression filter, or any other interference based filter, that is formed on a transparent substrate to a light sensor. In one or more implementations, a light sensor includes a substrate having a surface. One or more photodetectors are formed in the substrate. The photodetectors are configured to detect light and provide a signal in response thereto. An IR suppression filter configured to block infrared light from reaching the surface is formed on a transparent substrate. The light sensor may also include a plurality of color pass filters disposed over the surface. The color pass filters are configured to filter visible light to pass light in a limited spectrum of wavelengths to the one or more photodetectors. A buffer layer is disposed over the surface and configured to encapsulate the plurality of color pass filters and adhesion layer.

Abstract: Techniques are described to furnish an IR suppression filter that is formed on a glass substrate to a light sensor. In one or more implementations, a light sensor includes a substrate having a surface. One or more photodetectors are formed in the substrate and configured to detect light and provide a signal in response thereto. An IR suppression filter configured to block infrared light from reaching the surface is formed on a glass substrate. The light sensor also includes a plurality of color pass filters disposed over the surface. The color pass filters are configured to filter visible light to pass light in a limited spectrum of wavelengths to the one or more photodetectors. A buffer layer is disposed over the surface and configured to encapsulate the plurality of color pass filters and adhesion layer. The light sensor further includes through-silicon vias to provide electrical interconnections between different conductive layers.

Abstract: Light sensor devices are described that have a glass substrate, which includes a lens to focus light over a wide variety of angles, bonded to the light sensor device. In one or more implementations, the light sensor devices include a substrate having a photodetector formed therein. The photodetector is capable of detecting light and providing a signal in response thereto. The sensors also include one or more color filters disposed over the photodetector. The color filters are configured to pass light in a limited spectrum of wavelengths to the photodetector. A glass substrate is disposed over the substrate and includes a lens that is configured to collimate light incident on the lens and to pass the collimated light to the color filter.

Abstract: Semiconductor devices are described that include a via that extends only partially through the substrate. Through-substrate vias (TSV) furnish electrical interconnectivity to electronic components formed in the substrates. In implementations, the semiconductor devices are fabricated by first bonding a semiconductor wafer to a carrier wafer with an adhesive material. The semiconductor wafer includes an etch stop disposed within the wafer (e.g., between a first surface a second surface of the wafer). One or more vias are formed through the wafer. The vias extend from the second surface to the etch stop.

Abstract: A light sensor is described that includes a glass substrate having a diffuser formed therein and at least one color filter integrated on-chip (i.e., integrated on the die of the light sensor). In one or more implementations, the light sensor comprises a semiconductor device (e.g., a die) that includes a semiconductor substrate. At least one photodetector (e.g., photodiode, phototransistor, etc.) is formed in the substrate proximate to the surface of the substrate. The color filter is configured to filter light received by the light sensor to pass light in a limited spectrum of wavelengths (e.g., light having wavelengths between a first wavelength and a second wavelength) to the photodetector. A glass substrate is positioned over the substrate and includes a diffuser. The diffuser is configured to diffuse light incident on the diffuser and to pass the diffused light to the at least one color filter for further filtering.

Abstract: Semiconductor devices are described that have a through-substrate via formed therein. In one or more implementations, the semiconductor devices include a top wafer and a bottom wafer bonded together with a patterned adhesive material. The top wafer and the bottom wafer include one or more integrated circuits formed therein. The integrated circuits are connected to one or more conductive layers deployed over the surfaces of the top and bottom wafers. A via is formed through the top wafer and the patterned adhesive material so that an electrical interconnection can be formed between the integrated circuits formed in the top wafer and the integrated circuits formed in the bottom wafer. The via includes a conductive material that furnishes the electrical interconnection between the top and bottom wafers.

Abstract: A wafer level package includes a wafer, a lead disposed of the wafer for connecting the wafer to an electrical circuit, and a core disposed of the lead. In some embodiments, the lead disposed of the wafer is a copper pillar, and the core is plated onto the copper pillar. In some embodiments, the core is polymer screen-plated onto the lead. In some embodiments, the core extends between at least approximately thirty-five micrometers (35 ?m) and fifty micrometers (50 ?m) from the lead. In some embodiments, the core covers between at least approximately one-third (?) and one-half (½) of the surface area of the lead. In some embodiments, the core comprises a stud-shape extending from the lead. In some embodiments, the core extends perpendicularly across the lead. In some embodiments, the core extends longitudinally along the lead. Further, a portion of the core can extend perpendicularly from a longitudinal core.

Abstract: A wafer-level packaged semiconductor device is described. In an implementation, the device includes one or more self-assembled resilient leads disposed on an integrated circuit chip. Each of the resilient leads are configured to move from a first position wherein the resilient lead is held adjacent to the chip and a second position wherein the resilient lead is extended away from the chip to interconnect the chip to a printed circuit board. A guard is provided to protect the resilient leads when the resilient leads are in the first position. One or more attachment bumps may also be furnished to facilitate attachment of the device to the printed circuit board.

Abstract: Wafer-level chip-scale package semiconductor devices are described that have bump assemblies configured to mitigate solder bump failures due to stresses, particularly stresses caused by CTE mismatch during thermal cycling tests, dynamic deformation during drop tests or cyclic bending tests, and so on. In an implementation, the wafer-level chip-scale package devices include an integrated circuit chip having two or more arrays of bump assemblies for mounting the device to a printed circuit board. At least one of the arrays includes bump assemblies that are configured to withstand higher levels of stress than the bump assemblies of the remaining arrays.

Abstract: A semiconductor package device that includes an integrated circuit device package having a storage circuitry is disclosed. In an implementation, the semiconductor package device includes a semiconductor substrate having a first surface and a second surface. The semiconductor substrate includes one or more integrated circuits formed proximal to (e.g., adjacent to, in, or on) the first surface. The semiconductor package device also includes an integrated circuit device disposed over the second surface, the integrated circuit device including storage circuitry for storing sensitive data. In one or more implementations, the semiconductor package device includes a through-substrate via that furnishes an electrical connection to the integrated circuit package. The semiconductor package device also includes an encapsulation structure disposed over the second surface and at least substantially encapsulates the integrated circuit device package.

Abstract: In a first aspect, a method of forming an epitaxial film on a substrate is provided. The method includes (a) providing a substrate; (b) exposing the substrate to a silicon source and a carbon source so as to form a carbon-containing silicon epitaxial film; (c) encapsulating the carbon-containing silicon epitaxial film with an encapsulating film; and (d) exposing the substrate to Cl2 so as to etch the encapsulating film. Numerous other aspects are provided.

Abstract: Semiconductor devices are described that include a via that extends only partially through the substrate. Through-substrate vias (TSV) furnish electrical interconnectivity to electronic components formed in the substrates. In implementations, the semiconductor devices are fabricated by first bonding a semiconductor wafer to a carrier wafer with an adhesive material. The semiconductor wafer includes an etch stop disposed within the wafer (e.g., between a first surface a second surface of the wafer). One or more vias are formed through the wafer. The vias extend from the second surface to the etch stop.

Abstract: Embodiments of the invention generally relate to methods for treating a silicon-containing material on a substrate surface and performing a chamber clean process. In one embodiment, a method includes positioning a substrate containing a silicon material having a contaminant thereon within a process chamber and exposing the substrate to an etching gas containing chlorine gas and a silicon source gas while removing the contaminant and maintaining a temperature of the substrate within a range from about 500° C. to less than about 800° C. during an etching process. The method further includes exposing the substrate to a deposition gas after the etching process during a deposition process and exposing the process chamber to a chamber clean gas containing chlorine gas and the silicon source gas after the deposition process during a chamber clean process. The chamber clean process limits the etching of quartz and metal surfaces within the process chamber.

Abstract: The present invention provides systems, devices and methods for fabricating miniature low-power light sensors. With the present invention, a light sensitive component, such as a diode, is fabricated on the front side of a silicon wafer. Connectivity from the front side of the wafer to the back side of the wafer is provided by a through silicon via. Solder bumps are then placed on the back side of the wafer to provide coupling to a printed circuit board. The techniques described in the present invention may also be applied to other types of semiconductor devices, such as light-emitting diodes, image sensors, pressure sensors, and flow sensors.

Abstract: Wafer-level package devices are described that include multiple die packaged into a single wafer-level package device. In an implementation, a wafer-level package device includes a semiconductor device having at least one electrical interconnection formed therein. At least one semiconductor package device is positioned over the first surface of the semiconductor device. The semiconductor package device includes one or more micro-solder bumps. The wafer-level package device further includes an encapsulation structure disposed over and supported by the semiconductor device for encapsulating the semiconductor package device(s). When the semiconductor package device is positioned over the semiconductor device, each micro-solder bump is connected to a respective electrical interconnection that is formed in the semiconductor device.