Patents by Inventor Arthur W. Zafiropoulo
Arthur W. Zafiropoulo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9613828Abstract: Laser annealing of a semiconductor wafers using a forming gas for localized control of ambient oxygen gas to reduce the amount of oxidization during laser annealing is disclosed. The forming gas includes hydrogen gas and an inert buffer gas such as nitrogen gas. The localized heating of the oxygen gas and the forming gas in the vicinity of the annealing location on the surface of the semiconductor wafer creates a localized region within which combustion of oxygen gas and hydrogen gas occurs to generate water vapor. This combustion reaction reduces the oxygen gas concentration within the localized region, thereby locally reducing the amount of ambient oxygen gas, which in turn reduces oxidation rate at the surface of the semiconductor wafer during the annealing process.Type: GrantFiled: May 18, 2015Date of Patent: April 4, 2017Assignee: Ultratech, Inc.Inventors: James McWhirter, Arthur W. Zafiropoulo
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Publication number: 20170062191Abstract: Systems and methods for coating particles using PE-ALD and a rotary reactor tube are disclosed. The reactor tube is part of a reactor tube assembly that can rotate and move axially so that it is operably disposed relative to a plasma-generating device. The plasma-generating device has an active state that generates a plasma from a precursor gas and an inactive state that passes the precursor gas without forming a plasma. The reactor tube resides in a chamber that has an open position for accessing the reactor tube and a closed position that supports a vacuum. An output end of the plasma-generating device resides immediately adjacent or within an input section of the reactor tube. This configuration avoids the need for an active portion of the plasma-generating device residing adjacent an outer surface of the reactor tube.Type: ApplicationFiled: August 23, 2016Publication date: March 2, 2017Applicant: Ultratech, Inc.Inventors: Arthur W. Zafiropoulo, Andrew M. Hawryluk
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Patent number: 9583337Abstract: A method of performing an oxygen radical enhanced atomic-layer deposition process on a surface of a substrate that resides within an interior of a reactor chamber is disclosed. The method includes forming an ozone plasma to generate oxygen radicals O*. The method also includes feeding the oxygen radicals and a precursor gas sequentially into the interior of the reactor chamber to form an oxide film on the substrate surface. A system for performing the oxygen radical enhanced atomic-layer deposition process is also disclosed.Type: GrantFiled: January 21, 2015Date of Patent: February 28, 2017Assignee: Ultratech, Inc.Inventor: Arthur W. Zafiropoulo
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Publication number: 20160343583Abstract: Laser annealing of a semiconductor wafers using a forming gas for localized control of ambient oxygen gas to reduce the amount of oxidization during laser annealing is disclosed. The forming gas includes hydrogen gas and an inert buffer gas such as nitrogen gas. The localized heating of the oxygen gas and the forming gas in the vicinity of the annealing location on the surface of the semiconductor wafer creates a localized region within which combustion of oxygen gas and hydrogen gas occurs to generate water vapor. This combustion reaction reduces the oxygen gas concentration within the localized region, thereby locally reducing the amount of ambient oxygen gas, which in turn reduces oxidation rate at the surface of the semiconductor wafer during the annealing process.Type: ApplicationFiled: May 18, 2015Publication date: November 24, 2016Applicant: ULTRATECH, INC.Inventors: James McWhirter, Arthur W. Zafiropoulo
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Publication number: 20160240440Abstract: Provided are systems and processes for forming a three-dimensional circuit on a substrate. A radiation source produces a beam that is directed at a substrate having an isolating layer interposed between circuit layers. The circuit layers communicate with each other via a seed region exhibiting a crystalline surface. At least one circuit layer has an initial microstructure that exhibits electronic properties unsuitable for forming circuit features therein. After being controllably heat treated, the initial microstructure of the circuit layer having unsuitable properties is transformed into one that exhibits electronic properties suitable for forming circuit feature therein. Also provided are three-dimensional circuit structures optionally formed by the inventive systems and/or processes.Type: ApplicationFiled: April 28, 2016Publication date: August 18, 2016Applicant: Ultratech, Inc.Inventors: Arthur W. Zafiropoulo, Yun Wang, Andrew M. Hawryluk
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Patent number: 9318319Abstract: A method of performing a radical-enhanced atomic-layer deposition process on a surface of a substrate that resides within an interior of a reactor chamber is disclosed. The method includes forming plasma from a gas mixture consisting of CF4 and O2, wherein the CF4 is present in a concentration in the range from 0.1 vol % to 10 vol %. The plasma formed from the gas mixture generates oxygen radicals O* faster than if there were no CF4 present in the gas mixture. The method also includes feeding the oxygen radicals and a precursor gas sequentially into the interior of the reactor chamber to form an oxide film on the surface of the substrate. A system for performing the radical-enhanced atomic-layer deposition process using the rapidly formed oxygen radicals is also disclosed.Type: GrantFiled: June 19, 2015Date of Patent: April 19, 2016Assignee: Ultratech, Inc.Inventors: Arthur W. Zafiropoulo, Mark J. Sowa
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Publication number: 20160064208Abstract: A method of performing a radical-enhanced atomic-layer deposition process on a surface of a substrate that resides within an interior of a reactor chamber is disclosed. The method includes forming plasma from a gas mixture consisting of CF4 and O2, wherein the CF4 is present in a concentration in the range from 0.1 vol % to 10 vol %. The plasma formed from the gas mixture generates oxygen radicals O* faster than if there were no CF4 present in the gas mixture. The method also includes feeding the oxygen radicals and a precursor gas sequentially into the interior of the reactor chamber to form an oxide film on the surface of the substrate. A system for performing the radical-enhanced atomic-layer deposition process using the rapidly formed oxygen radicals is also disclosed.Type: ApplicationFiled: June 19, 2015Publication date: March 3, 2016Applicant: ULTRATECH, INC.Inventors: Arthur W. Zafiropoulo, Mark J. Sowa
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Patent number: 9266437Abstract: A betavoltaic power source for transportation devices and applications is disclosed, wherein the device having a stacked configuration of isotope layers and energy conversion layers. The isotope layers have a half-life of between about 0.5 years and about 5 years and generate radiation with energy in the range from about 15 keV to about 200 keV. The betavoltaic power source is configured to provide sufficient power to operate the transportation device over its useful lifetime.Type: GrantFiled: July 2, 2013Date of Patent: February 23, 2016Assignee: Ultratech, Inc.Inventors: Arthur W. Zafiropoulo, Andrew M. Hawryluk
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Publication number: 20150279665Abstract: A method of performing an oxygen radical enhanced atomic-layer deposition process on a surface of a substrate that resides within an interior of a reactor chamber is disclosed. The method includes forming an ozone plasma to generate oxygen radicals O*. The method also includes feeding the oxygen radicals and a precursor gas sequentially into the interior of the reactor chamber to form an oxide film on the substrate surface. A system for performing the oxygen radical enhanced atomic-layer deposition process is also disclosed.Type: ApplicationFiled: January 21, 2015Publication date: October 1, 2015Applicant: ULTRATECH, INC.Inventor: Arthur W. Zafiropoulo
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Patent number: 8986562Abstract: Methods of laser processing photoresist in a gaseous environment to improve at least one of etch resistance and line-edge roughness are disclosed. The methods include sequentially introducing first and second molecular gases to the photoresist surface and performing respective first and second laser scanning of the surface for each molecular gas. The first molecular gas can be trimethyl aluminum, titanium tetrachloride or diethyl zinc, and the second molecular gas comprises water vapor. Short dwell times prevent the photoresist from flowing while serving to speed up the photoresist enhancement process.Type: GrantFiled: August 7, 2013Date of Patent: March 24, 2015Assignee: Ultratech, Inc.Inventors: Arthur W. Zafiropoulo, Andrew M. Hawryluk
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Publication number: 20150041431Abstract: Methods of laser processing photoresist in a gaseous environment to improve at least one of etch resistance and line-edge roughness are disclosed. The methods include sequentially introducing first and second molecular gases to the photoresist surface and performing respective first and second laser scanning of the surface for each molecular gas. The first molecular gas can be trimethyl aluminum, titanium tetrachloride or diethyl zinc, and the second molecular gas comprises water vapor. Short dwell times prevent the photoresist from flowing while serving to speed up the photoresist enhancement process.Type: ApplicationFiled: August 7, 2013Publication date: February 12, 2015Applicant: Ultratech, Inc.Inventors: Arthur W. Zafiropoulo, Andrew M. Hawryluk
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Patent number: 8872408Abstract: A betavoltaic power source for mobile devices and mobile applications includes a stacked configuration of isotope layers and energy conversion layers. The isotope layers have a half-life of between about 0.5 years and about 5 years and generate radiation with energy in the range from about 15 keV to about 200 keV. The betavoltaic power source is configured to provide sufficient power to operate the mobile device over its useful lifetime.Type: GrantFiled: April 15, 2013Date of Patent: October 28, 2014Assignee: Ultratech, Inc.Inventors: Arthur W. Zafiropoulo, Andrew M. Hawryluk
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Publication number: 20140238958Abstract: Systems and methods for processing a material layer supported by a substrate using a light-source assembly that includes LED light sources each formed from an array of LEDs. The material layer is capable of undergoing a photo-process having a temperature-dependent reaction rate. Some of the LEDs emit light of a first wavelength that initiate the photo-process while some of the LEDs emit light of a second wavelength that heats the substrate. The heat from the substrate then heats the material layer, which increases the temperature-dependent reaction rate of the photo-process.Type: ApplicationFiled: February 28, 2013Publication date: August 28, 2014Applicant: Ultratech, Inc.Inventors: Arthur W. Zafiropoulo, Andrew M. Hawryluk
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Patent number: 8796151Abstract: Systems for and methods of laser-enhanced plasma processing of semiconductor materials are disclosed. The method includes supporting a semiconductor material in a processing chamber interior and subjecting the semiconductor material to a plasma process. The method also includes simultaneously heating the wafer surface with a laser beam through a window in the processing chamber to increase the reaction rate of the plasma process. Other methods include performing laser heating of the semiconductor material before or after the plasma process but while the semiconductor material resides in the same chamber interior.Type: GrantFiled: April 4, 2012Date of Patent: August 5, 2014Assignee: Ultratech, Inc.Inventors: Andrew M. Hawryluk, Arthur W. Zafiropoulo
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Publication number: 20140021826Abstract: A betavoltaic power source for transportation devices and applications is disclosed, wherein the device having a stacked configuration of isotope layers and energy conversion layers. The isotope layers have a half-life of between about 0.5 years and about 5 years and generate radiation with energy in the range from about 15 keV to about 200 keV. The betavoltaic power source is configured to provide sufficient power to operate the transportation device over its useful lifetime.Type: ApplicationFiled: July 2, 2013Publication date: January 23, 2014Inventors: Arthur W. Zafiropoulo, Andrew M. Hawryluk
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Publication number: 20130278109Abstract: A betavoltaic power source for mobile devices and mobile applications includes a stacked configuration of isotope layers and energy conversion layers. The isotope layers have a half-life of between about 0.5 years and about 5 years and generate radiation with energy in the range from about 15 keV to about 200 keV. The betavoltaic power source is configured to provide sufficient power to operate the mobile device over its useful lifetime.Type: ApplicationFiled: April 15, 2013Publication date: October 24, 2013Applicant: Ultratech, Inc.Inventors: Arthur W. Zafiropoulo, Andrew M. Hawryluk
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Publication number: 20130267096Abstract: Systems for and methods of laser-enhanced plasma processing of semiconductor materials are disclosed. The method includes supporting a semiconductor material in a processing chamber interior and subjecting the semiconductor material to a plasma process. The method also includes simultaneously heating the wafer surface with a laser beam through a window in the processing chamber to increase the reaction rate of the plasma process. Other methods include performing laser heating of the semiconductor material before or after the plasma process but while the semiconductor material resides in the same chamber interior.Type: ApplicationFiled: April 4, 2012Publication date: October 10, 2013Inventors: Andrew M. Hawryluk, Arthur W. Zafiropoulo
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Patent number: 8501638Abstract: Laser annealing scanning methods that result in reduced annealing non-uniformities in semiconductor device structures under fabrication are disclosed. The methods include defining a length of an annealing laser beam such that the tails of the laser beam resided only within scribe lines that separate the semiconductor device structures. The annealing laser beam tails from adjacent scan path segments can overlap or not overlap within the scribe lines. The cross-scan length of the annealing laser beam can be selected to simultaneously scan more than one semiconductor device structure, as long as annealing laser beam is configured such that the tails do not fall within a semiconductor device structure.Type: GrantFiled: April 27, 2012Date of Patent: August 6, 2013Assignee: Ultratech, Inc.Inventor: Arthur W. Zafiropoulo
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Publication number: 20120111838Abstract: Provided are apparatuses and method for the thermal processing of a substrate surface, e.g., controlled laser thermal annealing (LTA) of substrates. The invention typically involves irradiating the substrate surface with first and second images to process regions of the substrate surface at a substantially uniform peak processing temperature along a scan path. A first image may serve to effect spike annealing of the substrates while another may be used to provide auxiliary heat treatment to the substrates before and/or after the spike annealing. Control over the temperature profile of the prespike and/or postspike may also reduce stresses and strains generated in the wafers. Also provided are microelectronic devices formed using the inventive apparatuses and methods.Type: ApplicationFiled: January 10, 2012Publication date: May 10, 2012Applicant: Ultratech, Inc.Inventors: Arthur W. Zafiropoulo, Andrew M. Hawryluk, James T. McWhirter, Serguei G. Anikitchev
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Publication number: 20110298093Abstract: Provided are apparatuses and method for the thermal processing of a substrate surface, e.g., controlled laser thermal annealing (LTA) of substrates. The invention typically involves irradiating the substrate surface with first and second images to process regions of the substrate surface at a substantially uniform peak processing temperature along a scan path. A first image may serve to effect spike annealing of the substrates while another may be used to provide auxiliary heat treatment to the substrates before and/or after the spike annealing. Control over the temperature profile of the prespike and/or postspike may also reduce stresses and strains generated in the wafers. Also provided are microelectronic devices formed using the inventive apparatuses and methods.Type: ApplicationFiled: August 15, 2011Publication date: December 8, 2011Applicant: ULTRATECH, INC.Inventors: Arthur W. Zafiropoulo, Andrew M. Hawryluk, James T. McWhirter, Serguei G. Anikitchev