Patents by Inventor Arvind Kamath
Arvind Kamath has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240128498Abstract: A solid-state battery cell, a solid-state battery, and methods of making the same are disclosed. The solid-state battery cell includes a cathode current collector, a cathode on the cathode current collector, a low-impedance interface film on the cathode, a solid-state electrolyte on or over the low-impedance interface film, a lithiophilic layer on or over the solid-state electrolyte, and an anode current collector on or over the lithiophilic layer. The low-impedance interface film may include an oxide, a nitride or an oxynitride of lithium and a metal selected from aluminum, silicon and titanium, carbon, a metal oxide, fluoride, oxyfluoride or phosphate, or an alkali metal borate, and may have a thickness of 5-100 ?, for example. The lithiophilic layer may be or include a metal oxide, silicate, aluminate or fluoride, or an elemental metal or metalloid, and may have a thickness of 5 ? to 1 ?m, for example.Type: ApplicationFiled: May 9, 2023Publication date: April 18, 2024Applicant: Ensurge Micropower ASAInventors: Arvind KAMATH, Shahid PIRZADA, Zhongchun WANG, Hui YANG
-
Publication number: 20240114651Abstract: Cooling systems having a conduit and a heat transfer device for transferring heat from an electronic component are disclosed. According to an aspect, a cooling system includes a conduit configured to be in conductive heat transfer interface with an electronic component. The conduit is configured to transfer a first portion of heat from the electronic component to a flow of a cooling liquid. The heat transfer device is also configured to be in conductive heat transfer interface with the electronic component, and to transfer a second portion of heat from the electronic component. The cooling system includes a heat collector manifold configured to receive the flow of the cooling liquid with the first portion of heat from the conduit, to receive the second portion of heat via conductive heat transfer from the heat transfer device, and to transfer the second portion of heat to the flow of the cooling liquid.Type: ApplicationFiled: September 30, 2022Publication date: April 4, 2024Inventors: Jeffrey Holland, Arvind Modekurti, Vinod Kamath
-
Publication number: 20240114650Abstract: Targeted cooling in a liquid cooling system including detecting, for a node cooled by the liquid cooling system, a condition indicating increased heating, wherein the liquid cooling system includes a primary pump and a node-specific pump positioned in a loop of the liquid cooling system between the primary pump and the node; and responsive to detection of the condition, increasing cooling to the node by increasing liquid flow rate at the node-specific pump positioned in the loop of the liquid cooling system between the primary pump and the node, thereby achieving a higher temperature differential between an inlet and an outlet line and increased waste heat recovery.Type: ApplicationFiled: September 30, 2022Publication date: April 4, 2024Inventors: ARVIND MODEKURTI, VINOD KAMATH, JEFFREY S. HOLLAND
-
Publication number: 20240114652Abstract: Cooling systems having cooling and augmentation loops for electronic components and related methods are disclosed. According to an aspect, a cooling system for an electronic component includes a cooling loop in thermal transfer interface with a first electronic component. The cooling loop is configured to contain a first flow of a cooling liquid between an inlet and an outlet. The cooling system also includes at least one augmentation loop configured to contain a second flow of the cooling liquid and alternately engage and disengage with respect to the cooling loop, such that engaging the augmentation loop to the cooling loop converts a series flow pattern with the first flow of the cooling liquid into a parallel flow pattern of a portion of the first flow of the cooling liquid with the second flow of the cooling liquid, without disconnection of the cooling loop from the inlet and outlet.Type: ApplicationFiled: September 30, 2022Publication date: April 4, 2024Inventors: Vinod KAMATH, Jeffrey S. HOLLAND, Arvind MODEKURTI
-
Publication number: 20240113341Abstract: A cylindrical solid-state battery and methods of making the same are disclosed. The battery includes a solid-state battery cell wound, wrapped or rolled around a core or itself, first and second terminals on opposite ends of the battery, and packaging between the first and second terminals, sealing the cell therein. The cell comprises a cathode current collector (CCC), a cathode on the CCC, a solid-state electrolyte on the cathode, an anode current collector (ACC) on the electrolyte, an insulation film on the ACC with an opening therein exposing the ACC, and a conductive redistribution layer in the opening and on the insulation film and a first sidewall of the cell. One of the terminals is electrically connected to the ACC through the redistribution layer, and the other terminal is electrically connected to the cathode or CCC on the opposite end of the battery.Type: ApplicationFiled: September 15, 2023Publication date: April 4, 2024Applicant: Ensurge Micropower ASAInventors: RICHARD VAN DER LINDE, Arvind KAMATH, Khanh TRAN, Yasumasa MORITA, Zhongchun WANG, Mihalis MICHAEL
-
Multilayer solid-state electrolyte, battery cells including the same, and methods of making the same
Patent number: 11916192Abstract: A multilayer solid-state electrolyte, solid-state battery cells including the same, and methods of making the electrolyte and the battery cells are disclosed. The multi-layer solid-state electrolyte includes a solid bulk electrolyte layer comprising carbon-doped lithium phosphorus oxynitride (LiPON) or WO3+x (where 0?x?1), and a solid anode interface layer comprising LiPON or a metal oxide that forms a stable complex oxide with lithium oxide and conducts lithium ions when lithiated. The anode interface layer has a thickness less than that of the bulk electrolyte layer. The method of making the multi-layer solid-state electrolyte includes depositing one of the solid bulk electrolyte layer and the solid anode interface layer on an active layer of a battery cell, then depositing the other layer on the one layer. As for the solid-state electrolyte, the anode interface layer has a thickness less than that of the bulk electrolyte layer.Type: GrantFiled: February 25, 2021Date of Patent: February 27, 2024Assignee: Ensurge Micropower ASAInventors: Zhongchun Wang, Arvind Kamath -
Publication number: 20230420731Abstract: A solid-state battery and methods of making the same are disclosed. The battery includes a plurality of cells and first and second terminals on opposite sides/edges of the battery. Each cell includes a cathode current collector (CCC), a cathode thereon, a solid-state electrolyte, an anode current collector (ACC), a barrier/insulation film, a via/opening in the barrier/insulation film exposing the ACC, and a conductive redistribution layer on the ACC in the via/opening, on the barrier/insulation film, and on a first sidewall of each cell. The barrier/insulation film encapsulates the CCC, the cathode, the solid-state electrolyte and the ACC. The first sidewall of each cell is on one of the sides/edges of the battery. One terminal is electrically connected to each ACC through the redistribution layer, and the other is electrically connected to each cathode or CCC.Type: ApplicationFiled: May 18, 2023Publication date: December 28, 2023Applicant: Ensurge Micropower ASAInventors: Khanh TRAN, Arvind KAMATH, Richard VAN DER LINDE, Yasumasa MORITA, Zhongchun WANG, Mihalis MICHAEL
-
Publication number: 20230378606Abstract: A solid-state battery and methods of making the same are disclosed. The battery includes a plurality of cells and first and second terminals on opposite sides/edges of the battery. Each cell includes a cathode current collector (CCC), a cathode thereon, a solid-state electrolyte, an anode current collector (ACC), a moat in the cathode and the electrolyte and around the ACC, a barrier/insulation film, a via/opening in the barrier/insulation film exposing the ACC, and a conductive redistribution layer in the via/opening, in the moat, on the barrier/insulation film, and on a first sidewall of each cell. The barrier/insulation film encapsulates the CCC, the cathode, the solid-state electrolyte and the ACC. One terminal is electrically connected to each ACC through the redistribution layer, and the other is electrically connected to each cathode or CCC.Type: ApplicationFiled: May 18, 2023Publication date: November 23, 2023Applicant: Ensurge Micropower ASAInventors: Khanh TRAN, Mihalis MICHAEL, Yasumasa MORITA, Shahid PIRZADA, Richard van der LINDE, Arvind KAMATH
-
Publication number: 20230352781Abstract: The present disclosure pertains to a battery and a method of making the same. The battery includes first and second metal substrates, a first solid-state and/or thin-film battery cell on the first metal substrate, a second solid-state and/or thin-film battery cell on the second metal substrate, and a hermetic seal in a peripheral region of the first and second metal substrates. The first and second battery cells are between the first and second metal substrates, and face each other. The method includes respectively forming first and second solid-state and/or thin-film battery cells on first and second metal substrates, placing the second battery cell on the first battery cell so that the first and second battery cells are between the first and second metal substrates, and hermetically sealing the first and second battery cells in a peripheral region of the first and second metal substrates.Type: ApplicationFiled: June 25, 2023Publication date: November 2, 2023Applicant: Ensurge Micropower ASAInventors: RICHARD VAN DER LINDE, Aditi CHANDRA, Mao ITO, Alex YAN, Arvind KAMATH, Shoba RAO, Jonathon Y Simmons
-
Patent number: 11735791Abstract: The present disclosure pertains to a battery and a method of making the same. The battery includes first and second metal substrates, a first solid-state and/or thin-film battery cell on the first metal substrate, a second solid-state and/or thin-film battery cell on the second metal substrate, and a hermetic seal in a peripheral region of the first and second metal substrates. The first and second battery cells are between the first and second metal substrates, and face each other. The method includes respectively forming first and second solid-state and/or thin-film battery cells on first and second metal substrates, placing the second battery cell on the first battery cell so that the first and second battery cells are between the first and second metal substrates, and hermetically sealing the first and second battery cells in a peripheral region of the first and second metal substrates.Type: GrantFiled: February 25, 2021Date of Patent: August 22, 2023Assignee: Ensurge Micropower ASAInventors: Richard Van Der Linde, Aditi Chandra, Mao Ito, Alex Yan, Arvind Kamath, Shoba Rao, Jonathon Y Simmons
-
Publication number: 20210320323Abstract: A solid-state battery and a method of making the same are disclosed. The battery includes a base frame or support, first and second exterior contacts on the base frame/support, stacked solid-state battery unit cells, first and second electrical connections, and encapsulation in contact with the base frame/support and covering the solid-state battery unit cells and the electrical connections. Each stacked solid-state battery unit cell is on a metal substrate and has exposed cathode and anode current collectors. The electrical connections respectively electrically connect the exposed cathode and anode current collectors to the first and second exterior contacts. The method includes forming the stacked solid-state battery unit cells on the base frame/support, forming the exterior contacts on the base frame/support, electrically connecting the exposed cathode and anode current collectors to the respective exterior contacts, and encapsulating the solid-state battery unit cells and the electrical connections.Type: ApplicationFiled: February 25, 2021Publication date: October 14, 2021Inventors: Aditi CHANDRA, Richard VAN DER LINDE, Paul BUTLER, Mao ITO, Jon SIMMONS, Miki TRIFUNOVIC, Alex YAN, Arvind KAMATH, Shoba RAO
-
Publication number: 20210320355Abstract: The present disclosure pertains to a battery and a method of making the same. The battery includes first and second metal substrates, a first solid-state and/or thin-film battery cell on the first metal substrate, a second solid-state and/or thin-film battery cell on the second metal substrate, and a hermetic seal in a peripheral region of the first and second metal substrates. The first and second battery cells are between the first and second metal substrates, and face each other. The method includes respectively forming first and second solid-state and/or thin-film battery cells on first and second metal substrates, placing the second battery cell on the first battery cell so that the first and second battery cells are between the first and second metal substrates, and hermetically sealing the first and second battery cells in a peripheral region of the first and second metal substrates.Type: ApplicationFiled: February 25, 2021Publication date: October 14, 2021Inventors: Richard VAN DER LINDE, Aditi CHANDRA, Mao ITO, Alex YAN, Arvind KAMATH, Shoba RAO, Jon SIMMONS
-
MULTILAYER SOLID-STATE ELECTROLYTE, BATTERY CELLS INCLUDING THE SAME, AND METHODS OF MAKING THE SAME
Publication number: 20210320324Abstract: A multilayer solid-state electrolyte, solid-state battery cells including the same, and methods of making the electrolyte and the battery cells are disclosed. The multi-layer solid-state electrolyte includes a solid bulk electrolyte layer comprising carbon-doped lithium phosphorus oxynitride (LiPON) or WO3+x (where 0?x?1), and a solid anode interface layer comprising LiPON or a metal oxide that forms a stable complex oxide with lithium oxide and conducts lithium ions when lithiated. The anode interface layer has a thickness less than that of the bulk electrolyte layer. The method of making the multi-layer solid-state electrolyte includes depositing one of the solid bulk electrolyte layer and the solid anode interface layer on an active layer of a battery cell, then depositing the other layer on the one layer. As for the solid-state electrolyte, the anode interface layer has a thickness less than that of the bulk electrolyte layer.Type: ApplicationFiled: February 25, 2021Publication date: October 14, 2021Inventors: Zhongchun WANG, Arvind KAMATH -
Publication number: 20210074653Abstract: Embodiments of the disclosure pertain to a multi-layer barrier for a flexible substrate supporting electronic and/or microelectromechanical system (MEMS) devices. Apparatuses including a substrate, a first metal nitride layer, a first oxide layer on or over the first metal nitride layer, a second metal nitride layer and a second oxide layer on or over the first oxide layer, and a device layer on or over the first oxide layer or both the first and second oxide layers are disclosed. When the device layer is on or over the first oxide layer, the second metal nitride layer is on or over the device layer, and the second oxide layer is on or over the on or over the second metal nitride layer. When the device layer is on or over both the first and second oxide layers, the second metal nitride layer is on or over the second oxide layer. A method of making the same is also disclosed.Type: ApplicationFiled: September 3, 2020Publication date: March 11, 2021Applicant: Thin Film Electronics ASAInventors: Miki TRIFUNOVIC, Aditi CHANDRA, Robert FULLER, Raymond VASS, Patricia BECK, Mao ITO, Arvind KAMATH
-
Patent number: 10826158Abstract: A wireless communication device having an integrated antenna, and methods for making and using the same are disclosed. The device generally includes (a) a substrate; (b) an integrated circuit (IC) comprising a plurality of printed and/or thin film layers and/or structures on the substrate, (c) a dielectric or insulator layer in at least one area of the substrate other than the IC; and (d) an antenna on the dielectric or insulator layer, comprising one or more metal traces. The plurality of printed and/or thin film layers and/or structures include an uppermost layer of metal. The antenna has (i) an inner terminal continuous with the uppermost layer of metal or connected to the uppermost layer of metal through one or more contacts, and (ii) an outer terminal connected to the uppermost layer of metal through one or more contacts and optionally a metal bridge or strap.Type: GrantFiled: February 27, 2019Date of Patent: November 3, 2020Assignee: Thin Film Electronics ASAInventors: Somnath Mukherjee, Aditi Chandra, Mao Ito, Arvind Kamath, Scott Bruner, Sambhu Kundu, Anand Deshpande
-
Publication number: 20200273719Abstract: A method of attaching one or more active devices on one or more substrates to a metal carrier by “hot stamping” is disclosed. The method includes contacting the active device(s) on the substrate(s) with the metal carrier, and applying pressure to and heating the active device(s) on the substrate(s) and the metal carrier sufficiently to affix or attach the active device(s) on the substrate(s) to the metal carrier. The active device(s) may include an integrated circuit. The substrate(s) may include a metal substrate on the backside of the active device and a protective/carrier film on the frontside of the active device. The protective/carrier film may be or include an organic polymer. The metal carrier may be or include a metal foil. Various examples of the method further include thinning the metal substrate, dicing the active device(s) and a continuous substrate, and/or separating the active devices.Type: ApplicationFiled: February 26, 2020Publication date: August 27, 2020Applicant: Thin Film Electronics ASAInventors: Miki TRIFUNOVIC, Aditi CHANDRA, Anand DESHPANDE, Arvind KAMATH
-
Publication number: 20190267698Abstract: A wireless communication device having an integrated antenna, and methods for making and using the same are disclosed. The device generally includes (a) a substrate; (b) an integrated circuit (IC) comprising a plurality of printed and/or thin film layers and/or structures on the substrate, (c) a dielectric or insulator layer in at least one area of the substrate other than the IC; and (d) an antenna on the dielectric or insulator layer, comprising one or more metal traces. The plurality of printed and/or thin film layers and/or structures include an uppermost layer of metal.Type: ApplicationFiled: February 27, 2019Publication date: August 29, 2019Applicant: Thin Film Electronics ASAInventors: Somnath MUKHERJEE, Aditi CHANDRA, Mao ITO, Arvind KAMATH, Scott BRUNER, Sambhu KUNDU, Anand DESHPANDE
-
Patent number: 10332686Abstract: High precision capacitors and methods for forming the same utilizing a precise and highly conformal deposition process for depositing an insulating layer on substrates of various roughness and composition. The method generally comprises the steps of depositing a first insulating layer on a metal substrate by atomic layer deposition (ALD); (b) forming a first capacitor electrode on the first insulating layer; and (c) forming a second insulating layer on the first insulating layer and on or adjacent to the first capacitor electrode. Embodiments provide an improved deposition process that produces a highly conformal insulating layer on a wide range of substrates, and thereby, an improved capacitor.Type: GrantFiled: December 20, 2016Date of Patent: June 25, 2019Assignee: Thin Film Electronics ASAInventors: Arvind Kamath, Criswell Choi, Patrick Smith, Erik Scher, Jiang Li
-
Low-Temperature Dopant Activation Process Using a Cap Layer, and MOS Devices Including the Cap Layer
Publication number: 20190013203Abstract: A method of making a MOS device, a MOS device containing an aluminum nitride layer, and a CMOS circuit are disclosed. The method includes depositing an aluminum nitride layer on a structure including a silicon layer, depositing a dopant ink on the structure, and diffusing the dopant through the aluminum nitride layer into the silicon layer. The structure also includes a gate oxide layer on the silicon layer and a gate on the gate oxide layer. The dopant ink includes a dopant and a solvent. The MOS device includes a silicon layer, a gate oxide layer on the silicon layer, a gate on the gate oxide layer, and an aluminum nitride layer on the gate. The silicon layer includes a dopant on opposite sides of the gate.Type: ApplicationFiled: July 9, 2018Publication date: January 10, 2019Inventors: Raghav SREENIVASAN, Aditi CHANDRA, Arvind KAMATH -
Publication number: 20180205135Abstract: A wireless communication device and methods of manufacturing and using the same are disclosed. The wireless communication device includes a substrate with an antenna and/or inductor thereon, a patterned ferrite layer overlapping the antenna and/or inductor, and a capacitor electrically connected to the antenna and/or inductor. The wireless communication device may further include an integrated circuit including a receiver configured to convert a first wireless signal to an electric signal and a transmitter configured to generate a second wireless signal, the antenna being configured to receive the first wireless signal and transmit or broadcast the second wireless signal. The patterned ferrite layer advantageously mitigates the deleterious effect of metal objects in proximity to a reader and/or transponder magnetically coupled to the antenna.Type: ApplicationFiled: March 9, 2018Publication date: July 19, 2018Applicant: Thin Film Electronics ASAInventors: Mao TAKASHIMA, Aditi CHANDRA, Somnath MUKHERJEE, Gloria WONG, Khanh VAN TU, Joey LI, Anton POPIOLEK, Arvind KAMATH