Patents by Inventor Ashish Pandya

Ashish Pandya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9141557
    Abstract: A dynamic random access memory (DRAM) comprising a programmable intelligent search memory (PRISM) for regular expression search using non-deterministic finite state automaton and further comprising a cryptography processing engine for performing encryption and decryption, said PRISM and cryptography processing engines creating a secure DRAM for use in a system.
    Type: Grant
    Filed: June 12, 2014
    Date of Patent: September 22, 2015
    Inventor: Ashish A. Pandya
  • Patent number: 9129043
    Abstract: Disclosed is a network computer system which may comprise a hardware processor which may comprise a programmable intelligent search memory for content search. The programmable intelligent search memory may perform regular expression based search. The programmable intelligent search memory may use at least one regular expression. The regular expression may be converted into at least one non-deterministic finite state automata (NFA) representing the functionality of the regular expression.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: September 8, 2015
    Inventor: Ashish A. Pandya
  • Publication number: 20150222706
    Abstract: An architecture provides capabilities to transport and process Internet Protocol (IP) packets from Layer 2 through transport protocol layer and may also provide packet inspection through Layer 7. A set of engines may perform pass-through packet classification, policy processing and/or security processing enabling packet streaming through the architecture at nearly the full line rate. A scheduler schedules packets to packet processors for processing. An internal memory or local session database cache stores a session information database for a certain number of active sessions. The session information that is not in the internal memory is stored and retrieved to/from an additional memory. An application running on an initiator or target can in certain instantiations register a region of memory, which is made available to its peer(s) for access directly without substantial host intervention through RDMA data transfer.
    Type: Application
    Filed: March 2, 2015
    Publication date: August 6, 2015
    Inventor: Ashish A. Pandya
  • Publication number: 20150065670
    Abstract: Asymmetric bifunctional silyl (ABS) monomers comprising covalently linked pharmaceutical, chemical and biological agents are described. These agents can also be covalently bound via the silyl group to delivery vehicles for delivering the agents to desired targets or areas. Also described are delivery vehicles which contain ABS monomers comprising covalently linked agents and to vehicles that are covalently linked to the ABS monomers. The silyl modifications described herein can modify properties of the agents and vehicles, thereby providing desired solubility, stability, hydrophobicity and targeting.
    Type: Application
    Filed: September 10, 2014
    Publication date: March 5, 2015
    Inventors: Joseph M. DeSimone, Mathew Finniss, Mary Napier, Ashish Pandya, Matthew Parrott
  • Publication number: 20140298039
    Abstract: A dynamic random access memory (DRAM) comprising a programmable intelligent search memory (PRISM) for regular expression search using non-deterministic finite state automaton and further comprising a cryptography processing engine for performing encryption and decryption, said PRISM and cryptography processing engines creating a secure DRAM for use in a system.
    Type: Application
    Filed: June 12, 2014
    Publication date: October 2, 2014
    Inventor: Ashish A. PANDYA
  • Patent number: 8601086
    Abstract: A TCP/IP processor and data processing engines for use in the TCP/IP processor is disclosed. The TCP/IP processor can transport data payloads of Internet Protocol (IP) data packets using an architecture that provides capabilities to transport and process Internet Protocol (IP) packets from Layer 2 through transport protocol layer and may also provide packet inspection through Layer 7. The engines may perform pass-through packet classification, policy processing and/or security processing enabling packet streaming through the architecture at nearly the full line rate. An application running on an initiator or target can in certain instantiations register a region of memory, which is made available to its peer(s) for access directly without substantial host intervention through RDMA data transfer.
    Type: Grant
    Filed: September 2, 2011
    Date of Patent: December 3, 2013
    Inventor: Ashish A. Pandya
  • Publication number: 20130203675
    Abstract: Asymmetric bifunctional silyl (ABS) monomers comprising covalently linked pharmaceutical, chemical and biological agents are described. These agents can also be covalently bound via the silyl group to delivery vehicles for delivering the agents to desired targets or areas. Also described are delivery vehicles which contain ABS monomers comprising covalently linked agents and to vehicles that are covalently linked to the ABS monomers. The silyl modifications described herein can modify properties of the agents and vehicles, thereby providing desired solubility, stability, hydrophobicity and targeting.
    Type: Application
    Filed: September 15, 2011
    Publication date: August 8, 2013
    Inventors: Joseph M. DeSimone, Matthew Finniss, Mary Napier, Ashish Pandya, Matthew Parrott
  • Publication number: 20130018835
    Abstract: Programmable Intelligent Search Memory (PRISM) architecture provides capabilities for high performance content search. This architecture creates an innovative memory that can be programmed with content search rules which are used by the memory to evaluate presented content for matching with the programmed rules. When the content being searched matches any of the rules in the PRISM, action(s) associated with the matched rule(s) are taken. Content search rules comprise regular expressions which are converted to finite state automata and then programmed in PRISM for evaluating content with the search rules. PRISM architecture comprises of a plurality of PRISM clusters (PMC) which comprise a plurality of PRISM Search Engines. Groups of PMCs can be programmed with the same rules and used in parallel to apply these rules to multiple data streams simultaneously to achieve increased performance. PMC groups provide 10 Gbps performance with 10 PMC groups enabling 100 Gbps content search and security performance.
    Type: Application
    Filed: May 15, 2012
    Publication date: January 17, 2013
    Inventor: Ashish A. PANDYA
  • Patent number: 8200599
    Abstract: Memory architecture provides capabilities for high performance content search. The architecture creates an innovative memory that can be programmed with content search rules which are used by the memory to evaluate presented content for matching with the programmed rules. When the content being searched matches any of the rules programmed in the Programmable Intelligent Search Memory (PRISM) action(s) associated with the matched rule(s) are taken. Content search rules comprise of regular expressions which are converted to finite state automata (FSA) and then programmed in PRISM for evaluating content with the search rules. PRISM architecture comprises of a plurality of programmable PRISM Memory clusters (PMC) which comprise of a plurality of programmable PRISM Search Engines (PSE). Groups of PMCs can be programmed with the same rules and used in parallel to apply these rules to multiple data streams simultaneously to achieve increased performance.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: June 12, 2012
    Inventor: Ashish A. Pandya
  • Patent number: 8181239
    Abstract: An architecture provides capabilities to transport and process Internet Protocol (IP) packets from Layer 2 through transport protocol layer and may also provide packet inspection through Layer 7. A set of engines may perform pass-through packet classification, policy processing and/or security processing enabling packet streaming through the architecture at nearly the full line rate. A scheduler schedules packets to packet processors for processing. An internal memory or local session database cache stores a session information database. The session information that is not in the internal memory is stored and retrieved to/from an additional memory. An application running on an initiator or target can a region of memory, which is made available to its peer for access without substantial host intervention through RDMA data transfer. A security system is also disclosed that enables a new way of implementing security capabilities inside enterprise networks in a distributed manner.
    Type: Grant
    Filed: July 21, 2008
    Date of Patent: May 15, 2012
    Inventor: Ashish A. Pandya
  • Publication number: 20120117610
    Abstract: A runtime adaptable security processor is disclosed. The processor architecture provides capabilities to transport and process Internet Protocol (IP) packets from Layer 2 through transport protocol layer and may also provide packet inspection through Layer 7. A high performance content search and rules processing security processor is disclosed which may be used for application layer and network layer security. A scheduler schedules packets to packet processors for processing. An internal memory or local session database cache stores a session information database for a certain number of active sessions. The session information that is not in the internal memory is stored and retrieved to/from an additional memory. An application running on an initiator or target can in certain instantiations register a region of memory, which is made available to its peer(s) for access directly without substantial host intervention through RDMA data transfer.
    Type: Application
    Filed: September 2, 2011
    Publication date: May 10, 2012
    Inventor: Ashish A. Pandya
  • Publication number: 20120089694
    Abstract: A TCP/IP processor and data processing engines for use in the TCP/IP processor is disclosed. The TCP/IP processor can transport data payloads of Internet Protocol (IP) data packets using an architecture that provides capabilities to transport and process Internet Protocol (IP) packets from Layer 2 through transport protocol layer and may also provide packet inspection through Layer 7. The engines may perform pass-through packet classification, policy processing and/or security processing enabling packet streaming through the architecture at nearly the full line rate. An application running on an initiator or target can in certain instantiations register a region of memory, which is made available to its peer(s) for access directly without substantial host intervention through RDMA data transfer.
    Type: Application
    Filed: September 2, 2011
    Publication date: April 12, 2012
    Inventor: Ashish A. Pandya
  • Publication number: 20110320393
    Abstract: Memory architecture provides capabilities for high performance content search. The architecture creates an innovative memory that can be programmed with content search rules which are used by the memory to evaluate presented content for matching with the programmed rules. When the content being searched matches any of the rules programmed in the Programmable Intelligent Search Memory (PRISM) action(s) associated with the matched rule(s) are taken. Content search rules comprise of regular expressions which are converted to finite state automata (FSA) and then programmed in PRISM for evaluating content with the search rules. PRISM architecture comprises of a plurality of programmable PRISM Memory clusters (PMC) which comprise of a plurality of programmable PRISM Search Engines (PSE). Groups of PMCs can be programmed with the same rules and used in parallel to apply these rules to multiple data streams simultaneously to achieve increased performance.
    Type: Application
    Filed: June 29, 2011
    Publication date: December 29, 2011
    Inventor: Ashish A. PANDYA
  • Publication number: 20110291615
    Abstract: A system of energy storage and charging usable in vehicles and other applications that eliminate the battery capacity and automotive range issues is described. In our invention, vehicles are equipped with charging mechanisms to charge and recharge onboard batteries using wireless electricity and power transmission using magnetic resonant coupling between tuned electromagnetic circuits. The batteries may be charged using wireless charging systems installed along the roads while the vehicle is in use on the road. Charging system may optionally utilize infrared laser beam radiation to transmit power for charging the batteries on board a vehicle while it is in use as well. The onboard vehicle batteries may also be charged when the vehicle is not being driven either by plugging in the vehicle into wall electricity using wired power connection or may be wirelessly charged using the magnetic resonant coupling.
    Type: Application
    Filed: August 11, 2011
    Publication date: December 1, 2011
    Inventors: Ravi A. Pandya, Ashish A. Pandya
  • Patent number: 8055601
    Abstract: Memory architecture provides capabilities for high performance content search. Content search rules comprise of regular expressions which are compiled to finite state automata and then programmed in Programmable Intelligent Search Memory (PRISM) for evaluating content with the search rules. A compiler compiles the content search rules for evaluation by PRISM memory. The PRISM memory architecture creates an innovative memory that can be programmed with content search rules which are used by the memory to evaluate presented content for matching with the programmed rules. When the content being searched matches any of the rules programmed in the Programmable Intelligent Search Memory (PRISM) action(s) associated with the matched rule(s) are taken.
    Type: Grant
    Filed: December 6, 2007
    Date of Patent: November 8, 2011
    Inventor: Ashish A. Pandya
  • Patent number: 8051022
    Abstract: Memory architecture provides capabilities for high performance content search. The architecture creates an innovative memory that can be programmed with content search rules which are used by the memory to evaluate presented content for matching with the programmed rules. When the content being searched matches any of the rules programmed in the Programmable Intelligent Search Memory (PRISM) action(s) associated with the matched rule(s) are taken. The PRISM content search memory is embedded in a single core or multi-core processors or in multi-processor systems to perform content search. PRISM accelerates content search by offloading the content search tasks from the processors. Content search rules comprise of regular expressions which are converted to finite state automata and then programmed in PRISM for evaluating content with the search rules.
    Type: Grant
    Filed: December 6, 2007
    Date of Patent: November 1, 2011
    Inventor: Ashish A. Pandya
  • Patent number: 8030888
    Abstract: A system of energy storage and charging usable in vehicles and other applications that eliminate the battery capacity and automotive range issues is described. In our invention, vehicles are equipped with charging mechanisms to charge and recharge onboard batteries using wireless electricity and power transmission using magnetic resonant coupling between tuned electromagnetic circuits. The batteries may be charged using wireless charging systems installed along the roads while the vehicle is in use on the road. Charging system may optionally utilize infrared laser beam radiation to transmit power for charging the batteries on board a vehicle while it is in use as well. The onboard vehicle batteries may also be charged when the vehicle is not being driven either by plugging in the vehicle into wall electricity using wired power connection or may be wirelessly charged using the magnetic resonant coupling.
    Type: Grant
    Filed: August 12, 2008
    Date of Patent: October 4, 2011
    Inventors: Ravi A. Pandya, Ashish A. Pandya
  • Patent number: 8005966
    Abstract: Disclosed are systems employing an architecture that provides capabilities to transport and process Internet Protocol (IP) packets from Layer 2 through transport protocol processing and may also perform packet inspection through Layer 7. A set of engines may perform pass-through packet classification, policy processing and/or security processing enabling packet streaming through the architecture at nearly the full line rate. A scheduler schedules packets to packet processors for processing. An internal memory or local session database cache stores a session information database for a certain number of active sessions. The session information that is not in the internal memory is stored and retrieved to/from an additional memory.
    Type: Grant
    Filed: June 10, 2003
    Date of Patent: August 23, 2011
    Inventor: Ashish A. Pandya
  • Patent number: 7996348
    Abstract: Memory architecture provides capabilities for high performance content search. The architecture creates an innovative memory that can be programmed with content search rules which are used by the memory to evaluate presented content for matching with the programmed rules. When the content being searched matches any of the rules programmed in the Programmable Intelligent Search Memory (PRISM) action(s) associated with the matched rule(s) are taken. Content search rules comprise of regular expressions which are converted to finite state automata (FSA) and then programmed in PRISM for evaluating content with the search rules. PRISM architecture comprises of a plurality of programmable PRISM Memory clusters (PMC) which comprise of a plurality of programmable PRISM Search Engines (PSE). Groups of PMCs can be programmed with the same rules and used in parallel to apply these rules to multiple data streams simultaneously to achieve increased performance.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: August 9, 2011
    Inventor: Ashish A. Pandya
  • Publication number: 20110153657
    Abstract: Memory architecture provides capabilities for high performance content search. The architecture creates an innovative memory that can be programmed with content search rules which are used by the memory to evaluate presented content for matching with the programmed rules. When the content being searched matches any of the rules programmed in the Programmable Intelligent Search Memory (PRISM) action(s) associated with the matched rule(s) are taken. Content search rules comprise of regular expressions which are converted to finite state automata (FSA) and then programmed in PRISM for evaluating content with the search rules. PRISM architecture comprises of a plurality of programmable PRISM Search Engines (PSE), each capable of supporting a predetermined size FSAs. FSA extension architecture is created to extend the predetermined size limit of an FSA supported by PSE, by coupling multiple PSEs together to behave as a composite PSE to support larger FSAs.
    Type: Application
    Filed: January 13, 2011
    Publication date: June 23, 2011
    Inventor: Ashish A. Pandya