Abstract: A random number generator includes a ring oscillator having an EX-OR gate and four inverters together forming a loop. This loop enters stable state for a start signal having the low level and oscillates for the start signal having the high level. When the start signal has a pulse of a width shorter than the loop's delay time, output nodes responsively, sequentially enter metastable state hovering between the high and low levels. The metastable waveform becomes smaller with time and finally disappears. As metastable state cannot be controlled in longevity, it disappears at any random number node. A counter thus outputs a signal serving as true random number data depending on the longevity of the metastable state. A random number generator miniaturized and having reduced power consumption, and of high performance can thus be implemented.

Abstract: A non-contact IC card system capable of improving the data transmission rate and communication range without considerably enlarging the frequency band of a signal to be put to use. An AM-modulated signal (1F) from a reader writer (200) is received by a resonance circuit (6) of an IC card (100), and an IC card driving power source is produced therefrom in a rectifying section (8). In addition, it is demodulated in an AM demodulating circuit (10) and decoded in a decoder (13), thereby presenting reception data (10). On the other hand, when data (1J) is transmitted from the IC card (100), a characteristic of a regulator (9) for stabilizing an operating voltage of the resonance circuit (6) is altered on the basis of a signal encoded in an encoder (11) so that the signal is transmitted as an AM-modulated signal (1P) to the reader writer (200).

Abstract: An addition and subtraction circuit performs addition and subtraction using a carry-in signal from another operation circuit, and outputs a carry-out signal generated through addition and subtraction to another operation circuit. A right-shift circuit performs right-shift using a shift-in signal from another operation circuit, and outputs a shift-out signal generated through right-shift to another operation circuit. Therefore, even if a data length of operation data is extended, a propagation path for a carry can be shortened, and an operation clock frequency of an encryption circuit can be increased.

Abstract: A power-residue calculating unit includes a K register connected to a first internal bus for once storing an intermediate calculation result to be discarded when a power-residue calculation is executed in accordance with a binary method. Therefore even when data to be discarded appears during the calculation, a write into K register is performed, so that current in a write operation flows thereby improving immunity against Power Analysis.

Abstract: A data encryption circuit includes a plurality of buffers; an operation unit reading block data to be processed from any one of the buffers, executing an encryption or a decryption operation process, and writing the processed result into any one of the buffers; a data control unit writing block data to be processed into any one of the buffers and reading the operation result at the operation unit from any one of the buffers; and a buffer designating unit designating a buffer to be an object of input/output for the operation unit and data control unit, so as to prevent coincidence of a buffer into which data is read by the operation unit, a buffer into which data is written by the operation unit, a buffer into which data is read by the data control unit, and a buffer into which data is written by the data control unit.

Abstract: A charge pump circuit comprises a plurality of booster stages. Each booster stage has a first node, a second node, a first charge pump and a second charge pump. Both charge pumps operate in a complementary manner, and raise potential of the second node relative to potential of the first node by transferring charge from the first node to the second node. Each charge pump comprises a pumping capacitor, an NMOS transistor and a PMOS transistor. In each charge pump, the NMOS transistor is used for charging the pumping capacitor with charge input through the first node, and the PMOS transistor is used for discharging the pumping capacitor to send charge to the second node.

Abstract: A PLL circuit is disclosed which can achieve a locked state in a short time. The PLL circuit has a phase comparator, a loop filter and a voltage controlled oscillator. The phase comparator is provided with frequency adjusting (or matching) circuits that are operative to charge the loop filter when it is detected that an oscillation frequency of the voltage controlled oscillator is lower than a frequency of an input signal, so as to increase the oscillation frequency of the voltage controlled oscillator, until it is detected that an oscillation frequency of the voltage controlled oscillator is higher than the frequency of the input signal.

Abstract: A batteryless non-contact IC card, using electromagnetic waves as a communication medium, includes an antenna resonance circuit for data transmission and reception; a phase variation detector for detecting a phase variation of a voltage of the antenna resonance circuit due to a received signal, on the basis of an amplitude variation of the received signal; and a demodulator for demodulating data in accordance with the phase variation detected by the phase variation detector.

Abstract: A non-contact IC card includes an antenna resonance circuit including two output terminals; and a phase locked loop (PLL) for receiving, as an input signal, a signal representative of a received signal received by the IC card and changing to a negative state, and for producing an output tuned to the input signal, wherein, for phase modulation or demodulation, an output signal for half a period is produced as the output of the PLL and both terminals of an antenna resonance circuit are short-circuited during the half period from a zero crossing point of the input signal.

Abstract: A batteryless non-contact type IC card using an electromagnetic wave as a communication medium includes an antenna resonance circuit for data transmission and reception, the antenna resonance circuit including first and second terminals; a bridge rectifying circuit coupled to the antenna resonance circuit for rectifying a signal from the antenna resonance circuit; and a switch for switching, in accordance with a switching signal, so that a lower-voltage is supplied to the first terminal of the antenna resonance circuit and a higher-voltage signal is extracted from the second terminal.

Abstract: A non-contact type IC card system has a batteryless non-contact type IC card using an electromagnetic wave as a communication medium and a reading and writing (R/W) unit. To eliminate a problem that the level of a received signal varies depending upon the communication distance between the card and the R/W unit, a comparator detects the received signal level of an antenna resonance circuit for data transmission and reception, before a variable resistance device alters the quality factor Q of the antenna resonance circuit, which results in adjusting the level of the received signal.

Abstract: An integrated circuit has a built-in EEPROM which utilizes a high voltage to write or erase data. The integrated circuit operates with a lower power supply voltage. Switches supply a high voltage to bit lines, control gate lines, and word lines. Each switch includes a multi-stage charge pump comprising diode-connected transistors and capacitors. The switch has an enhanced charge capability and can transfer a high voltage from a low power supply voltage. Thus, the switch can operate successfully with a low power supply voltage.

Abstract: An integrated circuit has a built-in EEPROM which utilizes a high voltage to write or erase data. The integrated circuit operates with a lower power supply voltage. Switches supply a high voltage to bit lines, control gate lines, and word lines. Each switch includes a multi-stage charge pump comprising diode-connected transistors and capacitors. The switch has an enhanced charge capability and can transfer a high voltage from a low power supply voltage. Thus, the switch can operate successfully with a low power supply voltage.

Abstract: A semiconductor integrated circuit includes: a writable non-volatile memory; a writing voltage-generating circuit for generating a writing voltage and supplying it to the non-volatile memory; an oscillating circuit for generating a first clock signal and supplying it to the writing voltage-generating circuit; a timer for measuring a time the writing voltage generated in the writing voltage-generating circuit is applied to the non-volatile memory; a control circuit for controlling writing in the non-volatile memory; and a switching device for selecting one of the first clock signal generated in the oscillating circuit and a second clock signal input from outside the integrated circuit in response to a control signal from the control circuit, thereby supplying the selected signal to the timer and the control circuit as a clock.

Abstract: A microcomputer includes a CPU for processing data, a memory for storing a program for operating the CPU, an input circuit for detecting an input signal exceeding a threshold voltage that lies outside a range from zero volts to a power supply voltage and for supplying a detected input signal exceeding the threshold voltage to the CPU and an output circuit for outputting from the microcomputer a signal output by the CPU. The input circuit reduces power consumption and may include a differential circuit having a pair of transistors with different electrical characteristics, eliminating the need to establish a reference voltage with resistors or other components.

Abstract: The present invention provides a microcomputer in which an input signal is input via a resonance circuit, a CPU for processing data, an input circuit for detecting the input signal, a decoding circuit for demodulating the input signal and supplying a demodulated signal of a predetermined length to the CPU when the input circuit detects the input signal, an attenuation circuit for attenuating oscillation in the resonance circuit when said input circuit detects the input signal, and an output circuit for outputting an output signal from the CPU. A non-contact IC card utilizing the microcomputer includes an antenna circuit for transmitting and receiving data and incorporating the resonance circuit.

Abstract: An object of the present invention is to provide a semiconductor integrated circuit in which an EEPROM is incorporated in a highly integrated microcomputer having a twin well structure. A twin well region including an n-well region, a p-well region, and a p-type substrate region surrounded by a p-well region are produced in a single semiconductor substrate. A supply voltage system made up of a CPU, a ROM or RAM, a UART, and EEPROM control systems to which the high voltage for the EEPROM is not applied is formed in the twin well region as a CMOS structure, enabling high density integration. A high-voltage system made up of an EEPROM memory cell array and an EEPROM peripheral high-voltage system in the p-type region have an NMOS structure. This arrangement minimizes the substrate effect and enables the high-voltage system to operate normally.

Abstract: The invention provides an IC card which performs control of allowing or inhibiting input of a clock signal externally of the card via no CPU. In the present IC card, those ones of a CPU 1a, a UART 7a, a timer 3 and an EEPROM 5a which require the clock signal for operation generate operation signals. In accordance with these operation signals, a clock control circuit 8 performs control of allowing or inhibiting input of the clock signal externally of the card without intervention of the CPU 1a. Supply of the clock signal to the CPU 1a is stopped upon an STP command executed by the CPU 1a, and resumed in accordance with any of start-up select conditions set by the CPU 1a and corresponding one of operation end signals from the UART 7a, the timer 3 and the EEPROM 5a.

Abstract: The present invention provides a non-contact IC card having a microcomputer. The microcomputer includes a CPU, a resonance circuit which receives data bits through an electromagnetic wave, an input circuit which detects the data signal, and a decoding circuit which supplies a pulse of predetermined length to the CPU when the input circuit detects the data signal. The detection of the data signal also causes a circuit to close a switch using a reception inhibit signal of a half bit's width. The reception inhibit signal rapidly attenuates the oscillations in a resonance circuit, making it ready to receive the next data bit.

Abstract: A microcomputer for driving a resonant circuit includes a CPU for processing data, an input circuit for detecting an input signal and for transmitting it to the CPU, an output circuit for outputting an output signal from the CPU to the resonant circuit, and attenuation device for attenuating oscillation in the resonant circuit after the output signal from the CPU is turned off. In a non-contact IC card the resonant circuit is an antenna for sending and receiving data to and from the outside without contact.