Abstract: A semiconductor device and a method of manufacturing the same, the device including a through-hole electrode structure extending through a substrate; a redistribution layer on the through-hole electrode structure; and a conductive pad, the conductive pad including a penetrating portion extending through the redistribution layer; and a protrusion portion on the penetrating portion, the protrusion portion protruding from an upper surface of the redistribution layer, wherein a central region of an upper surface of the protrusion portion is flat and not closer to the substrate than an edge region of the upper surface of the protrusion portion.

Abstract: A semiconductor device includes a conductive component on a substrate, a passivation layer on the substrate and including an opening that exposes at least a portion of the conductive component, and a pad structure in the opening and located on the passivation layer, the pad structure being electrically connected to the conductive component. The pad structure includes a lower conductive layer conformally extending on an inner sidewall of the opening, the lower conductive layer including a conductive barrier layer, a first seed layer, an etch stop layer, and a second seed layer that are sequentially stacked, a first pad layer on the lower conductive layer and at least partially filling the opening, and a second pad layer on the first pad layer and being in contact with a peripheral portion of the lower conductive layer located on the top surface of the passivation layer.

Abstract: A semiconductor device can include a substrate that has a surface. A via structure can extend through the substrate toward the surface of the substrate, where the via structure includes an upper surface. A pad structure can be on the surface of the substrate, where the pad structure can include a lower surface having at least one protrusion that is configured to protrude toward the upper surface of the via structure.

Abstract: According to aspects provided herein, a semiconductor device may include a bump providing improved reliability and reduced size. In some aspects, a conductive pad may be formed on a substrate, and a conductive support layer, which may be a pillar, may be formed on the conductive pad. An intermetallic compound (IMC) layer may be formed on the conductive support layer, and a solder layer may be formed on the IMC layer. In some aspects, the conductive support layer may be of a smaller width than the IMC layer. In some aspects, the conductive support layer may have side surfaces which are wider at the solder side than at the conductive pad side. In some aspects, other layers may be formed, such as a seed layer between the conductive pad and the conductive support layer, or a barrier layer between the conductive support layer and the IMC layer.

Abstract: An integrated circuit device includes a semiconductor structure, a through-silicon-via (TSV) structure that penetrates through the semiconductor structure and a connection terminal connected to the TSV structure. A metal capping layer includes a flat capping portion that covers the bottom surface of the connection terminal and a wedge-shaped capping portion that is integrally connected to the flat capping portion and that partially covers a side wall of the connection terminal. The metal capping layer may be formed by an electroplating process in which the connection terminal is in contact with a metal strike electroplating solution while a pulse-type current is applied.

Abstract: A semiconductor device includes a via structure penetrating through a substrate, a portion of the via structure being exposed over a surface of the substrate, a protection layer pattern structure provided on the surface of the substrate and including a first protection layer pattern and a second protection layer pattern, the first protection layer pattern surrounding a lower sidewall of the exposed portion of the via structure and exposing an upper sidewall of the exposed portion of the via structure, the second protection layer pattern exposing a portion of the top surface of the first protection layer pattern adjacent to the sidewall of the via structure, and a pad structure provided on the via structure and the protection layer pattern structure and covering the top surface of the first protection layer pattern exposed by the second protection layer pattern.

Abstract: According to aspects provided herein, a semiconductor device may include a bump providing improved reliability and reduced size. In some aspects, a conductive pad may be formed on a substrate, and a conductive support layer, which may be a pillar, may be formed on the conductive pad. An intermetallic compound (IMC) layer may be formed on the conductive support layer, and a solder layer may be formed on the IMC layer. In some aspects, the conductive support layer may be of a smaller width than the IMC layer. In some aspects, the conductive support layer may have side surfaces which are wider at the solder side than at the conductive pad side. In some aspects, other layers may be formed, such as a seed layer between the conductive pad and the conductive support layer, or a barrier layer between the conductive support layer and the IMC layer.

Abstract: A semiconductor device includes a via structure penetrating through a substrate, a portion of the via structure being exposed over a surface of the substrate, a protection layer pattern structure provided on the surface of the substrate and including a first protection layer pattern and a second protection layer pattern, the first protection layer pattern surrounding a lower sidewall of the exposed portion of the via structure and exposing an upper sidewall of the exposed portion of the via structure, the second protection layer pattern exposing a portion of the top surface of the first protection layer pattern adjacent to the sidewall of the via structure, and a pad structure provided on the via structure and the protection layer pattern structure and covering the top surface of the first protection layer pattern exposed by the second protection layer pattern.

Abstract: A shielding unit for a plating apparatus may include a shielding plate, a controlling plate and a rotary actuator. The shielding plate may have a plurality of holes configured to permit a passage of an electrolyte therethrough. The controlling plate may make contact with the shielding plate. The controlling plate may have a plurality of controlling holes for controlling an opening ratio of the plurality of holes of the shielding plate. The rotary actuator may rotate the controlling plate to control the opening ratio of the plurality of holes shielding plate.

Abstract: An integrated circuit device includes a semiconductor structure, a through-silicon-via (TSV) structure that penetrates through the semiconductor structure and a connection terminal connected to the TSV structure. A metal capping layer includes a flat capping portion that covers the bottom surface of the connection terminal and a wedge-shaped capping portion that is integrally connected to the flat capping portion and that partially covers a side wall of the connection terminal. The metal capping layer may be formed by an electroplating process in which the connection terminal is in contact with a metal strike electroplating solution while a pulse-type current is applied.

Abstract: A semiconductor device can include a substrate that has a surface. A via structure can extend through the substrate toward the surface of the substrate, where the via structure includes an upper surface. A pad structure can be on the surface of the substrate, where the pad structure can include a lower surface having at least one protrusion that is configured to protrude toward the upper surface of the via structure.

Abstract: An electronic-part mounting structure includes a wiring circuit comprised of wiring conductors covered with an insulation, an electronic part having connecting conductors, disposed on the wiring circuit so as to be aligned with the wiring conductors of the wiring circuit, and connecting members for connecting the wiring conductors with the connecting conductors. Each connecting member has crimp pieces thereof extending through the insulation and the wiring conductor of the wiring circuit to which distal ends of the crimp pieces are bent and cramped. The connecting conductor is held between the connecting member and the wiring circuit and electrically connected to the wiring conductor through the connecting member.

Abstract: A semiconductor device manufacturing apparatus and a control method thereof which can shorten the manufacturing term of semiconductor devices are achieved. The semiconductor device manufacturing apparatus includes a plurality of processing apparatuses for taking out and processing semiconductor wafers successively which constitute a process lot, and including a standby port where a lot to be processed following processing of the process lot is put on standby. The semiconductor device manufacturing apparatus further includes a stocker for storing a lot to be transported to the standby port. According to the control method of the semiconductor device manufacturing apparatus, it is predicted when there is no standby wafer left in the processing apparatus in a prediction step. The predicted time is used to set transfer starting time when transfer of the next-processed lot to the standby port is started in a time setting step. A lot to be processed next is selected in a lot selecting step.