Patents by Inventor Atsushi Hiraishi

Atsushi Hiraishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11894559
    Abstract: The present invention relates to a dispersant composition for carbon nanotubes, containing: a copolymer that includes a structural unit A represented by the following general formula (1) and a structural unit B represented by the following general formula (2); and a solvent, wherein the content of the structural unit B in all structural units of the copolymer is 20 mass % or more. In the following formulae, R1, R2, R3, R5, R6, and R7 are the same or different from each other and are each a hydrogen atom, a methyl group, or an ethyl group, R4 is a hydrocarbon group having 16 to 30 carbon atoms, R8 is a linear or branched alkylene group having 2 to 3 carbon atoms, X1 is on oxygen atom or NH, X2 is an oxygen atom, p is the number of 1 to 8, and R9 is a hydrogen atom, a methyl group, or an ethyl group.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: February 6, 2024
    Assignee: KAO CORPORATION
    Inventors: Akito Itoi, Yutaro Kinoshita, Atsushi Hiraishi, Takahiro Yano, Akihiro Koyama
  • Patent number: 11891502
    Abstract: The present invention relates to a dispersant for a positive electrode of a power storage device. The dispersant is a copolymer that contains a constitutional unit A represented by the following general formula (1) and at least one constitutional unit B selected from the group consisting of a constitutional unit B1 represented by the following general formula (2) and a constitutional unit B2 represented by the following general formula (3). The total content of the constitutional unit A and the constitutional unit B in the copolymer is 80% by mass or more. The content of the constitutional unit A in all constitutional units of the copolymer is 35% by mass or more.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: February 6, 2024
    Assignee: KAO CORPORATION
    Inventors: Yutaro Kinoshita, Akito Itoi, Atsushi Hiraishi, Takahiro Yano, Akihiro Koyama
  • Patent number: 11817583
    Abstract: A negative electrode constituting a non-aqueous electrolyte secondary battery, which is an example of an embodiment, comprises a negative-electrode mixture layer including a negative-electrode active material and a binder agent. The negative electrode includes, as the binder agent, at least a polymer constituted by a constituent unit A represented by formula (1), a constituent unit B represented by formula (2), and a constituent unit C represented by formula (3). The molar ratio (l/m) of the constituent unit A to the constituent unit B is from 0.2 to 1.8.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: November 14, 2023
    Assignees: PANASONIC HOLDINGS CORPORATION, KAO CORPORATION
    Inventors: Naoyuki Wada, Atsushi Hiraishi, Kei Takahashi
  • Patent number: 11708269
    Abstract: A method for producing a semiconducting SWCNT dispersion of the present invention comprises: a step A of preparing a to-be-separated SWCNT dispersion that includes a SWCNT mixture, an aqueous medium, and a polymer including a structural unit A derived from a monomer represented by Formula (1), and a step B of centrifuging the to-be-separated SWCNT dispersion and subsequently collecting a supernatant including the semiconducting SWCNT from the centrifuged to-be-separated SWCNT dispersion. The weight-average molecular weight of the polymer is 1,000 or more and 100,000 or less.
    Type: Grant
    Filed: May 22, 2019
    Date of Patent: July 25, 2023
    Assignee: KAO CORPORATION
    Inventor: Atsushi Hiraishi
  • Publication number: 20220402761
    Abstract: In one aspect, provided is a method for producing a semiconducting single-walled carbon nanotube dispersion. This method allows semiconducting single-walled carbon nanotubes to be separated from a single-walled carbon nanotube mixture containing semiconducting single-walled carbon nanotubes and metallic single-walled carbon nanotubes in an aqueous medium, and yet requires only an easily available separation agent and a simple operation. One aspect of the present disclosure relates to a method for producing a semiconducting single-walled carbon nanotube dispersion.
    Type: Application
    Filed: November 13, 2020
    Publication date: December 22, 2022
    Applicant: KAO CORPORATION
    Inventor: Atsushi HIRAISHI
  • Publication number: 20220388848
    Abstract: In one aspect, provided is a method for producing a semiconducting single-walled carbon nanotube dispersion. This method allows semiconducting single-walled carbon nanotubes to be separated from a single-walled carbon nanotube mixture containing semiconducting single-walled carbon nanotubes and metallic single-walled carbon nanotubes in an aqueous medium, and yet requires only an easily available separation agent and a simple operation. One aspect of the present disclosure relates to a method for producing a semiconducting single-walled carbon nanotube dispersion.
    Type: Application
    Filed: November 13, 2020
    Publication date: December 8, 2022
    Applicant: Kao Corporation
    Inventors: Mitsuo ASAI, Atsushi HIRAISHI
  • Publication number: 20220177691
    Abstract: The present invention relates to a dispersant for a positive electrode of a power storage device. The dispersant is a copolymer that contains a constitutional unit A represented by the following general formula (1) and at least one constitutional unit B selected from the group consisting of a constitutional unit B1 represented by the following general formula (2) and a constitutional unit B2 represented by the following general formula (3). The total content of the constitutional unit A and the constitutional unit B in the copolymer is 80% by mass or more. The content of the constitutional unit A in all constitutional units of the copolymer is 35% by mass or more.
    Type: Application
    Filed: December 27, 2019
    Publication date: June 9, 2022
    Applicant: KAO CORPORATION
    Inventors: Yutaro KINOSHITA, Akito ITOI, Atsushi HIRAISHI, Takahiro YANO, Akihiro KOYAMA
  • Publication number: 20220173403
    Abstract: The present invention relates to a dispersant composition for carbon nanotubes, containing: a copolymer that includes a structural unit A represented by the following general formula (1) and a structural unit B represented by the following general formula (2); and a solvent, wherein the content of the structural unit B in all structural units of the copolymer is 20 mass % or more. In the following formulae, R1, R2, R3, R5, R6, and R7 are the same or different from each other and are each a hydrogen atom, a methyl group, or an ethyl group, R4 is a hydrocarbon group having 16 to 30 carbon atoms, R8 is a linear or branched alkylene group having 2 to 3 carbon atoms, X1 is on oxygen atom or NH, X2 is an oxygen atom, p is the number of 1 to 8, and R9 is a hydrogen atom, a methyl group, or an ethyl group.
    Type: Application
    Filed: December 27, 2019
    Publication date: June 2, 2022
    Applicant: Kao Corporation
    Inventors: Akito ITOI, Yutaro KINOSHITA, Atsushi HIRAISHI, Takahiro YANO, Akihiro KOYAMA
  • Patent number: 11183693
    Abstract: One aspect provides a resin composition that is used for an electrode of a power storage device and that has excellent ion permeability while ensuring good binding properties with an electrode. One aspect of the present disclosure relates to a resin composition for an electrode of a power storage device. The resin composition contains polymer particles. The polymer particles have ion permeability. A rate of change in elasticity of the polymer particles before and after treatment with an electrolyte solution [(modulus of elasticity after treatment)/(modulus of elasticity before treatment)] is 30% or less.
    Type: Grant
    Filed: July 28, 2017
    Date of Patent: November 23, 2021
    Assignee: KAO CORPORATION
    Inventors: Atsushi Hiraishi, Kazuo Kuwahara, Kei Takahashi, Kazuo Oki, Hideki Goto
  • Publication number: 20210188642
    Abstract: A method for producing a semiconducting SWCNT dispersion of the present invention comprises: a step A of preparing a to-be-separated SWCNT dispersion that includes a SWCNT mixture, an aqueous medium, and a polymer including a structural unit A derived from a monomer represented by Formula (1), and a step B of centrifuging the to-be-separated SWCNT dispersion and subsequently collecting a supernatant including the semiconducting SWCNT from the centrifuged to-be-separated SWCNT dispersion. The weight-average molecular weight of the polymer is 1,000 or more and 100,000 or less.
    Type: Application
    Filed: May 22, 2019
    Publication date: June 24, 2021
    Applicant: KAO CORPORATION
    Inventor: Atsushi HIRAISHI
  • Publication number: 20200381734
    Abstract: One aspect provides a resin composition that is used for an electrode of a power storage device and that has excellent ion permeability while ensuring good binding properties with an electrode. One aspect of the present disclosure relates to a resin composition for an electrode of a power storage device. The resin composition contains polymer particles. The polymer particles have ion permeability. A rate of change in elasticity of the polymer particles before and after treatment with an electrolyte solution [(modulus of elasticity after treatment)/(modulus of elasticity before treatment)] is 30% or less.
    Type: Application
    Filed: July 28, 2017
    Publication date: December 3, 2020
    Applicant: Kao Corporation
    Inventors: Atsushi HIRAISHI, Kazuo KUWAHARA, Kei TAKAHASHI, Kazuo OKI, Hideki GOTO
  • Publication number: 20200313192
    Abstract: A negative electrode constituting a non-aqueous electrolyte secondary battery, which is an example of an embodiment, comprises a negative-electrode mixture layer including a negative-electrode active material and a binder agent. The negative electrode includes, as the binder agent, at least a polymer constituted by a constituent unit A represented by formula (1), a constituent unit B represented by formula (2), and a constituent unit C represented by formula (3). The molar ratio (l/m) of the constituent unit A to the constituent unit B is from 0.2 to 1.8.
    Type: Application
    Filed: December 7, 2018
    Publication date: October 1, 2020
    Applicants: Panasonic Corporation, Kao Corporation
    Inventors: Naoyuki Wada, Atsushi Hiraishi, Kei Takahashi
  • Patent number: 10720201
    Abstract: Apparatuses for receiving an input signal in a semiconductor device are described. An example apparatus includes a signal receiver that receives information signal: a control circuit that provides a plurality of control signals; and a signal receiver replica circuit that receives a first reference signal. The signal receiver replica circuit includes a plurality of receivers. Each receiver of the plurality of receivers receives the first reference signal and a corresponding control signal of the plurality of control signals, and further provides an output signal.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: July 21, 2020
    Assignee: Micron Technology, Inc.
    Inventor: Atsushi Hiraishi
  • Publication number: 20190371388
    Abstract: Apparatuses for receiving an input signal in a semiconductor device are described. An example apparatus includes a signal receiver that receives information signal: a control circuit that provides a plurality of control signals; and a signal receiver replica circuit that receives a first reference signal. The signal receiver replica circuit includes a plurality of receivers. Each receiver of the plurality of receivers receives the first reference signal and a corresponding control signal of the plurality of control signals, and further provides an output signal.
    Type: Application
    Filed: August 19, 2019
    Publication date: December 5, 2019
    Applicant: Micron Technology, Inc.
    Inventor: Atsushi Hiraishi
  • Patent number: 10410712
    Abstract: Apparatuses for receiving an input signal in a semiconductor device are described. An example apparatus includes a signal receiver that receives information signal; a control circuit that provides a plurality of control signals; and a signal receiver replica circuit that receives a first reference signal. The signal receiver replica circuit includes a plurality of receivers. Each receiver of the plurality of receivers receives the first reference signal and a corresponding control signal of the plurality of control signals, and further provides an output signal.
    Type: Grant
    Filed: May 7, 2018
    Date of Patent: September 10, 2019
    Assignee: Micron Technology, Inc.
    Inventor: Atsushi Hiraishi
  • Publication number: 20180277194
    Abstract: Apparatuses for receiving an input signal in a semiconductor device are described. An example apparatus includes a signal receiver that receives information signal; a control circuit that provides a plurality of control signals; and a signal receiver replica circuit that receives a first reference signal. The signal receiver replica circuit includes a plurality of receivers. Each receiver of the plurality of receivers receives the first reference signal and a corresponding control signal of the plurality of control signals, and further provides an output signal.
    Type: Application
    Filed: May 7, 2018
    Publication date: September 27, 2018
    Applicant: Micron Technology, Inc.
    Inventor: Atsushi Hiraishi
  • Patent number: 10049722
    Abstract: Apparatuses are presented for a semiconductor device utilizing dual I/O line pairs. The apparatus includes a first I/O line pair coupled to a first local I/O line pair. A second I/O line pair may be provided coupled to a second local I/O line pair. The apparatus may further include a first bit line including at least a first memory cell and a second memory cell, and a second bit line including at least a third memory cell and a fourth memory cell may be provided. The first local I/O line pair may be coupled to at least one of the first and second bit lines, and the second local I/O line pair is coupled to at least one of the first and second bit lines.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: August 14, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Shunichi Saito, Toshio Sugano, Atsushi Hiraishi, Atsuo Koshizuka
  • Publication number: 20180197595
    Abstract: Apparatuses are presented for a semiconductor device utilizing dual I/O line pairs. The apparatus includes a first I/O line pair coupled to a first local I/O line pair. A second I/O line pair may be provided coupled to a second local I/O line pair. The apparatus may further include a first bit line including at least a first memory cell and a second memory cell, and a second bit line including at least a third memory cell and a fourth memory cell may be provided. The first local I/O line pair may be coupled to at least one of the first and second bit lines, and the second local I/O line pair is coupled to at least one of the first and second bit lines.
    Type: Application
    Filed: September 28, 2017
    Publication date: July 12, 2018
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Shunichi Saito, Toshio Sugano, Atsushi Hiraishi, Atsuo Koshizuka
  • Patent number: 9984740
    Abstract: Apparatuses for receiving an input signal in a semiconductor device are described. An example apparatus includes a signal receiver that receives information signal; a control circuit that provides a plurality of control signals; and a signal receiver replica circuit that receives a first reference signal. The signal receiver replica circuit includes a plurality of receivers. Each receiver of the plurality of receivers receives the first reference signal and a corresponding control signal of the plurality of control signals, and further provides an output signal.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: May 29, 2018
    Assignee: Micron Technology, Inc.
    Inventor: Atsushi Hiraishi
  • Patent number: 9837137
    Abstract: A semiconductor device includes a plurality of memory cells, an access circuit configured to perform a data read operation, a data write operation and a data refresh operation on the memory cells, the access circuit to operate in a selected one of a first mode that is ready to perform and a second mode that is not ready to perform, and a judgment circuit configured to respond to first command information, to cause, when the access circuit is in the first mode, the access circuit to perform the data refresh operation, and to cause, when the access circuit is in the second mode, the access circuit to exit from the second mode and then to perform the refresh operation.
    Type: Grant
    Filed: May 19, 2016
    Date of Patent: December 5, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Shunichi Saito, Toshio Sugano, Atsushi Hiraishi