Patents by Inventor Atsushi Yoshizawa

Atsushi Yoshizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090224233
    Abstract: The invention is an organic luminescence transistor device including: a substrate; a first electrode layer provided on a side of an upper surface of the substrate; a layered structure provided locally on a side of an upper surface of the first electrode layer, the layered structure covering an area of a predetermined size in a plan view, the layered structure including an insulation layer, an assistance electrode layer and an electric-charge-injection inhibiting layer in this order; an organic EL layer provided on the side of an upper surface of the first electrode layer at least at an area not provided with the layered structure; and a second electrode layer provided on a side of an upper surface of the organic EL layer.
    Type: Application
    Filed: January 26, 2007
    Publication date: September 10, 2009
    Applicants: DAI NIPPON PRINTING CO., LTD., PIONEER CORPORATION, NEC CORPORATION
    Inventors: Katsunari Obata, Shinichi Handa, Takuya Hata, Kenji Nakamura, Atsushi Yoshizawa, Hiroyuki Endo
  • Publication number: 20090219086
    Abstract: An amplifier is provided which includes: a first variable capacitance device of which capacitance is variable, a second variable capacitance device of which capacitance is variable, electrically connected to the first variable capacitance device, and of an inverse conductivity type from the first variable capacitance device, and a first input unit for selectively inputting a bias voltage and a voltage signal to the first variable capacitance device and the second variable capacitance device, wherein, in the event that the bias voltage and the voltage signal are input to the first variable capacitance device and the second variable capacitance device, the capacitance of the first variable capacitance device and the second variable capacitance device is taken as a first value, and wherein the voltage signal is amplified with the capacitance of the first variable capacitance device and the second variable capacitance device as a second value smaller than the first value.
    Type: Application
    Filed: September 4, 2007
    Publication date: September 3, 2009
    Applicant: SONY CORPORATION
    Inventors: Sachio Iida, Atsushi Yoshizawa
  • Publication number: 20090179208
    Abstract: The invention is an organic luminescence transistor device including: a substrate; an assistance electrode layer provided on an upper surface of the substrate; an insulation film provided on an upper surface of the assistance electrode layer; a first electrode provided locally on an upper surface of the insulation film, the first electrode covering an area of a predetermined size; an electric-charge-injection inhibiting layer provided on an upper surface of the first electrode, the electric-charge-injection inhibiting layer having the same size as the first electrode in a plan view; an electric-charge injection layer provided on the upper surface of the insulation film at an area not provided with the first electrode and on an upper surface of the electric-charge-injection inhibiting layer; a luminescent layer provided on an upper surface of the electric-charge injection layer; and a second electrode layer provided on the luminescent layer.
    Type: Application
    Filed: November 28, 2006
    Publication date: July 16, 2009
    Applicants: DAI NIPPON PRINTING CO., LTD, PIONEER CORPORATION, NEC CORPORATION
    Inventors: Katsunari Obata, Shinichi Handa, Takuya Hata, Kenji Nakamura, Atsushi Yoshizawa, Hiroyuki Endo
  • Publication number: 20090179195
    Abstract: The invention is an organic luminescence transistor device including: a substrate; an assistance electrode layer provided on a side of an upper surface of the substrate; an insulation film provided on a side of an upper surface of the assistance electrode layer; a first electrode provided locally on a side of an upper surface of the insulation film, the first electrode covering an area of a predetermined size; an electric-charge-injection inhibiting layer provided on an upper surface of the first electrode, the electric-charge-injection inhibiting layer having a shape larger than that of the first electrode in a plan view; an electric-charge injection layer provided on the side of an upper surface of the insulation film at an area not provided with the first electrode or the electric-charge-injection inhibiting layer and on an upper surface of the electric-charge-injection inhibiting layer; a luminescent layer provided on an upper surface of the electric-charge injection layer; and a second electrode layer pr
    Type: Application
    Filed: December 1, 2006
    Publication date: July 16, 2009
    Applicants: DAI NIPPON PRINTING CO., LTD., PIONEER CORPORATION, NEC CORPORATION
    Inventors: Katsunari Obata, Shinichi Handa, Takuya Hata, Kenji Nakamura, Atsushi Yoshizawa, Hiroyuki Endo
  • Publication number: 20090160577
    Abstract: (Problem) To provide a charge sampling filter circuit and a charge sampling method. (Means for Resolution) A charge sampling filter circuit includes a first capacitor that samples an input signal, and in which at least a portion of electric charge stored in the first capacitor by sampling is output to a second capacitor that is connectable with the first capacitor. The charge sampling filter circuit is characterized by including a switching portion that switches a circuit mode including a sampling mode that causes the first capacitor to sample the input signal, and an output mode that causes the first capacitor and the second capacitor to be connected. A capacitance value of the first capacitor in the output mode is set to be lower than the capacitance value in the sampling mode.
    Type: Application
    Filed: September 6, 2007
    Publication date: June 25, 2009
    Inventors: Atsushi Yoshizawa, Sachio Iida
  • Publication number: 20090140955
    Abstract: A light-emitting element that comprises a light emission layer that is deposited between first and second electrodes that lie opposite one another in parallel, an organic semiconductor layer that is deposited between the light emission layer and the first electrode, and an auxiliary electrode that is disposed via an insulation layer on the opposite side of the face of the first electrode opposite the second electrode, the light-emitting element further comprising a third electrode that is disposed inside the organic semiconductor layer.
    Type: Application
    Filed: October 12, 2006
    Publication date: June 4, 2009
    Applicants: PIONEER CORPORATION, DAI NIPPON PRINTING CO., LTD., NEC CORPORATION
    Inventors: Kenji Nakamura, Takuya Hata, Atsushi Yoshizawa, Katsunari Obata, Hiroyuki Endo
  • Publication number: 20090135039
    Abstract: A switched capacitor circuit includes a capacitor that performs sampling, a first switch that is provided between the capacitor and an input terminal, and a second switch that is provided between the capacitor and an output terminal. The first switch and the second switch receive an input of a clock signal and turn on and off. The capacitor is a variable capacitance element in which the value of the capacitance changes in synchronization with the clock signal.
    Type: Application
    Filed: November 18, 2008
    Publication date: May 28, 2009
    Inventors: Sachio Iida, Atsushi Yoshizawa
  • Publication number: 20090135105
    Abstract: A light-emitting element comprises an auxiliary electrode provided on a substrate; an insulating layer provided on the auxiliary electrode; a first electrode supported by the insulating layer; a carrier injection layer made of an organic conductive material having carrier injecting property, and making contact with the first electrode; a light emission layer supported by the carrier injection layer; and a second electrode supported by the light emission layer, and a carrier dispersion layer having lower resistance than the carrier injection layer is provided between the carrier injection layer and the light emission layer. With this arrangement, a light-emitting element having good light emission characteristics in-a pixel is provided.
    Type: Application
    Filed: October 12, 2006
    Publication date: May 28, 2009
    Applicant: Pioneer Corporation
    Inventors: Kenji Nakamura, Takuya Hata, Atsushi Yoshizawa
  • Publication number: 20090134938
    Abstract: A charge domain filter circuit includes a first signal output portion, at least one second signal output, portion, a third signal output portion, and an adder portion. The first signal output portion outputs a first signal that is sampled at a specified time interval. Each second signal, output portion outputs a second signal that is sampled after a specified delay after the first signal is sampled. Where a plurality of the second signal output portions is included, the second signals are sampled in succession. The third signal output portion outputs a third signal that is sampled after a specified delay after the last second signal is sampled. The adder portion adds the first, second, and third signals together and outputs the result. The capacitance ratio of the sampling capacitors in the first signal output portion and the second signal output portion is one of continuously or discretely varied.
    Type: Application
    Filed: November 18, 2008
    Publication date: May 28, 2009
    Inventors: Sachio IIDA, Atsushi Yoshizawa
  • Publication number: 20090134916
    Abstract: A charge domain filter circuit includes a first signal output portion, a second signal output portion, and an adder portion. The first signal output portion outputs a first signal that is sampled at a specified time interval. The second signal output portion outputs a second signal that is sampled at the same time interval as the first signal and at a different time. The adder portion adds the first signal and the second signal together and outputs the result. The second signal output portion is capable of selecting the time to sample the second signal from among a plurality of times.
    Type: Application
    Filed: November 18, 2008
    Publication date: May 28, 2009
    Inventors: Sachio IIDA, Atsushi YOSHIZAWA
  • Publication number: 20090072734
    Abstract: It is an object to provide an organic EL display device having the organic transistor of less performance deterioration, a method of manufacturing the organic EL display device, an organic transistor, and a method of manufacturing the organic transistor. The organic EL display device P1 covers the organic transistor 50 and has a protection film 20 protecting the organic transistor. Between the protection film 20 and the surface of the organic transistor 50, a conductive layer (an negative electrode of the organic EL element 100) 18 having conductivity is formed and an insulation film 72 insulating the surface of the organic transistor 50 and the conductive layer 18 is formed on the side of the surface of the organic transistor 50 but the conductive layer 18.
    Type: Application
    Filed: March 24, 2006
    Publication date: March 19, 2009
    Applicant: PIONEER CORPORATION
    Inventors: Chihiro Harada, Takashi Chuman, Satoru Ohta, Atsushi Yoshizawa
  • Patent number: 7489174
    Abstract: A dynamic flip-flop circuit which outputs an output signal on which a digital data signal is reflected based on a clock, includes: a first control stage configured to output a signal having a level inverted from that of the digital data signal within a period within which the clock has a second level; a second control stage configured to output a signal of a first level within the period within which the clock has the second level and a signal of a level within another period within which the clock has the first level; a third control stage configured to output an output signal of the first level within a period within which the signal outputted from the second control stage has the second level; and a phase adjustment circuit configured to adjust the phase to produce a second clock and supply the second clock to the third control stage.
    Type: Grant
    Filed: February 23, 2007
    Date of Patent: February 10, 2009
    Assignee: Sony Corporation
    Inventor: Atsushi Yoshizawa
  • Publication number: 20090021297
    Abstract: There is provided a signal processing apparatus including a variable capacitor and a switching portion for switching the circuit mode between a sampling mode, in which the variable capacitor samples an input signal, a holding mode, in which a charge gained by sampling the input signal is held in the variable capacitor, and an output mode for outputting the charge stored in the variable capacitor, wherein the variable capacitor is provided with an input terminal through which the input signal is inputted in the sampling mode, a control terminal to which a first control signal which decreases the capacitance of the variable capacitor to a value below the capacitance in the sampling mode is inputted in the output mode, and a second control signal having a predetermined reference voltage is inputted in the holding mode, where an insulating layer is provided between the control terminal and the input terminal.
    Type: Application
    Filed: July 16, 2008
    Publication date: January 22, 2009
    Inventors: Atsushi Yoshizawa, Sachio Iida
  • Publication number: 20090015306
    Abstract: There is provided a signal generating apparatus including: a multiphase oscillating portion for generating a number of base signals having the same frequency and a predetermined phase difference of which the signal level transitions between a first level and a second level, and where periods during which the signal level of any given base signal is at the first level and the signal level of the next base signal having the predetermined phase delay relative to the given base signal is at the first level overlap; and a transition time point changing portion for generating a pulse signal by changing the time point when each base signal transitions from the first level to the second level to a time point before the next base signal transitions from the second level to the first level.
    Type: Application
    Filed: July 11, 2008
    Publication date: January 15, 2009
    Inventors: Atsushi YOSHIZAWA, Sachio Iida
  • Patent number: 7469134
    Abstract: In order to avoid disappearance of output symbols in accompaniment with DC voltage fluctuations occurring at the timing of switching gain in receiving systems for mobile telephones or the like compatible with W-CDMA systems, the present invention provides a variable gain amplifier circuit, a gain control circuit and a mobile communication terminal apparatus, in which a PGA section is comprised of PGAs having different amplification widths continuously arranged in plural stages as in, two coarse adjustment PGAs, a fine adjustment PGA and a coarse adjustment PGA from the input side to the output side; and a gain control circuit has a memory storing a history of gain control with regard to the PGA section and a logic circuit individually controlling gain of each PGA.
    Type: Grant
    Filed: November 29, 2004
    Date of Patent: December 23, 2008
    Assignee: Sony Ericsson Mobile Communications Japan, Inc.
    Inventors: Atsushi Yoshizawa, Masahisa Tamura
  • Patent number: 7355563
    Abstract: A display apparatus (1) for generating a stereoscopic image by superimposing a plurality of images at a predetermined interval from each other on the view line of the viewer, the apparatus comprising: a first display unit (11) having a plurality of emission areas (11-1) for emitting a light, disposed in a discrete manner in a plane of a display screen and a plurality of transmission areas (11-2) for transmitting a light, disposed in a discrete manner in the plane of the display screen except for areas occupied by said plurality of emission areas; and a second display unit (12) disposed behind the first display unit as seen from the viewer.
    Type: Grant
    Filed: January 22, 2004
    Date of Patent: April 8, 2008
    Assignee: Pioneer Corporation
    Inventors: Takuya Hata, Takashi Chuman, Yoshihiko Uchida, Hideo Satoh, Atsushi Yoshizawa
  • Patent number: 7345658
    Abstract: A three-dimensional image display device including at least one transmissive light-emitting display panel and a second light-emitting display panel located behind the transmissive panel. The transmissive panel has a plurality of light-emitting portions arranged in two dimensions and classified into plural linear groups. The transmissive panel has a plurality of bus lines each of which is connected to and overlapping with the light-emitting portions in per group. Each light-emitting portion includes a light-emitting layer made of an organic compound exhibiting electroluminescence. Each overlapped portion of the bus line has an area equal to or smaller than 5% of an area of each of the light-emitting portions.
    Type: Grant
    Filed: January 22, 2004
    Date of Patent: March 18, 2008
    Assignee: Pioneer Corporation
    Inventors: Takashi Chuman, Yoshihiko Uchida, Hideo Satoh, Takuya Hata, Atsushi Yoshizawa
  • Publication number: 20070216460
    Abstract: A dynamic flip-flop circuit which outputs an output signal on which a digital data signal is reflected based on a clock, includes: a first control stage configured to output a signal having a level inverted from that of the digital data signal within a period within which the clock has a second level; a second control stage configured to output a signal of a first level within the period within which the clock has the second level and a signal of a level within another period within which the clock has the first level; a third control stage configured to output an output signal of the first level within a period within which the signal outputted from the second control stage has the second level; and a phase adjustment circuit configured to adjust the phase to produce a second clock and supply the second clock to the third control stage.
    Type: Application
    Filed: February 23, 2007
    Publication date: September 20, 2007
    Inventor: Atsushi Yoshizawa
  • Patent number: 7206112
    Abstract: An image display device includes at least one transmissive display panel arranged at different depth positions in a direction normal to a display surface of the image display device. Each of the transmissive display panels includes a light-emitting layer that is sandwiched between a front side transmissive film and a rear side transmissive film. The rear side transmissive film has an interface with a maximum refractive index difference that causes an efficiency of light emitted from the light-emitting layer to become smaller than a front side light emission efficiency in the characteristics of light-emission efficiency, which changes with respect to a film thickness of the transmissive film due to optical interference.
    Type: Grant
    Filed: September 19, 2003
    Date of Patent: April 17, 2007
    Assignee: Pioneer Corporation
    Inventors: Atsushi Yoshizawa, Takashi Chuman, Takuya Hata, Yoshihiko Uchida, Hideo Satoh, Shuuichi Yanagisawa
  • Patent number: 7189480
    Abstract: A mask assembly includes a frame and at least one linear element secured onto the frame. The linear elements define a masking part. The masking part has at least one opening. The openings are made by removing predetermined linear elements from those secured to the frame.
    Type: Grant
    Filed: January 5, 2004
    Date of Patent: March 13, 2007
    Assignee: Pioneer Corporation
    Inventors: Takashi Chuman, Yoshihiko Uchida, Hideo Satoh, Takuya Hata, Atsushi Yoshizawa