Abstract: A radiation-emitting semiconductor chip is disclosed. In an embodiment, a radiation-emitting semiconductor chip includes a semiconductor body configured to generate radiation, a first contact layer having a first contact area for external electrical contacting the semiconductor chip and a first contact finger structure connected to the first contact area, a second contact layer having a second contact area for external electrical contacting the semiconductor chip and a second contact finger structure connected to the second contact area, wherein the first contact finger structure and the second contact finger structure overlap in places, a current distribution layer electrically conductively connected to the first contact layer, a connection layer electrically conductively connected to the first contact layer via the current distribution layer and an insulation layer arranged in places between the connection layer and the current distribution layer, wherein the insulation layer has at least one opening.

Abstract: An optoelectronic semiconductor component comprises a first semiconductor layer of a first conductivity type having a first main surface and a second semiconductor layer of a second conductivity type arranged on a side facing away from the first main surface of the first semiconductor layer. The optoelectronic semiconductor component further comprises, on the side of the first main surface, a first current spreading structure electrically connected to the first semiconductor layer and a second current spreading structure electrically connected to the second semiconductor layer. The optoelectronic semiconductor component furthermore includes a dielectric mirror layer arranged on the side of the first main surface of the first semiconductor layer and on a side of the first or second current spreading structure facing away from the first semiconductor layer. At least one of the first and second current spreading structures contains silver.

Abstract: An optoelectronic semiconductor chip includes a semiconductor layer sequence having an active region arranged between first and second semiconductor layers; a first contact and a second contact for external electrical contacting of the semiconductor chip; first and second terminal layer regions, via which the first and second contacts electrically conductively connect to the first and second semiconductor layers; and a first insulation layer and a second insulation layer; wherein the first terminal layer region and the second terminal layer region are each arranged in some areas between the first insulation layer and the second insulation layer in a vertical direction perpendicular to a main extension plane of the active region; the first terminal layer region and the second terminal layer region are arranged side by side without overlapping; and the first terminal layer region extends in places up to a side surface of the semiconductor chip.

Abstract: A hydrogen fueling system for generating hydrogen on demand is described. The system includes an electrolyzer configured to generate at least a predetermined quantity of hydrogen in a predetermined time when operated at no less than a predetermined current density and provided with at least a predetermined electrical energy over the predetermined time, where the predetermined quantity of hydrogen is at least 1 kg of hydrogen, the predetermined time is no more than 30 minutes, and the predetermined current density is at least 5 A/cm2. The system may further include an electrical energy storage system electrically connected to the electrolyzer and capable of supplying at least 20% of the predetermined electrical energy over the predetermined time. The electrolyzer may include an anode including a plurality of acicular particles dispersed in an ionomer binder, where the acicular particles include iridium.

Abstract: An optoelectronic semiconductor chip may include a semiconductor layer sequence having at least one n-doped semiconductor layer, at least one p-doped semiconductor layer, and an active layer arranged between the at least one n-doped semiconductor layer and the at least one p-doped semiconductor layer. A p-terminal contact may be electrically contacted to the p-doped semiconductor layer. An n-terminal contact may be electrically contacted to the n-doped semiconductor layer. The n-terminal contact may be arranged in direct contact with the p-doped semiconductor layer at least in regions.

Abstract: Optoelectronic components may include a semiconductor layer sequence on an auxiliary carrier where the sequence includes at least one n-doped layer, at least one p-doped layer, and an active layer therebetween. A first insulation layer is arranged over a surface of the n-doped layer. A first and second metallization are arranged for contacting the p-doped and n-doped layers, and the metallizations are connected to each other. The first and second metallizations are spatially separated from one another. A second insulation layer electrically insulates the first and second metallizations.

Abstract: A radiation-emitting semiconductor chip includes a substrate; an epitaxial semiconductor layer sequence having an active zone that generates electromagnetic radiation of a first wavelength range, wherein the substrate is transparent to electromagnetic radiation of the active zone; and an optically active layer arranged on a side surface of the substrate and on a rear main surface of the semiconductor chip, which lies opposite to a radiation exit surface of the semiconductor chip.

Abstract: An optoelectronic semiconductor chip includes a contact layer that impresses current directly into a first semiconductor region present in direct contact with a current web, the first semiconductor region is an n-side and a second semiconductor region is a p-side of a semiconductor layer sequence, and a second mirror layer is applied directly to a second semiconductor region, a plurality of contact fields and isolator fields are arranged alternately along a longitudinal direction of the current web, in the contact fields, the contact layer is in direct contact with the current web, and the isolator fields are free of the contact layer, and a first mirror layer is located between the current web and the first semiconductor region.

Abstract: An optoelectronic semiconductor chip includes a semiconductor layer sequence, a transparent substrate, at least one contact trench, at least one insulating trench, at least one current distribution trench, at least in the insulating trench, an electrically insulating mirror layer that reflects radiation generated in an active layer, at least one metallic current web in the contact trench configured for a current conduction along the contact trench and supplying current to a first semiconductor region, and at least one metallic busbar in the current distribution trench that energizes a second semiconductor region, wherein the contact trench, the isolating trench and the current distribution trench extend from a side of the second semiconductor region facing away from the substrate through the active layer into the first semiconductor region, and the contact trench is completely surrounded by the insulating trench, and the current distribution trench lies only outside the insulating trench.

Abstract: A radiation-emitting semiconductor chip may include a semiconductor body having a first layer, a second layer, and an active layer therebetween. The active layer may be subdivided into a multiplicity of segments in a plan view of the chip. A separating structure may be formed in the semiconductor body between neighboring segments. The multiplicity of segments may be electrically connected to one another in series and/or in parallel. At least one segment may be assigned a first contact layer having a first contact finger structure and a second contact layer having a second contact finger structure. There may be a direct electrical contact between the first contact layer and the second contact layer in places.

Abstract: An optoelectronic semiconductor chip may include a semiconductor layer sequence provided for generating and/or receiving radiation. The chip may further include a first trench structure and a second trench structure formed in the semiconductor layer sequence. A first contact finger structure may electrically conductively connect the second trench structure to a first semiconductor layer of the semiconductor layer sequence. The first contact finger structure may adjoin a first side surface and/or a second side surface of the second trench structure at least in places. A second contact finger structure may electrically conductively connect to a second semiconductor layer of the semiconductor layer sequence where the second contact finger may be arranged in the first trench structure.

Abstract: A method for producing an optoelectronic semiconductor chip is specified, wherein a method step A) involves providing a semiconductor layer stack comprising a semiconductor layer of a first type, a semiconductor layer of a second type and an active layer arranged between the semiconductor layer of the first type and the semiconductor layer of the second type. Furthermore, the method comprises in a method step B) forming a mesa structure in the semiconductor layer of the first type, the semiconductor layer of the second type and the active layer. The method furthermore comprises in a method step C) applying a passivation layer to the mesa structure by means of vapour deposition or sputtering.

Abstract: A water electrolyzer comprising a membrane comprising at least one of metallic Pt or Pt oxide, a cathode, and an anode. The cathode comprises a first catalyst consisting essentially of both metallic Pt and Pt oxide. The anode comprising a second catalyst comprising at least 95 percent by weight of collectively metallic Ir and Ir oxide present, calculated as elemental Ir, based on the total weight of the second catalyst.

Abstract: An optoelectronic semiconductor chip includes a semiconductor layer sequence having an active region arranged between first and second semiconductor layers; a first contact and a second contact for external electrical contacting of the semiconductor chip; first and second terminal layer regions, via which the first and second contacts electrically conductively connect to the first and second semiconductor layers; and a first insulation layer and a second insulation layer; wherein the first terminal layer region and the second terminal layer region are each arranged in some areas between the first insulation layer and the second insulation layer in a vertical direction perpendicular to a main extension plane of the active region; the first terminal layer region and the second terminal layer region are arranged side by side without overlapping; and the first terminal layer region extends in places up to a side surface of the semiconductor chip.

Abstract: Water electrolyzer comprising a membrane having first and second opposed major surfaces, a thickness extending between the first and second major surfaces, and first, second, and third regions equally spaced across the thickness, wherein the first region is the closest region to the first major surface, wherein the second region is the closest region to the second major surface, wherein the third region is located between the first and second regions, wherein the first and third regions are each essentially free of both metallic Pt and Pt oxide, and wherein the second region comprises at least one of metallic Pt or Pt oxide; a cathode comprising a first catalyst on the first major surface of the membrane; and an anode comprising a second catalyst on the second major surface of the membrane.

Abstract: The invention relates, inter alia, to a method for producing a plurality of semiconductor chips, the method comprising the following steps: providing a substrate (1); applying a semiconductor layer sequence (2) to the substrate (1); generating a plurality of recesses (6) in the semiconductor layer sequence (2) on the side of the semiconductor layer sequence (2) that is facing away from the substrate (1); detaching the substrate (1) from the semiconductor layer sequence (2); thinning the semiconductor layer sequence (2) on the side that was facing the substrate (1) prior to detaching the substrate (1).

Abstract: An optoelectronic semiconductor chip includes a contact layer that impresses current directly into a first semiconductor region present in direct contact with a current web, the first semiconductor region is an n-side and a second semiconductor region is a p-side of a semiconductor layer sequence, and a second mirror layer is applied directly to a second semiconductor region, a plurality of contact fields and isolator fields are arranged alternately along a longitudinal direction of the current web, in the contact fields, the contact layer is in direct contact with the current web, and the isolator fields are free of the contact layer, and a first mirror layer is located between the current web and the first semiconductor region.

Abstract: An optoelectronic semiconductor chip includes a semiconductor layer sequence, a transparent substrate, at least one contact trench, at least one insulating trench, at least one current distribution trench, at least in the insulating trench, an electrically insulating mirror layer that reflects radiation generated in an active layer, at least one metallic current web in the contact trench configured for a current conduction along the contact trench and supplying current to a first semiconductor region, and at least one metallic busbar in the current distribution trench that energizes a second semiconductor region, wherein the contact trench, the isolating trench and the current distribution trench extend from a side of the second semiconductor region facing away from the substrate through the active layer into the first semiconductor region, and the contact trench is completely surrounded by the insulating trench, and the current distribution trench lies only outside the insulating trench.

Abstract: A radiation-emitting semiconductor chip is disclosed. In an embodiment, a radiation-emitting semiconductor chip includes a semiconductor body configured to generate radiation, a first contact layer having a first contact area for external electrical contacting the semiconductor chip and a first contact finger structure connected to the first contact area, a second contact layer having a second contact area for external electrical contacting the semiconductor chip and a second contact finger structure connected to the second contact area, wherein the first contact finger structure and the second contact finger structure overlap in places, a current distribution layer electrically conductively connected to the first contact layer, a connection layer electrically conductively connected to the first contact layer via the current distribution layer and an insulation layer arranged in places between the connection layer and the current distribution layer, wherein the insulation layer has at least one opening.

Abstract: An optoelectronic semiconductor chip is disclosed. In an embodiment the chip includes at least one n-doped semiconductor layer, at least one p-doped semiconductor layer and an active layer arranged between the at least one n-doped semiconductor layer and the at least one p-doped semiconductor layer, wherein the p-doped semiconductor layer is electrically contacted by a p-type connection contact, wherein a first trench extending at least partially into the p-doped semiconductor layer is arranged below the p-type connection contact, wherein an electrically insulating first blocking element arranged at least partially below the p-type connection contact and at least partially within the trench is arranged at least between the n-doped semiconductor layer and the p-type connection contact, and wherein the electrically insulating first blocking element is configured to prevent a direct current flow between the p-type connection contact and the p-doped and n-doped semiconductor layers and the active layer.