Abstract: A high power semiconductor rectifier is constructed so that the rectifier is normally off and can be switched on by applying a bias signal to a gate of a metal-insulator-semiconductor structure monolithically integrated with the rectifier in such a manner as to induce a conducting channel between the anode and cathode of the rectifier. The device has both forward and reverse blocking capability and a low forward voltage drop when in the conducting state. The device has a very high turn-off gain and both high dV/dt and di/dt capabilities.

Abstract: A high power bipolar transistor device includes an integral antisaturation Schottky diode resulting from direct contact between the metallic base electrode and the collector region of the transistor. The barrier height of the Schottky diode is chosen so that it turns on at a slightly lower voltage than the collector-base voltage at saturation and diverts excess drive current away from the base to prevent the transistor from becoming fully saturated. The integral Schottky diode may also be used to prevent latch-up in a thyristor device or in a parasitic thyristor which forms part of an insulated gate transistor.

Abstract: A power semiconductor device which comprises either a bipolar transistor or a MOSFET, incorporates an integral Schottky diode in antiparallel connection with the transistor for conducting reverse current through the power semiconductor device. By fabricating the diode to exhibit a lower turn-on voltage, than the P-N junction at the base and collector interface in the bipolar transistor, or at the base and drift layer interface in the MOSFET, the power semiconductor device, when in the reverse conduction mode, exhibits excellent reverse recovery characteristics and without forward voltage overshoot transients.

Abstract: A depletion mode thyristor includes a plurality of regenerative segments and a plurality of non-regenerative segments, each of which is elongated in a first direction. Regenerative and non-regenerative segments are interleaved in a second direction perpendicular to said first direction. A plurality of regenerative segments may be disposed between adjacent non-regenerative segments. Adjacent regenerative or non-regenerative segments are spaced apart by gate electrode segments which are effective, upon application of an appropriate bias voltage, for pinching off the regenerative segments to force the current therein to transfer to the non-regenerative segments to turn the device off. This structure enables large quantities of current to be transferred from regenerative segments to non-regenerative segments during turn-off without inducing detrimental current crowding.

Abstract: An insulated field effect semiconductor device having source and drain regions extending to opposed surfaces of its semiconductor body is bidirectional and capable of blocking voltages in either of two opposing polarities and comprises a four terminal device having source and drain electrodes disposed on the opposed surfaces and a base electrode all ohmically connected to corresponding portions of the semiconductor body. An insulated gate is provided in a trench which extends into the semiconductor body for controlling the conductivity of a channel region extending within the base region between the source and drain regions. The device is free of source-to-base and drain-to-base short circuits. Control circuits enable this device to conduct or block both polarities of a high current AC voltage applied across its source and drain terminals while preventing undesired avalanche breakdown within the device.

Abstract: A lateral depletion mode thyristor has both of its power electrodes and both of its emitter regions extending to the same surface of the semiconductor wafer. The device operates with both a regenerative current path and a non-regenerative current path. An insulated gate electrode structure is disposed in a trench and configured to pinch off the regenerative current path to force the current flowing therein to transfer to the non-regenerative current path, thereby interrupting the regenerative action within the device and causing it to turn off. In some embodiments, a second insulated gate electrode controls device turn-on.

Abstract: A high voltage P-N diode includes a P.sup.- substrate with a thin N.sup.- epitaxial layer thereon. An N.sup.+ cathode region extends into the N.sup.- epitaxial layer from the upper surface thereof. A P.sup.+ anode region extends into the N.sup.- epitaxial layer from its upper surface and surrounds the N.sup.+ cathode region. An N.sup.+ buried layer is situated between the P.sup.- substrate and the N.sup.- epitaxial layer, beneath the P.sup.+ anode region, and surrounds the N.sup.+ cathode region, as viewed from above. A further P.sup.+ region extends into the N.sup.- epitaxial layer from its upper surface and surrounds the N.sup.+ cathode region, and, in turn, is surrounded by the P.sup.+ anode region. In an exemplary embodiment, a MOSFET is included to alternately connect the further P.sup.+ region to the P.sup.- substrate and to open circuit the further P.sup.+ region. With the further P.sup. + region open circuited, the P-N diode has a low on-resistance when it operates in its current-conducting state.

Abstract: An improved lateral insulated gate transistor includes a dual function anode and employs specially configured anode and cathode regions within the drift layer to promote lateral current flow. A vertical diode is disposed between a substrate cathode and anode of the device. Under forward bias conditions, the device exhibits insulated gate controlled conduction, and under reverse bias conditions, the device exhibits conduction between the substrate cathode and anode of the vertical diode.

Abstract: A monolithically integrated reverse conducting lateral insulated gate semiconductor device includes an inherent four layer structure which supplies a sufficient base drive to turn on an inherent lateral transistor under forward bias conditions. Under reverse bias conditions, an inherent five layer structure is activated to provide for high current density low voltage reverse conduction in the device. Forward and reverse current flow can be interrupted by the application of an appropriate bias to the same insulated gate electrode. The disclosed semiconductor device achieves improved current density and concomitantly reduced cell size.

Abstract: A synchronous rectifier is able to operate at higher frequencies and provides an output having lower noise than prior art FET synchronous rectifier system by using field effect switching devices which contain only one conductivity type of semiconductor material and connecting a high speed, low charge storage diode in parallel. Schottky diodes are preferred whereby there is no junction diode in the structure. Conventional FETs may be used when paralleled with a Schottky diode which prevents the FET's parasitic internal diode from becoming conductive.

Abstract: An IGBT and FET are integrated in a common semiconductor body and share common source/emitter, base and drift regions and an insulated gate electrode. The ON-resistance and turn-off time of this device can be controlled by connecting the drain and collector electrodes to one main terminal for the device with a resistor between either the drain region/drift region interface or the collector junction and the main terminal of the device.

Abstract: A self-protected MOS gated device includes a PN junction disposed in an electrical path between the source electrode and the gate contact of the device and integrally formed with a DMOS cell of the device to protect the DMOS cell from surge voltages. The PN junction has conductivity characteristics selected to provide junction breakdown at a predetermined voltage level and at a predetermined location along the junction.

Abstract: A monolithically integrated lateral semiconductor device preferably comprising a pair of inherent transistors driven by an inherent lateral four layer structure is disclosed. The disclosed device includes inherent vertical and lateral bipolar transistors. An inherent lateral four layer structure is also included within the device to provide a sufficient base drive to fully turn on both the lateral and vertical inherent bipolar transistors. The lateral four layer structure can be controlled through an insulated gate.

Abstract: A self aligned method of fabricating a self aligned semiconductor device employs an initial step in which a first window having an inner perimeter and outer perimeter is opened through a first protective layer situated atop a semiconductor substrate, to divide the substrate into three separate zones. The window exposes a first surface portion of the semiconductor substrate and circumferentially defines or encompasses a second central portion of the protective layer as well as a second unexposed surface portion of the substrate. A third surface portion of the substrate lies beyond the outer perimeter of the first window. Precisely aligned substrate regions of the same or different conductivity type can be established by using differentially etchable materials to mask designated surface portions of the substrate.

Abstract: The present invention relates generally to monolithically integrated insulated gate semiconductor devices and more particularly to an improved structure which provides for high current density, low voltage drop conduction in both forward and reverse directions. More particularly, a single insulated gate device can initiate and interrupt current flow in both the forward and reverse directions.

Abstract: A monolithically integrated semiconductor device preferably comprising a thyristor driven transistor is disclosed. The thyristor provides a base drive sufficient to fully turn-on an inherent bipolar transistor and achieve the maximum benefit of bipolar conduction within the semiconductor device. The thyristor can be turned on and off through insulated gate control by decoupling the emitter region of the thyristor from the cathode electrode of the device.

Abstract: An MOS gate turn-off thyristor structure includes non-regenerative (three-semiconductor-layer) portions interspersed with four-semiconductor-layer regenerative (thyristor) portions, gate electrode segments disposed adjacent to relatively narrow portions of the base region within the regenerative portion, and either ohmic contacts or Schottky barrier contacts to the non-regenerative portions. Upon application of an appropriate turn-off gate bias to the gate electrode segments, the base region of the regenerative portion in which they are disposed is pinched off and the current flowing therethrough is derived to flow through the non-regenerative portion of the structure. This interrupts regeneration in the regenerative structure and the device turns off.

Abstract: A power field effect device has a high voltage blocking junction which intersects the device surface under the gate electrode. That intersection is a closed plane geometric figure whose center is within the body region of the device rather than in the more heavily doped base region of the device. The figure preferably is everywhere convex and has a maximum width of substantially less than the depletion width, at breakdown, of a corresponding parallel plane junction. The device breakdown voltage is higher than the breakdown voltage of a corresponding junction having a cylindrical edge with a straight axis. In a preferred embodiment, the high voltage blocking junction has a plurality of such intersections with the device surface, each situated beneath a segment of the gate electrode. In a bipolar embodiment, the gate electrode may be omitted.

Abstract: The present invention relates generally to monolithically integrated gate semiconductor devices and more particularly, to improved semiconductor structures in which the parasitic four layer structure has been modified to avoid the possibility that non-preferred turn-on can occur. The length of the emitter region is reduced to thereby reduce the length of the base emitter junction and the magnitude of the IR voltage drop than can occur along that junction. Further, high density shorts are provided along that junction to prevent the parasitic four layer structure from functioning in a non-preferred latched or regenerative conducting mode. In an alternate embodiment, the parasitic four layer structure has been eliminated. Accordingly, insulated gate control of the device is preserved.

Abstract: A power field effect device has a gate grid having a plurality of elongate openings therein through which a base region forming a high voltage blocking junction with the underlying body was diffused. The openings have round ends in order to prevent the formation of spherical portions in the high voltage blocking junction. The round ends of adjacent openings are positioned close enough to each other that their diffusion regions merge, thereby raising the device breakdown voltage to that of the cylindrical junction portion along the straight edges of the junction. In an alternative embodiment, the openings do not have round ends and are positioned close enough together that their diffusions merge end to end.