Abstract: Disclosed examples include integrated circuits with a leadframe structure, a first circuit structure including a light source configured to generate a light signal along an optical path, a second circuit structure including a light sensor facing the optical path to receive the light signal, and a molded package structure enclosing portions of the leadframe structure, the molded package structure having a cavity defined by an interior surface of the molded package structure, the optical path extending in the cavity between the first and second circuit structures.

Abstract: In described examples of forming an integrated circuit wave device, a method includes: (a) affixing an integrated circuit die relative to a substrate; (b) creating a form relative to the integrated circuit die and the substrate; and (c) forming a wave shaping member having a shape conforming at least in part to a shape of the form.

Abstract: In a described example, an apparatus includes: an integrated circuit die having multiple terminals; a leadframe having leads for external connections, at least some of the leads electrically coupled to at least one of the multiple terminals of the integrated circuit die; a first electrode having a first end portion; a second electrode having a second end portion positioned proximal to and spaced apart from the first end portion of the first electrode, the first end portion and the second end portion spaced by a spark gap; encapsulation material surrounding the integrated circuit die to form a packaged integrated circuit having a cavity surrounding the first end portion, the second end portion, and the spark gap so that the first end portion of the first electrode, the second end portion of the second electrode and the spark gap are spaced from the encapsulation material.

Abstract: Disclosed examples include integrated circuits with a leadframe structure, a first circuit structure including a light source configured to generate a light signal along an optical path, a second circuit structure including a light sensor facing the optical path to receive the light signal, and a molded package structure enclosing portions of the leadframe structure, the molded package structure having a cavity defined by an interior surface of the molded package structure, the optical path extending in the cavity between the first and second circuit structures.

Abstract: Disclosed examples include lateral photovoltaic sensors and systems with one or more semiconductor structures individually including a lateral sensor face to receive photons of a given wavelength, and an extended lateral junction region having an effective junction distance greater than 5 times an absorption depth for the semiconductor structure that corresponds to the given wavelength, to facilitate high current transfer ratios for use in low-noise, high-efficiency power supply applications as well as optically isolated data transfer or photon detector applications.

Abstract: Disclosed examples include sensor apparatus and integrated circuits having a package structure with an internal cavity and an opening that connects of the cavity with an ambient condition of an exterior of the package structure, and an electronic sensor structure mechanically supported by wires in the cavity and including a sensing surface exposed to the cavity to sense the ambient condition of an exterior of the package structure.

Abstract: A method of forming, and a resulting, an integrated circuit wave device. The method (i) affixes an integrated circuit die relative to a substrate; (ii) creates a form relative to the integrated circuit die and the substrate; and (iii) forms a wave shaping member having a shape conforming at least in part to a shape of the form.

Abstract: In described examples, an apparatus includes: an integrated circuit die having multiple terminals; the integrated circuit die positioned on a die pad portion of a leadframe having leads for external connections, at least some of the leads having an inner portion electrically coupled to at least one terminal of the integrated circuit die; a fuse element coupled between one of the leads of the leadframe and at least one terminal selected from the multiple terminals of the integrated circuit die; and encapsulation material surrounding the integrated circuit die and the leadframe to form a packaged integrated circuit including the integrated circuit die and the fuse element, and having a cavity in the encapsulation material surrounding the fuse element such that the fuse element is spaced from the encapsulation material.

Abstract: An integrated circuit having a body comprised of semiconducting material has one or more electronic components formed in a first region of the body and at least another electronic component formed in the second region of the body. A thermal barrier separates the two regions. By one approach that thermal barrier comprises a gap formed in the body. The gap may comprise an air gap or may be partially or wholly filled with material that inhibits thermal conduction. The thermal barrier may at least substantially surround the aforementioned second region. The second region may also include one or more temperature sensors disposed therein. A temperature control circuit may use the corresponding temperature information from within the second region to actively control the second region temperature using a temperature forcing element that is disposed at least proximal to the second region.

Abstract: Integrated circuits with a molded package including a cavity and a semiconductor die spaced from an interior surface of the molded package within the cavity. The semiconductor die includes one or more electrical components, a thermal control component to control the temperature of the electrical component, and a driver to provide a current or voltage signal to the thermal control component at least partially according to a setpoint signal.

Abstract: A thermoelectric device is disclosed which includes metal thermal terminals protruding from a top surface of an IC, connected to vertical thermally conductive conduits made of interconnect elements of the IC. Lateral thermoelectric elements are connected to the vertical conduits at one end and heatsinked to the IC substrate at the other end. The lateral thermoelectric elements are thermally isolated by interconnect dielectric materials on the top side and field oxide on the bottom side. When operated in a generator mode, the metal thermal terminals are connected to a heat source and the IC substrate is connected to a heat sink. Thermal power flows through the vertical conduits to the lateral thermoelectric elements, which generate an electrical potential. The electrical potential may be applied to a component or circuit in the IC. The thermoelectric device may be integrated into an IC without adding fabrication cost or complexity.

Abstract: A thermoelectric device is disclosed which includes metal thermal terminals protruding from a top surface of an IC, connected to vertical thermally conductive conduits made of interconnect elements of the IC. Lateral thermoelectric elements are connected to the vertical conduits at one end and heatsinked to the IC substrate at the other end. The lateral thermoelectric elements are thermally isolated by interconnect dielectric materials on the top side and field oxide on the bottom side. When operated in a generator mode, the metal thermal terminals are connected to a heat source and the IC substrate is connected to a heat sink. Thermal power flows through the vertical conduits to the lateral thermoelectric elements, which generate an electrical potential. The electrical potential may be applied to a component or circuit in the IC. The thermoelectric device may be integrated into an IC without adding fabrication cost or complexity.

Abstract: A thermoelectric device is disclosed which includes metal thermal terminals protruding from a top surface of an IC, connected to vertical thermally conductive conduits made of interconnect elements of the IC. Lateral thermoelectric elements are connected to the vertical conduits at one end and heatsinked to the IC substrate at the other end. The lateral thermoelectric elements are thermally isolated by interconnect dielectric materials on the top side and field oxide on the bottom side. When operated in a generator mode, the metal thermal terminals are connected to a heat source and the IC substrate is connected to a heat sink. Thermal power flows through the vertical conduits to the lateral thermoelectric elements, which generate an electrical potential. The electrical potential may be applied to a component or circuit in the IC. The thermoelectric device may be integrated into an IC without adding fabrication cost or complexity.

Abstract: A thermoelectric device is disclosed which includes metal thermal terminals protruding from a top surface of an IC, connected to vertical thermally conductive conduits made of interconnect elements of the IC. Lateral thermoelectric elements are connected to the vertical conduits at one end and heatsinked to the IC substrate at the other end. The lateral thermoelectric elements are thermally isolated by interconnect dielectric materials on the top side and field oxide on the bottom side. When operated in a generator mode, the metal thermal terminals are connected to a heat source and the IC substrate is connected to a heat sink. Thermal power flows through the vertical conduits to the lateral thermoelectric elements, which generate an electrical potential. The electrical potential may be applied to a component or circuit in the IC. The thermoelectric device may be integrated into an IC without adding fabrication cost or complexity.

Abstract: A detection system to detect disconnection of a powered device from a link of a power over Ethernet system is disclosed. The detection system can include closed-loop control configured to supply a predetermined test current to an electrically conductive path that includes at least a portion of the link via which the powered device is connectable for receiving power. A detector is configured to monitor the closed-loop control, the loop detector providing a disconnect signal if the closed-loop control is outside of expected operating parameters, thereby indicating that the powered device has been disconnected from the link.

Abstract: An integrated circuit (IC) includes a heated portion. The heated portion/IC includes a substrate having a topside semiconductor surface having circuitry configured to provide a circuit function. A pre-metal dielectric (PMD) layer is on the topside semiconductor surface. A metal interconnect stack is on the PMD. A trim portion includes one or more temperature sensitive circuit components which affect a temperature behavior of the IC. The heated portion extends over and beyond an area of the trim portion having an integrated heating structure including at least a first heater formed from a metal interconnect level that includes a first plurality of winding segments which have a varying pitch. A heat spreader formed from a second metal interconnect layer is between trim portion and the first heater. Thermal plugs are lateral to the temperature sensitive circuit components and thermally couple the heat spreader to the topside semiconductor surface.

Abstract: A detection system to detect disconnection of a powered device from a link of a power over Ethernet system is disclosed. The detection system can include closed-loop control configured to supply a predetermined test current to an electrically conductive path that includes at least a portion of the link via which the powered device is connectable for receiving power. A detector is configured to monitor the closed-loop control, the loop detector providing a disconnect signal if the closed-loop control is outside of expected operating parameters, thereby indicating that the powered device has been disconnected from the link.

Abstract: Devices, systems, and methods for providing an on-chip, temperature-stable resistance network for generating a precision current or precision resistance are disclosed. The resistance network includes a first resistance material having a linear, negative temperature coefficient of resistance and a second resistance material having a linear, positive temperature resistance. The first and second resistance materials are arrayed in segments proximate to a local, pulsed thermal gradient and are combined or mixed, i.e., trimmed, to provide a zero or near zero thermal coefficient.

Abstract: Inter-integrated circuit-capable devices for use on an inter-integrated circuit bus are disclosed. The inter-integrated circuit-capable devices include integrated, internally-configurable addressing registers in place of external pins. Cascaded systems of inter-integrated circuit-capable devices for easier addressing are also disclosed as are methods for writing address identifier codes to addressing registers of the cascaded, inter-integrated circuit-capable devices.

Abstract: A method for characterizing a load on a data line includes the steps of: (A) Applying at least three successive voltages to the data line. Each respective odd-numbered successive voltage of the at least three successive voltages has substantially a first voltage value displaced a first voltage interval from a reference voltage value. Each respective even-numbered successive voltage of the at least three successive voltages has substantially a second voltage value displaced a second voltage interval from the reference voltage value. (B) Measuring a respective current value on the data line while each of the at least three successive voltages is applied to the data line. (C) Comparing the respective current values for selected successive voltages of the at least three successive voltages to determine whether a hysteric impedance change occurs when voltage on the data line is varied.