Abstract: A method of managing system resources managing resource utilization for a system board that includes a plurality of processors, memory associated with each of the processors, a plurality of voltage regulators configured to regulate voltages applied to the processors and memories, and a board manager configured to manage resources of the system board includes communicating operating condition information from the board manager to controllers of the voltage regulators independent of the processors also communicating with the controllers, the operating condition information received by each controller indicating a computing load for the processor regulated by the voltage regulator controlled by that controller.

Abstract: A switched mode power converter includes a power stage, a main compensator, and a voltage ramp circuit. The power stage is operable to output a voltage to a load. The main compensator is operable to control switching of the power stage so that the voltage output by the power stage corresponds to a target voltage indicated to the switched mode power converter. The voltage ramp circuit includes a voltage ramp generator and a dynamic voltage transition compensation circuit. The voltage ramp generator is operable to generate a voltage ramp that starts at a first voltage corresponding to the target voltage and ends at a second voltage corresponding to a new target voltage. The dynamic voltage transition compensation circuit is responsive to the voltage ramp generator and operable to modify the output voltage response of the switched mode power converter based on one or more compensation parameters.

Abstract: A power stage of a voltage regulator includes a first switch for connecting a load to a supply voltage in a first switching state of the power stage, a second switch for connecting the load to ground in a second switching state of the power stage and driver circuitry for setting the power stage in the first switching state, the second switching state or a non-switching state in which both switches are off responsive to a switching control signal received by the power stage. A power management unit moves the power stage from a nominal power mode to a first low power mode if the power stage is in the non-switching state for a predetermined time period.

Abstract: Methods and apparatus for a power supply according various aspects of the present invention operate in conjunction with a voltage converter for converting an input voltage to an output voltage. For example, the converter may comprise an output controller configured to generate a control signal, a power mode controller, and an integrated power stage. The power stage may include a multiple switch segments coupled in parallel between the input voltage and the output, and a driver circuit responsive to the output controller and the power mode controller and connected to the switch segments. The driver circuit controls the switch segments according to the control signal to activate the switch segments in the switch circuit. The driver circuit also disables one or more of the switch segments according to the power mode signal to permit reduced power delivery and demand states.

Abstract: A switching power converter includes a phase operable to deliver a phase current to a load through an inductor. The phase current has an expected sawtooth or triangular ripple pattern. The switching power converter further includes a measuring unit operable to measure the phase current at two or more different points of a switching cycle during which the phase is turned on over a first interval of the switching cycle and turned off over a second interval of the switching cycle. The switching power converter also includes an analysis unit operable to determine whether the phase is faulty based on the phase current measurements taken at the two or more different points of the switching cycle. A corresponding method of detecting a phase fault in a switching power converter is also provided.

Abstract: A DC-DC converter includes a substrate having opposing first and second sides, a power stage attached to the first side of the substrate and having active semiconductor components operable to provide an output phase of the DC-DC converter, an inductor attached to the first side of the substrate and electrically connected to the power stage through a first metal trace at the first side of the substrate, and a plurality of electrically conductive vias extending through the substrate from the first side to the second side. The vias are electrically connected to the first metal trace. At least some of the vias are disposed at least partly under the power stage. A corresponding method of assembling such a DC-DC converter also is disclosed.

Abstract: A DC-DC converter includes a substrate having opposing first and second sides, a first discrete power stage transistor die attached to the first side of the substrate and including a high-side power transistor, and a second discrete power stage transistor die attached to the first side of the substrate and including a low-side power transistor electrically connected to the high-side power transistor to form an output phase of the DC-DC converter. The DC-DC converter further includes an inductor attached to the first side of the substrate so as to electrically connect the output phase to a metal output trace on the substrate. The inductor at least partly covers at least one of the first and the second discrete power stage transistor dies.

Abstract: A multi-phase DC-DC converter includes a substrate having opposing first and second sides, a plurality of power stage packages attached to the first side of the substrate, each power stage package including active semiconductor components operable to provide an output phase of the multi-phase DC-DC converter, and a coupled inductor attached to the first side of the substrate and at least partly covering two or more of the power stage packages. The coupled inductor includes separate windings wound on the same core. Each winding of the coupled inductor electrically connects an output of one of the power stage packages at least partly covered by the coupled inductor to a metal trace on the substrate such that the outputs of the power stage packages at least partly covered by the coupled inductor are electrically connected to the same metal trace on the substrate.

Abstract: A switching voltage regulator includes a power stage for delivering output current to a load through an inductor. The power stage has a high-side transistor and a low-side transistor. The switching voltage regulator also includes a controller for setting the power stage in a PFM (pulse frequency modulation) switching mode if the output current decreases below a first threshold. Each period of the PFM switching mode includes an on-time during which the high-side transistor is on and the low-side transistor is off, an off-time during which the low-side transistor is on and the high-side transistor is off and a HiZ-time during which the high-side transistor and the low-side transistor are both off. The controller varies the on-time of the PFM switching mode responsive to a change in the output current.

Abstract: A phase current estimator for a switching power converter includes analog circuitry for generating a phase current estimate error by comparing a phase current of the switching power converter to an analog representation of an estimate of the phase current, the phase current having a sawtooth or triangular waveform. The phase current estimator further includes digital circuitry for revising the phase current estimate based on the phase current estimate error and a plurality of parameters associated with operation of the switching power converter, so that the phase current estimate tracks the sawtooth or triangular waveform of the phase current.

Abstract: A voltage regulator includes a power stage configured to produce an output voltage from an input voltage at an input voltage terminal, a shunt resistor connected in series between the input voltage terminal and the power stage, a first level shifting resistor connected in series between a first terminal of the shunt resistor and a first sense pin of the controller, and a second level shifting resistor connected in series between a second terminal of the shunt resistor and a second sense pin of the controller. The input current of the regulator is sensed as a function of the voltage across the shunt resistor, as shifted down by the level shifting resistors and measured across the sense pins. The input voltage of the regulator is sensed as a function of the current flowing through either one of the level shifting resistors, as measured at one of the sense pins.

Abstract: Methods and apparatus selecting settings for circuits according to various aspects of the present invention may operate in conjunction with a measurement element connected to the circuit. The circuit may include a voltage source adapted to supply a voltage to the measurement element. The voltage may be substantially independent of the characteristics of the measurement element. The circuit may further include a measurement sensor responsive to a current in the measurement element. The measurement sensor may generate a control signal according to the current in the measurement element.

Abstract: A multi-phase switching voltage regulator includes a controller and a plurality of power stages each configured to deliver output current to a load through an inductor. At least one of the inductors has a higher open circuit inductance than the other inductors so that at least one of the power stages has a different output inductance compared to the other power stages. The controller is configured to control switching of the power stages so as to regulate an output voltage of the multi-phase switching voltage regulator, including allowing all of the power stages to provide current to the load through the respective inductors during a full power event at the load and preventing all of the power stages except for the at least one power stage having the higher open circuit inductance from providing current to the load during a low power event at the load.

Abstract: A phase current estimator for a switching power converter includes analog circuitry for generating a phase current estimate error by comparing a phase current of the switching power converter to an analog representation of an estimate of the phase current. The phase current estimator further includes digital circuitry for revising the phase current estimate based on the phase current estimate error and a plurality of parameters associated with operation of the switching power converter. An estimator fault detection unit is provided for determining whether a difference between the phase current and estimate exceeds a threshold for indicating substandard phase current estimation.

Abstract: Methods and apparatus for a power regulator according to various aspects of the present invention may comprise a sensor adapted to generate a measurement of a voltage or a current. A memory may store a correction parameter that corresponds to the measurement, and a correction system may be adapted to adjust the measurement according to the correction parameter.

Abstract: An estimate of voltage regulator input power is provide by estimating output power of the voltage regulator based on output voltage and output current of the voltage regulator, estimating power loss of the voltage regulator and estimating input power of the voltage regulator based on the estimated output power and the estimated power loss.

Abstract: A switching regulator includes a multiphase converter which includes a plurality of main phases configured to covert a power supply voltage to a lower voltage for application to an electronic device at different load conditions. The switching regulator also includes an auxiliary phase configured to operate in a pulse frequency modulation mode during a light load condition so that power is supplied to the electronic device by at least the auxiliary phase during the light load condition.

Abstract: A switching regulator includes a controller and a power stage for coupling to a load through an inductor and a capacitor. The a controller is operable to control operation of the power stage via a pulse width modulation (PWM) signal generated based on a difference between a reference voltage and the load voltage and sample the inductor current at a lower rate than the load voltage. The controller is further operable to estimate the capacitor current based on the sampled load voltage, generate an offset to the reference voltage based on the sampled inductor current and the estimated capacitor current and adjust the PWM signal applied to the power stage based on the offset. The switching regulator can be single-phase or multi-phase.

Abstract: A switched mode power converter includes a power stage, a main compensator, and a voltage ramp circuit. The power stage is operable to output a voltage to a load. The main compensator is operable to control switching of the power stage so that the voltage output by the power stage corresponds to a target voltage indicated to the switched mode power converter. The voltage ramp circuit includes a voltage ramp generator and a dynamic voltage transition compensation circuit. The voltage ramp generator is operable to generate a voltage ramp that starts at a first voltage corresponding to the target voltage and ends at a second voltage corresponding to a new target voltage. The dynamic voltage transition compensation circuit is responsive to the voltage ramp generator and operable to modify the output voltage response of the switched mode power converter based on one or more compensation parameters.

Abstract: A switching regulator includes an output phase having a high-side transistor and a low-side transistor operable to switch on and off at different periods responsive to a pulse width modulation (PWM) signal applied to the output phase, each cycle of the PWM signal having an on-portion and an off-portion. The switching regulator further includes a current sense circuit operable to sense the current of the low-side transistor, an analog-to-digital converter operable to sample the sensed low-side transistor current during the off-portion for each PWM cycle and a current estimator operable to estimate a cycle average current for the present PWM cycle based on the low-side transistor current sampled during the off-portion for the immediately preceding PWM cycle and a pulse width estimate for the on-portion for the present PWM cycle.