Patents by Inventor Bhaskar Srinivasan

Bhaskar Srinivasan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130234091
    Abstract: Self-aligning fabrication methods for forming memory access devices comprising a doped chalcogenide material. The methods may be used for forming three-dimensionally stacked cross point memory arrays. The method includes forming an insulating material over a first conductive electrode, patterning the insulating material to form vias that expose portions of the first conductive electrode, forming a memory access device within the vias of the insulating material and forming a memory element over the memory access device, wherein data stored in the memory element is accessible via the memory access device. The memory access device is formed of a doped chalcogenide material and formed using a self-aligned fabrication method.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 12, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Neil Greeley, Bhaskar Srinivasan, Gurtej Sandhu, John Smythe
  • Patent number: 8526213
    Abstract: Some embodiments include methods of programming a memory cell. A plurality of charge carriers may be moved within the memory cell, with an average charge across the moving charge carriers having an absolute value greater than 2. Some embodiments include methods of forming and programming an ionic-transport-based memory cell. A stack is formed to have programmable material between first and second electrodes. The programmable material has mobile ions which are moved within the programmable material to transform the programmable material from one memory state to another. An average charge across the moving mobile ions has an absolute value greater than 2. Some embodiments include memory cells with programmable material between first and second electrodes. The programmable material includes an aluminum nitride first layer, and includes a second layer containing a mobile ion species in common with the first layer.
    Type: Grant
    Filed: November 1, 2010
    Date of Patent: September 3, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Roy E. Meade, Bhaskar Srinivasan, Gurtej S. Sandhu
  • Patent number: 8526415
    Abstract: A method and system to acknowledge a multicast message includes informing each node in a network about each multicast group to which it belongs, a relative position in each multicast group to which it belongs, and a group size of each multicast group to which it belongs, transmitting the multicast message, and transmitting, by each node in the multicast group, an acknowledgment in an assigned slot, which is determined by the relative position.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: September 3, 2013
    Assignee: Robert Bosch GmbH
    Inventors: Arati Manjeshwar, Lakshmi Venkatraman, Bhaskar Srinivasan
  • Patent number: 8498156
    Abstract: Memory cell structures and methods are described herein. One or more memory cells include a transistor having a charge storage node, a dielectric material positioned between the charge storage node and a channel region of the transistor, the channel region positioned between a source region and a drain region, and a first electrode of a diode coupled to the charge storage node.
    Type: Grant
    Filed: July 20, 2012
    Date of Patent: July 30, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Bhaskar Srinivasan
  • Publication number: 20130187117
    Abstract: Some embodiments include memory cells which contain, in order; a first electrode material, a first metal oxide material, a second metal oxide material, and a second electrode material. The first metal oxide material has at least two regions which differ in oxygen concentration relative to one another. One of the regions is a first region and another is a second region. The first region is closer to the first electrode material than the second region, and has a greater oxygen concentration than the second region. The second metal oxide material includes a different metal than the first metal oxide material. Some embodiments include methods of forming memory cells in which oxygen is substantially irreversibly transferred from a region of a metal oxide material to an oxygen-sink material. The oxygen transfer creates a difference in oxygen concentration within one region of the metal oxide material relative to another.
    Type: Application
    Filed: January 20, 2012
    Publication date: July 25, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Gurtej S. Sandhu, Bhaskar Srinivasan
  • Patent number: 8476140
    Abstract: A diode and memory device including the diode, where the diode includes a conductive portion and another portion formed of a first material that has characteristics allowing a first decrease in a resistivity of the material upon application of a voltage to the material, thereby allowing current to flow there through, and has further characteristics allowing a second decrease in the resistivity of the first material in response to an increase in temperature of the first material.
    Type: Grant
    Filed: January 18, 2012
    Date of Patent: July 2, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej Sandhu, Bhaskar Srinivasan
  • Patent number: 8455299
    Abstract: Some embodiments include methods in which microwave radiation is used to activate dopant and/or increase crystallinity of semiconductor material during formation of a semiconductor construction. In some embodiments, the microwave radiation has a frequency of about 5.8 gigahertz, and a temperature of the semiconductor construction does not exceed about 500° C. during the exposure to the microwave radiation.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: June 4, 2013
    Assignee: Micron Technology, Inc.
    Inventors: John Smythe, Bhaskar Srinivasan, Ming Zhang
  • Publication number: 20130134375
    Abstract: A method of forming a crystalline Pr1-xCaxMnO3 (PCMO) material includes forming an amorphous PCMO material, crystallizing the amorphous PCMO material, and removing a portion of the crystalline PCMO material. A semiconductor structure including the crystalline PCMO material is also disclosed where the crystalline PCMO material has a thickness of less than about 50 nm. A method of forming a semiconductor device structure is also disclosed.
    Type: Application
    Filed: December 31, 2012
    Publication date: May 30, 2013
    Applicant: Micron Technology, Inc.
    Inventors: Bhaskar Srinivasan, Gurtej S. Sandhu
  • Patent number: 8415661
    Abstract: Self-aligning fabrication methods for forming memory access devices comprising a doped chalcogenide material. The methods may be used for forming three-dimensionally stacked cross point memory arrays. The method includes forming an insulating material over a first conductive electrode, patterning the insulating material to form vias that expose portions of the first conductive electrode, forming a memory access device within the vias of the insulating material and forming a memory element over the memory access device, wherein data stored in the memory element is accessible via the memory access device. The memory access device is formed of a doped chalcogenide material and formed using a self-aligned fabrication method.
    Type: Grant
    Filed: June 7, 2012
    Date of Patent: April 9, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Neil Greeley, Bhaskar Srinivasan, Gurtej Sandhu, John Smythe
  • Publication number: 20130069028
    Abstract: Select devices for memory cell applications and methods of forming the same are described herein. As an example, one or more non-ohmic select devices can include at least two tunnel barrier regions formed between a first metal material and a second metal material, and a third metal material formed between each of the respective at least two tunnel barrier regions. The non-ohmic select device is a two terminal select device that supports bi-directional current flow therethrough.
    Type: Application
    Filed: September 16, 2011
    Publication date: March 21, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: David H. Wells, Bhaskar Srinivasan, John K. Zahurak
  • Patent number: 8399952
    Abstract: Strontium ruthenium oxide provides an effective interface between a ruthenium conductor and a strontium titanium oxide dielectric. Formation of the strontium ruthenium oxide includes the use of atomic layer deposition to form strontium oxide and subsequent annealing of the strontium oxide to form the strontium ruthenium oxide. A first atomic layer deposition of strontium oxide is preformed using water as an oxygen source, followed by a subsequent atomic layer deposition of strontium oxide using ozone as an oxygen source.
    Type: Grant
    Filed: May 9, 2011
    Date of Patent: March 19, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Bhaskar Srinivasan, Vassil Antonov, John Smythe
  • Patent number: 8377718
    Abstract: A method of forming a crystalline Pr1-xCaxMnO3 (PCMO) material includes forming an amorphous PCMO material, crystallizing the amorphous PCMO material, and removing a portion of the crystalline PCMO material. A semiconductor structure including the crystalline PCMO material is also disclosed where the crystalline PCMO material has a thickness of less than about 50 nm. A method of forming a semiconductor device structure is also disclosed.
    Type: Grant
    Filed: November 10, 2010
    Date of Patent: February 19, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Bhaskar Srinivasan, Gurtej S. Sandhu
  • Publication number: 20130001498
    Abstract: In one aspect, a method of operating a memory cell includes using different electrodes to change a programmed state of the memory cell than are used to read the programmed state of the memory cell. In one aspect, a memory cell includes first and second opposing electrodes having material received there-between. The material has first and second lateral regions of different composition relative one another. One of the first and second lateral regions is received along one of two laterally opposing edges of the material. Another of the first and second lateral regions is received along the other of said two laterally opposing edges of the material. At least one of the first and second lateral regions is capable of being repeatedly programmed to at least two different resistance states. Other aspects and implementations are disclosed.
    Type: Application
    Filed: September 12, 2012
    Publication date: January 3, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Bhaskar Srinivasan, Gurtej S. Sandhu
  • Publication number: 20130005080
    Abstract: Some embodiments include methods in which microwave radiation is used to activate dopant and/or increase crystallinity of semiconductor material during formation of a semiconductor construction. In some embodiments, the microwave radiation has a frequency of about 5.8 gigahertz, and a temperature of the semiconductor construction does not exceed about 500° C. during the exposure to the microwave radiation.
    Type: Application
    Filed: September 10, 2012
    Publication date: January 3, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: John Smythe, Bhaskar Srinivasan, Ming Zhang
  • Patent number: 8343828
    Abstract: Some embodiments include methods of forming diodes. A stack may be formed over a first conductive material. The stack may include, in ascending order, a sacrificial material, at least one dielectric material, and a second conductive material. Spacers may be formed along opposing sidewalls of the stack, and then an entirety of the sacrificial material may be removed to leave a gap between the first conductive material and the at least one dielectric material. In some embodiments of forming diodes, a layer may be formed over a first conductive material, with the layer containing supports interspersed in sacrificial material. At least one dielectric material may be formed over the layer, and a second conductive material may be formed over the at least one dielectric material. An entirety of the sacrificial material may then be removed.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: January 1, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej Sandhu, Bhaskar Srinivasan
  • Publication number: 20120320494
    Abstract: Capacitors and methods of forming capacitors are disclosed, and which include an inner conductive metal capacitor electrode and an outer conductive metal capacitor electrode. A capacitor dielectric region is received between the inner and the outer conductive metal capacitor electrodes and has a thickness no greater than 150 Angstroms. Various combinations of materials of thicknesses and relationships relative one another are disclosed which enables and results in the dielectric region having a dielectric constant k of at least 35 yet leakage current no greater than 1×10?7 amps/cm2 at from ?1.1V to +1.1V.
    Type: Application
    Filed: August 29, 2012
    Publication date: December 20, 2012
    Applicant: Micron Technology, Inc.
    Inventors: Rishikesh Krishnan, John Smythe, Vishwanath Bhat, Noel Rocklein, Bhaskar Srinivasan, Jeff Hull, Chris Carlson
  • Patent number: 8323995
    Abstract: Some embodiments include methods of forming diodes. The methods may include oxidation of an upper surface of a conductive electrode to form an oxide layer over the conductive electrode. In some embodiments, the methods may include formation of an oxidizable material over a conductive electrode, and subsequent oxidation of the oxidizable material to form an oxide layer over the conductive electrode. In some embodiments, the methods may include formation of a metal halide layer over a conductive electrode. Some embodiments include diodes that contain a metal halide layer between a pair of diode electrodes.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: December 4, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Bhaskar Srinivasan
  • Patent number: 8310807
    Abstract: Capacitors and methods of forming capacitors are disclosed, and which include an inner conductive metal capacitor electrode and an outer conductive metal capacitor electrode. A capacitor dielectric region is received between the inner and the outer conductive metal capacitor electrodes and has a thickness no greater than 150 Angstroms. Various combinations of materials of thicknesses and relationships relative one another are disclosed which enables and results in the dielectric region having a dielectric constant k of at least 35 yet leakage current no greater than 1×10?7 amps/cm2 at from ?1.1V to +1.1V.
    Type: Grant
    Filed: June 12, 2009
    Date of Patent: November 13, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Rishikesh Krishnan, John Smythe, Vishwanath Bhat, Noel Rocklein, Bhaskar Srinivasan, Jeff Hull, Chris Carlson
  • Publication number: 20120282754
    Abstract: Capacitors and methods of forming capacitors are disclosed, and which include an inner conductive metal capacitor electrode and an outer conductive metal capacitor electrode. A capacitor dielectric region is received between the inner and the outer conductive metal capacitor electrodes and has a thickness no greater than 150 Angstroms. Various combinations of materials of thicknesses and relationships relative one another are disclosed which enables and results in the dielectric region having a dielectric constant k of at least 35 yet leakage current no greater than 1×10?7 amps/cm2 at from ?1.1V to +1.1V.
    Type: Application
    Filed: July 16, 2012
    Publication date: November 8, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Rishikesh Krishnan, John Smythe, Vishwanath Bhat, Noel Rocklein, Bhaskar Srinivasan, Jeff Hull, Chris Carlson
  • Publication number: 20120280302
    Abstract: Memory cell structures and methods are described herein. One or more memory cells include a transistor having a charge storage node, a dielectric material positioned between the charge storage node and a channel region of the transistor, the channel region positioned between a source region and a drain region, and a first electrode of a diode coupled to the charge storage node.
    Type: Application
    Filed: July 20, 2012
    Publication date: November 8, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Gurtej S. Sandhu, Bhaskar Srinivasan