Abstract: The present disclosure is a novel utility of a software defined radio (SDR) based Distributed Antenna System (DAS) that is field reconfigurable and support multi-modulation schemes (modulation-independent), multi-carriers, multi-frequency bands and multi-channels. The present invention enables a high degree of flexibility to manage, control, enhance, facilitate the usage and performance of a distributed wireless network such as Flexible Simulcast, automatic traffic load-balancing, network and radio resource optimization, network calibration, autonomous/assisted commissioning, carrier pooling, automatic frequency selection, frequency carrier placement, traffic monitoring, traffic tagging, pilot beacon, etc. As a result, a DAS in accordance with the present invention can increase the efficiency and traffic capacity of the operators' wireless network.

Abstract: An unmanned ground vehicle (UGV) includes one or more motors configured to drive one or more wheels of the UGV, a memory storing instructions, and a processor coupled to the one or more motors and the memory. The processor is configured to execute the instructions to cause the UGV to determine location information of a movable target; calculate a direction and a speed for the unmanned ground vehicle based on the determined location information; and drive the one or more motors to move the unmanned ground vehicle in the calculated direction at the calculated speed to follow the movable target when the movable target moves.

Abstract: The present disclosure discloses a structure and a method directed to a semiconductor structure having a resistor structure and a metal-insulator-metal (MIM) capacitor structure formed by a single mask process. The semiconductor structure includes an interconnect structure on a substrate, a first insulating layer on the interconnect structure, first and second conductive plates on the first insulating layer and separated by a second insulating layer, a dielectric layer on the first conductive plate, and a third conductive plate on the dielectric layer. Bottom surfaces of the first and second conductive plates are coplanar.

Abstract: In example implementations, a computing device is provided. The computing device includes an expansion interface that includes a plurality of slots. A first add-in card is connected to a first slot of the plurality of slots. A second add-in card is connected to a second slot of the plurality of slots. The computing device includes a processor communicatively coupled to the expansion interface. The processor is to detect that the first add-in card is compatible with a power savings control signal and that the second add-in card is not compatible with the power savings control signal, disable the power savings control signal to the second slot, and transmit the power savings control signal to the first slot when the first add-in card goes into a power savings mode.

Abstract: In example implementations, a computing device is provided. The computing device includes an expansion interface, a first device, a second device, and a processor communicatively coupled to the expansion interface. The expansion interface includes a plurality of slots. Two slots of the plurality of slots are controlled by a single reset signal. The first device is connected to a first slot of the two slots and has a feature that is compatible with the single reset signal. The second device is connected to a second slot of the two slots and does not have the feature compatible with the single reset signal. The process is to detect the first device connected to the first slot and the second device connected to the second slot and disable the feature by preventing the first slot and the second slot from receiving the single reset signal.

Abstract: In example implementations, a computing device is provided. The computing device includes a memory bus, a first memory module connected to a first slot of the memory bus, a second memory module connected to a second slot of the memory bus, and a processor communicatively coupled to the memory bus. The processor is to detect a mixed memory module configuration caused by the first memory module and the second memory module and train the first memory module and the second memory module to operate at a maximum mixed memory module configuration speed.

Abstract: A video editing method, apparatus and storage medium are provided. The method includes obtaining an object, the object including one or more images; determining a content element of the object for video editing, the content element having a content type identifier; determining a material set identifier corresponding to the content type identifier according to a first behavior tree logic; determining a video editing material set corresponding to the material set identifier; and obtaining an edited video according to the content element and the video editing material set.

Abstract: A transport medium for a microorganism is provided. The transport medium includes at least one chaotropic substance, at least one acid, at least one buffer, at least one chelating agent, and at least one detergent. The transport medium is able to inactivate bacteria and viruses at the time of sample collection, stabilize and preserve microbial nucleic acids at ambient temperature for extended periods of time.

Abstract: One or more images of a portion of a wafer with fabricated devices are acquired using an imaging tool. A pattern of repeating features in an input image of a wafer is identified using various methods, such as correlation and clustering of neighboring vectors. A template is generated based on the found pattern of repeating features. The template is aligned with the acquired image to identify target locations. The target locations are then isolated from the original image for performing detailed metrology.

Abstract: In example implementations, an apparatus is provided. The apparatus includes a riser card body, a first interface, a first 2×8 slot on a surface of the riser card body, and a second 2×8 slot on a same side of the surface of the riser card body as the first 2×8 slot. The first interface includes a first set of fingers and a second set of fingers at an end of the riser card body to connect to a peripheral component interconnect e×press (PC1e) slot of a motherboard. The first 2×8 slot and the second 2×8 slot are positioned perpendicular to the PCIe slot of the motherboard.

Abstract: The disclosure relates to compositions comprising 3,6,7-trimethyllumazine. In particular, Manuka honey is an example of a composition comprising 3,6,7-trimethyllumazine. The composition is useful in preventing, ameliorating or treating TG2, JAK, and/or COX-2 associated conditions. These conditions include inflammation, pain, ulcers, Crohn's disease, reflux, gingivitis, schizophrenia, neurodegenerative disorders, Alzheimer's disease, Parkinson's disease, arthritis, cardiovascular diseases and cancers.

Abstract: A structure includes a bulk semiconductor substrate, a first plurality of dielectric isolation regions over the bulk semiconductor substrate, a plurality of semiconductor fins protruding higher than the first plurality of dielectric isolation regions, a first gate stack on top surfaces and sidewalls of the plurality of semiconductor fins, a second plurality of dielectric isolation regions over the bulk semiconductor substrate, a mesa structure in the second plurality of dielectric isolation regions, and a second gate stack over the mesa structure. Top surfaces of the first gate stack and the second gate stack are coplanar with each other.

Abstract: A marker and product for auxiliary diagnosis of valvular heart disease (VHD) is provided. The present disclosure provides for the first time using PLAUR as a biomarker for auxiliary diagnosis of VHD. When the PLAUR is used for auxiliary diagnosis, the diagnostic result can be obtained in only one working day (high detection speed) with sensitivity/accuracy is much higher than the sensitivity/accuracy of NT-ProBNP and hsCRP, and a high-throughput operation is enabled.

Abstract: A use of an MYOG gene as a target in the preparation of a drug for treating a cardiomyocyte apoptosis-associated cardiovascular disease (CVD) is provided. By constructing angiotensin II-induced human induced pluripotent stem cell-differentiated cardiomyocyte apoptosis models in vitro, the present disclosure reveals for the first time the role of the transcription factor MYOG in the inhibition of cardiomyocyte apoptosis and provides a theoretical and scientific basis for drug research and development of cardiomyocyte apoptosis-associated CVDs. Cardiomyocyte apoptosis model becomes a new target for CVD drug research and development.

Abstract: An unmanned ground vehicle (UGV) includes one or more motors configured to drive one or more wheels of the UGV, a memory storing instructions, and a processor coupled to the one or more motors and the memory. The processor is configured to execute the instructions to cause the UGV to determine location information of a movable target; calculate a direction and a speed for the unmanned ground vehicle based on the determined location information; and drive the one or more motors to move the unmanned ground vehicle in the calculated direction at the calculated speed to follow the movable target when the movable target moves.

Abstract: The present application relates to the field of display technology and, in particular, to an array substrate, a manufacturing method of the array substrate, and a display device. An array substrate comprises: a base substrate having a pixel display area and a gate drive circuit area; a first thin film transistor formed in the pixel display area, the first thin film transistor comprising a first gate insulating layer; a second thin film transistor formed in the gate drive circuit area, the second thin film transistor comprising a second gate insulating layer, where a thickness of the second gate insulating layer is smaller than a thickness of the first gate insulating layer.

Abstract: An edge ring, for a plasma etcher, may include a circular bottom portion with an opening sized to receive an electrostatic chuck supporting a semiconductor device, and a circular top portion integrally connected to a first top part of the circular bottom portion. The edge ring may include a circular chamfer portion integrally connected to a second top part of the circular bottom portion and integrally connected to a side of the circular top portion. The circular chamfer portion may include an inner surface that is angled radially outward from the opening at less than ninety degrees.

Abstract: An apparatus includes a chamber, a pedestal configured to receive and support a semiconductor wafer in the chamber, and an edge ring disposed over the pedestal. The edge ring includes a first portion having a first top surface, a second portion coupled to the first portion and having a second top surface lower than the first top surface, and a recess defined in the first portion. The second top surface is under the semiconductor wafer. The recess has a depth, and a distance between the pedestal and an inner surface of the recess is substantially equal to the depth of the recess.